coreboot August 2010

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67 participants
267 discussions

alix 2d2
by Felix Salfelder 31 Aug '10

31 Aug '10

Hello. i adapted the alix 2d3 configuration to 2d2 i.e. removed one of the NICs in favor of a mini pci slot. the attached patch is against trunk 5746. ive sucessfuly tested the output rom on such a mainboard (using seabios - i couldnt get grub2 running). i know it doesnt make sense to clone all of those 2d3 files, anyway i hope anyone is going to merge this. thank you felix

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Re: [coreboot] [PATCH 0/3] i855 support
by Idwer Vollering 31 Aug '10

31 Aug '10

2010/8/31 Andreas Schultz <aschultz(a)tpip.net> > Hi, > > Attached is the serial output and the configuration i used. Thanks, now I have something to compare my .config with. > However, > there seems to be nothing in the log that would refer to any CPU > specifics. > Yes there is: Root Device init APIC_CLUSTER: 0 init start_eip=0x0000c000, offset=0x00100000, code_size=0x0000005b Initializing CPU #0 CPU: vendor Intel device f29 CPU: family 0f, model 02, stepping 09 POST: 0x60 Enabling cache > > Andreas > Idwer > > On Tue, 2010-08-31 at 02:41 +0200, Idwer Vollering wrote: > > 2010/8/30 Andreas Schultz <aschultz(a)tpip.net> > > Hi, > > > > Here is a series of patches wich improve i855 support and a > > new board > > with that chipset. > > > > The board boots successfully with Seabios into Linux! > > Nice work. Can you show the output from the console (serial output) ? > > > > Off topic: I'm asking this because I own a P4 CPU, with the CPU id > > 0x0f29 (ergo it's not a Celeron M), that I can't get to start using > > CAR. Different but similar chipset:Intel i865. > > > > > > There are still a few blacks left to filled in (undocumented > > chipset > > registers, some RAM parameters i have no idea how to compute). > > So any > > comment is welcome! > > > > Regards > > Andreas > > > -- > Dipl. Inform. > Andreas Schultz > > email: as(a)travelping.com > phone: +49-391-819099-224 > mobil: +49-170-2226073 > > ------------------ managed broadband access ------------------ > > Travelping GmbH phone: +49-391-8190990 > Roentgenstr. 13 fax: +49-391-819099299 > D-39108 Magdeburg email: info(a)travelping.com > GERMANY web: http://www.travelping.com > > Company Registration: Amtsgericht Stendal Reg No.: HRB 10578 > Geschaeftsfuehrer: Holger Winkelmann | VAT ID No.: DE236673780 > -------------------------------------------------------------- >

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build service results for r5758
by repository service 31 Aug '10

31 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "zbao" checked in revision 5758 to the coreboot repository. This caused the following changes: Change Log: Get Byte65/66 for register manufacture ID code. RegMan1Present will be used in write levelization training. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5758&device=atc-6220&vendo… If something broke during this checkin please be a pain in zbao's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5758 - trunk/src/northbridge/amd/amdmct/mct_ddr3
by repository service 31 Aug '10

31 Aug '10

Author: zbao Date: Tue Aug 31 08:10:54 2010 New Revision: 5758 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5758 Log: Get Byte65/66 for register manufacture ID code. RegMan1Present will be used in write levelization training. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c Modified: trunk/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c ============================================================================== --- trunk/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c Mon Aug 30 23:52:38 2010 (r5757) +++ trunk/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c Tue Aug 31 08:10:54 2010 (r5758) @@ -2124,7 +2124,15 @@ pDCTstat->MirrPresU_NumRegR |= 1 << i; } /* Get byte62: Reference Raw Card information. We dont need it now. */ - /* byte = mctRead_SPD(smbaddr, 62); */ + /* byte = mctRead_SPD(smbaddr, SPD_RefRawCard); */ + /* Get Byte65/66 for register manufacture ID code */ + if ((0x97 == mctRead_SPD(smbaddr, SPD_RegManufactureID_H)) && + (0x80 == mctRead_SPD(smbaddr, SPD_RegManufactureID_L))) { + if (0x16 == mctRead_SPD(smbaddr, SPD_RegManRevID)) + pDCTstat->RegMan2Present |= 1 << i; + else + pDCTstat->RegMan1Present |= 1 << i; + } /* Get Control word values for RC3. We dont need it. */ byte = mctRead_SPD(smbaddr, 70); pDCTstat->CtrlWrd3 |= (byte >> 4) << (i << 2); /* C3 = SPD byte 70 [7:4] */

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(no subject)
by Bao, Zheng 31 Aug '10

31 Aug '10

Get Byte65/66 for register manufacture ID code. RegMan1Present will be used in write levelization training. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: src/northbridge/amd/amdmct/mct_ddr3/mct_d.c =================================================================== --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c (revision 5757) +++ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c (working copy) @@ -2124,7 +2124,15 @@ pDCTstat->MirrPresU_NumRegR |= 1 << i; } /* Get byte62: Reference Raw Card information. We dont need it now. */ - /* byte = mctRead_SPD(smbaddr, 62); */ + /* byte = mctRead_SPD(smbaddr, SPD_RefRawCard); */ + /* Get Byte65/66 for register manufacture ID code */ + if ((0x97 == mctRead_SPD(smbaddr, SPD_RegManufactureID_H)) && + (0x80 == mctRead_SPD(smbaddr, SPD_RegManufactureID_L))) { + if (0x16 == mctRead_SPD(smbaddr, SPD_RegManRevID)) + pDCTstat->RegMan2Present |= 1 << i; + else + pDCTstat->RegMan1Present |= 1 << i; + } /* Get Control word values for RC3. We dont need it. */ byte = mctRead_SPD(smbaddr, 70); pDCTstat->CtrlWrd3 |= (byte >> 4) << (i << 2); /* C3 = SPD byte 70 [7:4] */

2 1

[patch]: AMD DDR3 Register manufacure feature
by Bao, Zheng 31 Aug '10

31 Aug '10

1 0

[PATCH 0/3] i855 support
by Andreas Schultz 31 Aug '10

31 Aug '10

Hi, Here is a series of patches wich improve i855 support and a new board with that chipset. The board boots successfully with Seabios into Linux! There are still a few blacks left to filled in (undocumented chipset registers, some RAM parameters i have no idea how to compute). So any comment is welcome! Regards Andreas -- Dipl. Inform. Andreas Schultz email: as(a)travelping.com phone: +49-391-819099-224 ------------------ managed broadband access ------------------ Travelping GmbH phone: +49-391-8190990 Roentgenstr. 13 fax: +49-391-819099299 D-39108 Magdeburg email: info(a)travelping.com GERMANY web: http://www.travelping.com Company Registration: Amtsgericht Stendal Reg No.: HRB 10578 Geschaeftsfuehrer: Holger Winkelmann | VAT ID No.: DE236673780 --------------------------------------------------------------

3 5

build service results for r5757
by repository service 31 Aug '10

31 Aug '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "myles" checked in revision 5757 to the coreboot repository. This caused the following changes: Change Log: Make yabel work for non-zero bus numbers. The link_num is not the bus number. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5757&device=atc-6220&vendo… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[commit] r5757 - trunk/src/devices/oprom/yabel
by repository service 30 Aug '10

30 Aug '10

Author: myles Date: Mon Aug 30 23:52:38 2010 New Revision: 5757 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5757 Log: Make yabel work for non-zero bus numbers. The link_num is not the bus number. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/src/devices/oprom/yabel/device.c Modified: trunk/src/devices/oprom/yabel/device.c ============================================================================== --- trunk/src/devices/oprom/yabel/device.c Mon Aug 30 19:53:13 2010 (r5756) +++ trunk/src/devices/oprom/yabel/device.c Mon Aug 30 23:52:38 2010 (r5757) @@ -45,7 +45,7 @@ { int taa_index = 0; struct resource *r; - u8 bus = bios_device.dev->bus->link_num; + u8 bus = bios_device.dev->bus->secondary; u16 devfn = bios_device.dev->path.pci.devfn; bios_device.bus = bus;

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[PATCH] Use mainboard Kconfig option for AMD rumba
by Myles Watson 30 Aug '10

30 Aug '10

Thanks to Jens for his patch that makes this work! Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Thanks, Myles

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coreboot August 2010