coreboot May 2010

coreboot@coreboot.org

59 participants
300 discussions

[commit] r5532 - trunk/src/arch/i386/include/arch
by repository service 08 May '10

08 May '10

Author: stepan Date: Sat May 8 20:14:50 2010 New Revision: 5532 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5532 Log: wipe some old unused code, this has been cleaned up now. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/arch/i386/include/arch/io.h trunk/src/arch/i386/include/arch/romcc_io.h Modified: trunk/src/arch/i386/include/arch/io.h ============================================================================== --- trunk/src/arch/i386/include/arch/io.h Sat May 8 19:15:36 2010 (r5531) +++ trunk/src/arch/i386/include/arch/io.h Sat May 8 20:14:50 2010 (r5532) @@ -134,47 +134,6 @@ ); } -#if 0 -/* XXX XXX XXX This is a story from the evil API from hell XXX XXX XXX - * We have different functions for memory access in pre-ram stage and ram - * stage. Those in pre-ram stage are called write32 and expect the address - * first and the address as a pointer type. Those in ram stage are called - * writel and expect the datum first and the address as an integer type. - * Until all code is checked and fixed, I'll add both versions here now. - */ - -static inline void writeb(uint8_t b, volatile void *addr) -{ - *(volatile uint8_t *) addr = b; -} - -static inline void writew(uint16_t b, volatile void *addr) -{ - *(volatile uint16_t *) addr = b; -} - -static inline void writel(uint32_t b, volatile void *addr) -{ - *(volatile uint32_t *) addr = b; -} - -static inline uint8_t readb(const volatile void *addr) -{ - return *(volatile uint8_t *) addr; -} - -static inline uint16_t readw(const volatile void *addr) -{ - return *(volatile uint16_t *) addr; -} - -static inline uint32_t readl(const volatile void *addr) -{ - return *(volatile uint32_t *) addr; -} -#endif - -#if !defined(__PRE_RAM__) static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr) { return *((volatile uint8_t *)(addr)); @@ -204,7 +163,6 @@ { *((volatile uint32_t *)(addr)) = value; } -#endif #endif Modified: trunk/src/arch/i386/include/arch/romcc_io.h ============================================================================== --- trunk/src/arch/i386/include/arch/romcc_io.h Sat May 8 19:15:36 2010 (r5531) +++ trunk/src/arch/i386/include/arch/romcc_io.h Sat May 8 20:14:50 2010 (r5532) @@ -3,37 +3,9 @@ #include <stdint.h> -#ifdef __PRE_RAM__ -static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr) -{ - return *((volatile uint8_t *)(addr)); -} - -static inline __attribute__((always_inline)) uint16_t read16(unsigned long addr) -{ - return *((volatile uint16_t *)(addr)); -} - -static inline __attribute__((always_inline)) uint32_t read32(unsigned long addr) -{ - return *((volatile uint32_t *)(addr)); -} - -static inline __attribute__((always_inline)) void write8(unsigned long addr, uint8_t value) -{ - *((volatile uint8_t *)(addr)) = value; -} - -static inline __attribute__((always_inline)) void write16(unsigned long addr, uint16_t value) -{ - *((volatile uint16_t *)(addr)) = value; -} - -static inline __attribute__((always_inline)) void write32(unsigned long addr, uint32_t value) -{ - *((volatile uint32_t *)(addr)) = value; -} -#endif +// arch/io.h is pulled in in many places but it could +// also be pulled in here for all romcc/romstage code. +// #include <arch/io.h> #if CONFIG_MMCONF_SUPPORT

1 0

[commit] r5531 - trunk
by repository service 08 May '10

08 May '10

Author: stepan Date: Sat May 8 19:15:36 2010 New Revision: 5531 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5531 Log: Patrick Georgi wrote: Given that this is exclusively used for checking for mingw and cygwin (both support this), at most this requires routing the error message to /dev/null. And rename the variable so it's not used for any non-windows purpose. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat May 8 17:50:44 2010 (r5530) +++ trunk/Makefile Sat May 8 19:15:36 2010 (r5531) @@ -368,14 +368,15 @@ $(obj)/ldoptions: $(obj)/config.h awk '/^#define ([^"])* ([^"])*$$/ {gsub("\\r","",$$3); print $$2 " = " $$3 ";";}' $< > $@ -_OS=$(shell uname -o) +_WINCHECK=$(shell uname -o 2> /dev/null) STACK= -ifeq ($(_OS),Msys) +ifeq ($(_WINCHECK),Msys) STACK=-Wl,--stack,16384000 endif -ifeq ($(_OS),Cygwin) +ifeq ($(_WINCHECK),Cygwin) STACK=-Wl,--stack,16384000 endif + $(objutil)/romcc/romcc: $(top)/util/romcc/romcc.c @printf " HOSTCC $(subst $(obj)/,,$(@)) (this may take a while)\n" @# Note: Adding -O2 here might cause problems. For details see:

1 0

[PATCH]Include headers instead of sources in romstage, part 1/many
by Patrick Georgi 08 May '10

08 May '10

Hi, attached patch drops console/console.c and pc80/serial.c from the mainboards' romstage.c. console/console.h is included instead. On CAR builds, console/console.c is built separately and linked to the romstage, on romcc builds, this includes console/console.c from within console/console.h. The romcc variant helps with uniformity. In the same way, pc80/serial.c is eliminated from romstage.c. The necessary prototypes were already included via some other paths. Both files needs to include arch/io.h for separate compilation, so it finds outb, so it's moved outside the #ifndef __PRE_RAM__ in console.c and added in serial.c The patch also removes two superfluous ARRAY_SIZE definitions (in amd/db800 and winent/pl6064) It's abuild tested and Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

3 6

[commit] r5530 - trunk
by repository service 08 May '10

08 May '10

Author: oxygene Date: Sat May 8 17:50:44 2010 New Revision: 5530 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5530 Log: Slightly improve detecting Windows. Trivial Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Sat May 8 13:17:24 2010 (r5529) +++ trunk/Makefile Sat May 8 17:50:44 2010 (r5530) @@ -368,12 +368,12 @@ $(obj)/ldoptions: $(obj)/config.h awk '/^#define ([^"])* ([^"])*$$/ {gsub("\\r","",$$3); print $$2 " = " $$3 ";";}' $< > $@ -_OS=$(shell uname -s |cut -c-7) +_OS=$(shell uname -o) STACK= -ifeq ($(_OS),MINGW32) +ifeq ($(_OS),Msys) STACK=-Wl,--stack,16384000 endif -ifeq ($(_OS),CYGWIN_) +ifeq ($(_OS),Cygwin) STACK=-Wl,--stack,16384000 endif $(objutil)/romcc/romcc: $(top)/util/romcc/romcc.c

3 2

build service results for r5529
by coreboot information 08 May '10

08 May '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5529 to the coreboot repository. This caused the following changes: Change Log: We didn't have console.initobj.o before, but the same hard coded build rule is needed as for console.o Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich has been fixed Compilation of amd:serengeti_cheetah has been fixed Compilation of asus:a8n_e has been fixed Compilation of digitallogic:adl855pc has been fixed Compilation of iei:pcisa-lx-800-r10 has been fixed Compilation of iwill:dk8_htx has been fixed Compilation of iwill:dk8x has been fixed Compilation of kontron:986lcd-m has been fixed Compilation of msi:ms9652_fam10 has been fixed Compilation of sunw:ultra40 has been fixed Compilation of supermicro:h8dme has been fixed Compilation of thomson:ip1000 has been fixed Compilation of tyan:s4882 has been fixed If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[commit] r5529 - trunk/src/console
by repository service 08 May '10

08 May '10

Author: stepan Date: Sat May 8 13:17:24 2010 New Revision: 5529 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5529 Log: We didn't have console.initobj.o before, but the same hard coded build rule is needed as for console.o Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/console/Makefile.inc Modified: trunk/src/console/Makefile.inc ============================================================================== --- trunk/src/console/Makefile.inc Sat May 8 11:14:51 2010 (r5528) +++ trunk/src/console/Makefile.inc Sat May 8 13:17:24 2010 (r5529) @@ -17,3 +17,4 @@ driver-$(CONFIG_CONSOLE_LOGBUF) += logbuf_console.o $(obj)/console/console.o : $(obj)/build.h +$(obj)/console/console.initobj.o : $(obj)/build.h

1 0

build service results for r5528
by coreboot information 08 May '10

08 May '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "oxygene" checked in revision 5528 to the coreboot repository. This caused the following changes: Change Log: Drop console/console.c and pc80/serial.c from mainboards' romstage.c. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of amd:norwich has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=norwich&vendor… Compilation of amd:serengeti_cheetah has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=serengeti_chee… Compilation of asus:a8n_e has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=a8n_e&vendor=a… Compilation of digitallogic:adl855pc has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=adl855pc&vendo… Compilation of iei:pcisa-lx-800-r10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=pcisa-lx-800-r… Compilation of iwill:dk8_htx has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=dk8_htx&vendor… Compilation of iwill:dk8x has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=dk8x&vendor=iw… Compilation of kontron:986lcd-m has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=986lcd-m&vendo… Compilation of msi:ms9652_fam10 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=ms9652_fam10&v… Compilation of sunw:ultra40 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=ultra40&vendor… Compilation of supermicro:h8dme has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=h8dme&vendor=s… Compilation of thomson:ip1000 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=ip1000&vendor=… Compilation of tyan:s4882 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5528&device=s4882&vendor=t… If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[commit] r5528 - in trunk/src: console include/console mainboard/a-trend/atc-6220 mainboard/a-trend/atc-6240 mainboard/abit/be6-ii_v2_0 mainboard/advantech/pcm-5820 mainboard/amd/db800 mainboard/am...
by repository service 08 May '10

08 May '10

Author: oxygene Date: Sat May 8 11:14:51 2010 New Revision: 5528 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5528 Log: Drop console/console.c and pc80/serial.c from mainboards' romstage.c. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/console/Makefile.inc trunk/src/console/console.c trunk/src/include/console/console.h trunk/src/mainboard/a-trend/atc-6220/romstage.c trunk/src/mainboard/a-trend/atc-6240/romstage.c trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c trunk/src/mainboard/advantech/pcm-5820/romstage.c trunk/src/mainboard/amd/db800/romstage.c trunk/src/mainboard/amd/dbm690t/romstage.c trunk/src/mainboard/amd/mahogany/romstage.c trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/norwich/romstage.c trunk/src/mainboard/amd/pistachio/romstage.c trunk/src/mainboard/amd/rumba/romstage.c trunk/src/mainboard/amd/serengeti_cheetah/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/amd/tilapia_fam10/romstage.c trunk/src/mainboard/arima/hdama/romstage.c trunk/src/mainboard/artecgroup/dbe61/romstage.c trunk/src/mainboard/asi/mb_5blgp/romstage.c trunk/src/mainboard/asi/mb_5blmp/romstage.c trunk/src/mainboard/asrock/939a785gmh/romstage.c trunk/src/mainboard/asus/a8n_e/romstage.c trunk/src/mainboard/asus/a8v-e_se/romstage.c trunk/src/mainboard/asus/m2v-mx_se/romstage.c trunk/src/mainboard/asus/mew-am/romstage.c trunk/src/mainboard/asus/mew-vm/romstage.c trunk/src/mainboard/asus/p2b-d/romstage.c trunk/src/mainboard/asus/p2b-ds/romstage.c trunk/src/mainboard/asus/p2b-f/romstage.c trunk/src/mainboard/asus/p2b-ls/romstage.c trunk/src/mainboard/asus/p2b/romstage.c trunk/src/mainboard/asus/p3b-f/romstage.c trunk/src/mainboard/axus/tc320/romstage.c trunk/src/mainboard/azza/pt-6ibd/romstage.c trunk/src/mainboard/bcom/winnet100/romstage.c trunk/src/mainboard/bcom/winnetp680/romstage.c trunk/src/mainboard/biostar/m6tba/romstage.c trunk/src/mainboard/broadcom/blast/romstage.c trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c trunk/src/mainboard/dell/s1850/romstage.c trunk/src/mainboard/digitallogic/adl855pc/romstage.c trunk/src/mainboard/digitallogic/msm586seg/romstage.c trunk/src/mainboard/digitallogic/msm800sev/romstage.c trunk/src/mainboard/eaglelion/5bcm/romstage.c trunk/src/mainboard/emulation/qemu-x86/romstage.c trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c trunk/src/mainboard/gigabyte/m57sli/romstage.c trunk/src/mainboard/hp/dl145_g3/romstage.c trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c trunk/src/mainboard/ibm/e325/romstage.c trunk/src/mainboard/ibm/e326/romstage.c trunk/src/mainboard/iei/juki-511p/romstage.c trunk/src/mainboard/iei/nova4899r/romstage.c trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/intel/eagleheights/romstage.c trunk/src/mainboard/intel/jarrell/romstage.c trunk/src/mainboard/intel/mtarvon/romstage.c trunk/src/mainboard/intel/truxton/romstage.c trunk/src/mainboard/intel/xe7501devkit/romstage.c trunk/src/mainboard/iwill/dk8_htx/romstage.c trunk/src/mainboard/iwill/dk8s2/romstage.c trunk/src/mainboard/iwill/dk8x/romstage.c trunk/src/mainboard/jetway/j7f24/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/kontron/kt690/romstage.c trunk/src/mainboard/lippert/frontrunner/romstage.c trunk/src/mainboard/lippert/roadrunner-lx/romstage.c trunk/src/mainboard/lippert/spacerunner-lx/romstage.c trunk/src/mainboard/mitac/6513wu/romstage.c trunk/src/mainboard/msi/ms6119/romstage.c trunk/src/mainboard/msi/ms6147/romstage.c trunk/src/mainboard/msi/ms6156/romstage.c trunk/src/mainboard/msi/ms6178/romstage.c trunk/src/mainboard/msi/ms7135/romstage.c trunk/src/mainboard/msi/ms7260/romstage.c trunk/src/mainboard/msi/ms9185/romstage.c trunk/src/mainboard/msi/ms9282/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/nec/powermate2000/romstage.c trunk/src/mainboard/newisys/khepri/romstage.c trunk/src/mainboard/nokia/ip530/romstage.c trunk/src/mainboard/nvidia/l1_2pvv/romstage.c trunk/src/mainboard/olpc/btest/romstage.c trunk/src/mainboard/olpc/rev_a/romstage.c trunk/src/mainboard/pcengines/alix1c/romstage.c trunk/src/mainboard/rca/rm4100/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c trunk/src/mainboard/sunw/ultra40/romstage.c trunk/src/mainboard/supermicro/h8dme/romstage.c trunk/src/mainboard/supermicro/h8dmr/romstage.c trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c trunk/src/mainboard/supermicro/x6dai_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g/romstage.c trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c trunk/src/mainboard/technexion/tim5690/romstage.c trunk/src/mainboard/technexion/tim8690/romstage.c trunk/src/mainboard/technologic/ts5300/romstage.c trunk/src/mainboard/televideo/tc7020/romstage.c trunk/src/mainboard/thomson/ip1000/romstage.c trunk/src/mainboard/tyan/s1846/romstage.c trunk/src/mainboard/tyan/s2735/romstage.c trunk/src/mainboard/tyan/s2850/romstage.c trunk/src/mainboard/tyan/s2875/romstage.c trunk/src/mainboard/tyan/s2880/romstage.c trunk/src/mainboard/tyan/s2881/romstage.c trunk/src/mainboard/tyan/s2882/romstage.c trunk/src/mainboard/tyan/s2885/romstage.c trunk/src/mainboard/tyan/s2891/romstage.c trunk/src/mainboard/tyan/s2892/romstage.c trunk/src/mainboard/tyan/s2895/romstage.c trunk/src/mainboard/tyan/s2912/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/mainboard/tyan/s4880/romstage.c trunk/src/mainboard/tyan/s4882/romstage.c trunk/src/mainboard/via/epia-cn/romstage.c trunk/src/mainboard/via/epia-m/romstage.c trunk/src/mainboard/via/epia-m700/romstage.c trunk/src/mainboard/via/epia-n/romstage.c trunk/src/mainboard/via/epia/romstage.c trunk/src/mainboard/via/pc2500e/romstage.c trunk/src/mainboard/via/vt8454c/romstage.c trunk/src/mainboard/winent/pl6064/romstage.c trunk/src/pc80/Makefile.inc trunk/src/pc80/serial.c Modified: trunk/src/console/Makefile.inc ============================================================================== --- trunk/src/console/Makefile.inc Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/console/Makefile.inc Sat May 8 11:14:51 2010 (r5528) @@ -7,6 +7,7 @@ smmobj-y += vtxprintf.o initobj-y += vtxprintf.o +initobj-$(CONFIG_USE_DCACHE_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct_console.o Modified: trunk/src/console/console.c ============================================================================== --- trunk/src/console/console.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/console/console.c Sat May 8 11:14:51 2010 (r5528) @@ -5,9 +5,9 @@ #include <console/console.h> #include <build.h> #include <arch/hlt.h> +#include <arch/io.h> #ifndef __PRE_RAM__ -#include <arch/io.h> #include <string.h> #include <pc80/mc146818rtc.h> Modified: trunk/src/include/console/console.h ============================================================================== --- trunk/src/include/console/console.h Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/include/console/console.h Sat May 8 11:14:51 2010 (r5528) @@ -307,4 +307,9 @@ #endif +#ifdef __ROMCC__ +/* if included by romcc, include the sources, too. romcc can't use prototypes */ +#include <console/console.c> +#endif + #endif /* CONSOLE_CONSOLE_H_ */ Modified: trunk/src/mainboard/a-trend/atc-6220/romstage.c ============================================================================== --- trunk/src/mainboard/a-trend/atc-6220/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/a-trend/atc-6220/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/a-trend/atc-6240/romstage.c ============================================================================== --- trunk/src/mainboard/a-trend/atc-6240/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/a-trend/atc-6240/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c ============================================================================== --- trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/abit/be6-ii_v2_0/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/advantech/pcm-5820/romstage.c ============================================================================== --- trunk/src/mainboard/advantech/pcm-5820/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/advantech/pcm-5820/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -24,7 +24,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/amd/db800/romstage.c ============================================================================== --- trunk/src/mainboard/amd/db800/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/db800/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -19,13 +19,12 @@ */ #include <stdint.h> +#include <stdlib.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include <console/console.h> -#include "console/console.c" #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" @@ -33,7 +32,6 @@ #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #include "southbridge/amd/cs5536/cs5536_early_smbus.c" Modified: trunk/src/mainboard/amd/dbm690t/romstage.c ============================================================================== --- trunk/src/mainboard/amd/dbm690t/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/dbm690t/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -42,8 +42,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/amd/mahogany/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/mahogany/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -42,8 +42,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -47,8 +47,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "console/console.c" -#include "pc80/serial.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> #include "northbridge/amd/amdfam10/raminit.h" Modified: trunk/src/mainboard/amd/norwich/romstage.c ============================================================================== --- trunk/src/mainboard/amd/norwich/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/norwich/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -23,8 +23,7 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/amd/pistachio/romstage.c ============================================================================== --- trunk/src/mainboard/amd/pistachio/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/pistachio/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -36,8 +36,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/amd/rumba/romstage.c ============================================================================== --- trunk/src/mainboard/amd/rumba/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/rumba/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -5,7 +5,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/amd/serengeti_cheetah/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/serengeti_cheetah/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -29,8 +29,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include <reset.h> Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -47,8 +47,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "console/console.c" -#include "pc80/serial.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> #include "southbridge/amd/amd8111/amd8111_early_smbus.c" Modified: trunk/src/mainboard/amd/tilapia_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/amd/tilapia_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -47,8 +47,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "console/console.c" -#include "pc80/serial.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> #include "northbridge/amd/amdfam10/raminit.h" Modified: trunk/src/mainboard/arima/hdama/romstage.c ============================================================================== --- trunk/src/mainboard/arima/hdama/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/arima/hdama/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -7,8 +7,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/artecgroup/dbe61/romstage.c ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/artecgroup/dbe61/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,8 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/asi/mb_5blgp/romstage.c ============================================================================== --- trunk/src/mainboard/asi/mb_5blgp/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asi/mb_5blgp/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -24,7 +24,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/asi/mb_5blmp/romstage.c ============================================================================== --- trunk/src/mainboard/asi/mb_5blmp/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asi/mb_5blmp/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc87351/pc87351_early_serial.c" Modified: trunk/src/mainboard/asrock/939a785gmh/romstage.c ============================================================================== --- trunk/src/mainboard/asrock/939a785gmh/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asrock/939a785gmh/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -43,8 +43,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/asus/a8n_e/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8n_e/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/a8n_e/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -48,8 +48,7 @@ #define CK804_NUM 1 #include <cpu/amd/model_fxx_rev.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/nvidia/ck804/ck804_early_smbus.c" Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/a8v-e_se/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/a8v-e_se/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -46,8 +46,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c ============================================================================== --- trunk/src/mainboard/asus/m2v-mx_se/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -51,8 +51,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" Modified: trunk/src/mainboard/asus/mew-am/romstage.c ============================================================================== --- trunk/src/mainboard/asus/mew-am/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/mew-am/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" Modified: trunk/src/mainboard/asus/mew-vm/romstage.c ============================================================================== --- trunk/src/mainboard/asus/mew-vm/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/mew-vm/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c" #include "northbridge/intel/i82810/raminit.h" Modified: trunk/src/mainboard/asus/p2b-d/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-d/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p2b-d/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -27,7 +27,7 @@ #include <stdlib.h> #include <cpu/x86/lapic.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/asus/p2b-ds/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-ds/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p2b-ds/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -27,7 +27,7 @@ #include <stdlib.h> #include <cpu/x86/lapic.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/asus/p2b-f/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-f/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p2b-f/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/asus/p2b-ls/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b-ls/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p2b-ls/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/asus/p2b/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p2b/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p2b/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/asus/p3b-f/romstage.c ============================================================================== --- trunk/src/mainboard/asus/p3b-f/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/asus/p3b-f/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/axus/tc320/romstage.c ============================================================================== --- trunk/src/mainboard/axus/tc320/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/axus/tc320/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" Modified: trunk/src/mainboard/azza/pt-6ibd/romstage.c ============================================================================== --- trunk/src/mainboard/azza/pt-6ibd/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/azza/pt-6ibd/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/bcom/winnet100/romstage.c ============================================================================== --- trunk/src/mainboard/bcom/winnet100/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/bcom/winnet100/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" Modified: trunk/src/mainboard/bcom/winnetp680/romstage.c ============================================================================== --- trunk/src/mainboard/bcom/winnetp680/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/bcom/winnetp680/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,8 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/biostar/m6tba/romstage.c ============================================================================== --- trunk/src/mainboard/biostar/m6tba/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/biostar/m6tba/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/broadcom/blast/romstage.c ============================================================================== --- trunk/src/mainboard/broadcom/blast/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/broadcom/blast/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -13,8 +13,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c ============================================================================== --- trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/dell/s1850/romstage.c ============================================================================== --- trunk/src/mainboard/dell/s1850/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/dell/s1850/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" Modified: trunk/src/mainboard/digitallogic/adl855pc/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/digitallogic/adl855pc/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,8 +8,7 @@ #include <stdlib.h> #include "pc80/udelay_io.c" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801dx/i82801dx.h" #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c" Modified: trunk/src/mainboard/digitallogic/msm586seg/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm586seg/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/digitallogic/msm586seg/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -6,7 +6,7 @@ #include <arch/hlt.h> #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" //#include "lib/delay.c" Modified: trunk/src/mainboard/digitallogic/msm800sev/romstage.c ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/digitallogic/msm800sev/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -4,8 +4,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/eaglelion/5bcm/romstage.c ============================================================================== --- trunk/src/mainboard/eaglelion/5bcm/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/eaglelion/5bcm/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -6,7 +6,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" //#include "southbridge/intel/i440bx/i440bx_early_smbus.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" Modified: trunk/src/mainboard/emulation/qemu-x86/romstage.c ============================================================================== --- trunk/src/mainboard/emulation/qemu-x86/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/emulation/qemu-x86/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" Modified: trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/gigabyte/ga-6bxc/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/gigabyte/ga_2761gxdk/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -53,8 +53,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c ============================================================================== --- trunk/src/mainboard/gigabyte/m57sli/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/gigabyte/m57sli/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -51,8 +51,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c ============================================================================== --- trunk/src/mainboard/hp/dl145_g3/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/hp/dl145_g3/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -57,8 +57,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c ============================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" /* TODO: It's a PC87364 actually! */ #include "superio/nsc/pc87360/pc87360_early_serial.c" Modified: trunk/src/mainboard/ibm/e325/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e325/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/ibm/e325/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/ibm/e326/romstage.c ============================================================================== --- trunk/src/mainboard/ibm/e326/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/ibm/e326/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/iei/juki-511p/romstage.c ============================================================================== --- trunk/src/mainboard/iei/juki-511p/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iei/juki-511p/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83977f/w83977f_early_serial.c" #include "southbridge/amd/cs5530/cs5530_enable_rom.c" Modified: trunk/src/mainboard/iei/nova4899r/romstage.c ============================================================================== --- trunk/src/mainboard/iei/nova4899r/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iei/nova4899r/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83977tf/w83977tf_early_serial.c" #include "southbridge/amd/cs5530/cs5530_enable_rom.c" Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c ============================================================================== --- trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iei/pcisa-lx-800-r10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -23,8 +23,7 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -37,8 +37,6 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#include "pc80/serial.c" -#include "console/console.c" #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG_DIRECT Modified: trunk/src/mainboard/intel/eagleheights/romstage.c ============================================================================== --- trunk/src/mainboard/intel/eagleheights/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/eagleheights/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -32,8 +32,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/x86/bist.h> #include "lib/ramtest.c" Modified: trunk/src/mainboard/intel/jarrell/romstage.c ============================================================================== --- trunk/src/mainboard/intel/jarrell/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/jarrell/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" Modified: trunk/src/mainboard/intel/mtarvon/romstage.c ============================================================================== --- trunk/src/mainboard/intel/mtarvon/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/mtarvon/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -28,7 +28,7 @@ #include <cpu/x86/lapic.h> #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i3100/i3100_early_smbus.c" #include "southbridge/intel/i3100/i3100_early_lpc.c" Modified: trunk/src/mainboard/intel/truxton/romstage.c ============================================================================== --- trunk/src/mainboard/intel/truxton/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/truxton/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -29,7 +29,7 @@ #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" #include "pc80/udelay_io.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i3100/i3100_early_smbus.c" #include "southbridge/intel/i3100/i3100_early_lpc.c" Modified: trunk/src/mainboard/intel/xe7501devkit/romstage.c ============================================================================== --- trunk/src/mainboard/intel/xe7501devkit/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/intel/xe7501devkit/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,7 +9,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8_htx/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iwill/dk8_htx/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -29,8 +29,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8s2/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iwill/dk8s2/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -29,8 +29,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/iwill/dk8x/romstage.c ============================================================================== --- trunk/src/mainboard/iwill/dk8x/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/iwill/dk8x/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -29,8 +29,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/jetway/j7f24/romstage.c ============================================================================== --- trunk/src/mainboard/jetway/j7f24/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/jetway/j7f24/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,8 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -46,8 +46,6 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#include "pc80/serial.c" -#include "console/console.c" #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG_DIRECT Modified: trunk/src/mainboard/kontron/kt690/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/kt690/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/kontron/kt690/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -43,8 +43,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/lippert/frontrunner/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/frontrunner/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/lippert/frontrunner/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -5,7 +5,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/lippert/roadrunner-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/lippert/roadrunner-lx/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -27,8 +27,7 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/lippert/spacerunner-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/lippert/spacerunner-lx/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -28,8 +28,7 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/mitac/6513wu/romstage.c ============================================================================== --- trunk/src/mainboard/mitac/6513wu/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/mitac/6513wu/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" Modified: trunk/src/mainboard/msi/ms6119/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6119/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms6119/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/msi/ms6147/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6147/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms6147/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/msi/ms6156/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6156/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms6156/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/msi/ms6178/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6178/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms6178/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "northbridge/intel/i82810/raminit.h" Modified: trunk/src/mainboard/msi/ms7135/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7135/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms7135/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -50,8 +50,7 @@ #define CK804_USE_ACI 1 #include <cpu/amd/model_fxx_rev.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/nvidia/ck804/ck804_early_smbus.c" Modified: trunk/src/mainboard/msi/ms7260/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms7260/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms7260/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -55,8 +55,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/msi/ms9185/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9185/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms9185/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -49,8 +49,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" Modified: trunk/src/mainboard/msi/ms9282/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9282/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms9282/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -44,8 +44,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -45,8 +45,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/nec/powermate2000/romstage.c ============================================================================== --- trunk/src/mainboard/nec/powermate2000/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/nec/powermate2000/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "northbridge/intel/i82810/raminit.h" Modified: trunk/src/mainboard/newisys/khepri/romstage.c ============================================================================== --- trunk/src/mainboard/newisys/khepri/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/newisys/khepri/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -14,8 +14,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/nokia/ip530/romstage.c ============================================================================== --- trunk/src/mainboard/nokia/ip530/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/nokia/ip530/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/nvidia/l1_2pvv/romstage.c ============================================================================== --- trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/nvidia/l1_2pvv/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -51,8 +51,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/olpc/btest/romstage.c ============================================================================== --- trunk/src/mainboard/olpc/btest/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/olpc/btest/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -5,7 +5,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/olpc/rev_a/romstage.c ============================================================================== --- trunk/src/mainboard/olpc/rev_a/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/olpc/rev_a/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -5,7 +5,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/pcengines/alix1c/romstage.c ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/pcengines/alix1c/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -24,8 +24,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" Modified: trunk/src/mainboard/rca/rm4100/romstage.c ============================================================================== --- trunk/src/mainboard/rca/rm4100/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/rca/rm4100/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,9 +25,8 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" #include "pc80/udelay_io.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "northbridge/intel/i82830/raminit.h" Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -39,8 +39,6 @@ #include "pc80/mc146818rtc_early.c" #include <console/console.h> -#include "pc80/serial.c" -#include "console/console.c" #include <cpu/x86/bist.h> #if CONFIG_USBDEBUG_DIRECT Modified: trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c ============================================================================== --- trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/sunw/ultra40/romstage.c ============================================================================== --- trunk/src/mainboard/sunw/ultra40/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/sunw/ultra40/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -16,8 +16,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/supermicro/h8dme/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dme/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/h8dme/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -46,8 +46,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/supermicro/h8dmr/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/h8dmr/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -49,8 +49,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -44,8 +44,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -44,8 +44,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dai_g/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" #include "lib/delay.c" Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "pc80/udelay_io.c" #include "lib/delay.c" Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,7 +8,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" #include "northbridge/intel/e7520/raminit.h" Modified: trunk/src/mainboard/technexion/tim5690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim5690/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/technexion/tim5690/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -42,8 +42,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/technexion/tim8690/romstage.c ============================================================================== --- trunk/src/mainboard/technexion/tim8690/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/technexion/tim8690/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -42,8 +42,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/raminit.h" Modified: trunk/src/mainboard/technologic/ts5300/romstage.c ============================================================================== --- trunk/src/mainboard/technologic/ts5300/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/technologic/ts5300/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -12,7 +12,7 @@ #include <arch/hlt.h> #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/televideo/tc7020/romstage.c ============================================================================== --- trunk/src/mainboard/televideo/tc7020/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/televideo/tc7020/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -25,7 +25,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/amd/gx1/raminit.c" #include "superio/nsc/pc97317/pc97317_early_serial.c" Modified: trunk/src/mainboard/thomson/ip1000/romstage.c ============================================================================== --- trunk/src/mainboard/thomson/ip1000/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/thomson/ip1000/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,9 +26,8 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <arch/llshell.h> -#include "pc80/serial.c" #include "pc80/udelay_io.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "northbridge/intel/i82830/raminit.h" Modified: trunk/src/mainboard/tyan/s1846/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s1846/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s1846/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,7 +26,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" Modified: trunk/src/mainboard/tyan/s2735/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2735/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2735/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,8 +8,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c" Modified: trunk/src/mainboard/tyan/s2850/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2850/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2850/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2875/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2875/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2875/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2880/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2880/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2881/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2881/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2881/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -13,8 +13,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2882/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2882/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2885/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2885/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2885/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,8 +8,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2891/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2891/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2891/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -14,8 +14,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2892/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2892/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2892/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -14,8 +14,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s2895/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2895/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2895/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -15,8 +15,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/incoherent_ht.c" Modified: trunk/src/mainboard/tyan/s2912/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2912/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -51,8 +51,7 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -45,8 +45,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" #include "pc80/usbdebug_direct_serial.c" Modified: trunk/src/mainboard/tyan/s4880/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4880/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s4880/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -9,8 +9,7 @@ #include <stdlib.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/tyan/s4882/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s4882/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/tyan/s4882/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -8,8 +8,7 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> Modified: trunk/src/mainboard/via/epia-cn/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-cn/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/epia-cn/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,8 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/epia-m/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/epia-m/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -7,7 +7,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/vt8623/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/epia-m700/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-m700/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/epia-m700/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -33,8 +33,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/vx800/vx800.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/epia-n/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia-n/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/epia-n/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -27,7 +27,7 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn400/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/epia/romstage.c ============================================================================== --- trunk/src/mainboard/via/epia/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/epia/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -6,7 +6,7 @@ #include <arch/hlt.h> #include <stdlib.h> #include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/vt8601/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/pc2500e/romstage.c ============================================================================== --- trunk/src/mainboard/via/pc2500e/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/pc2500e/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -27,8 +27,7 @@ #include <arch/hlt.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cn700/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/src/mainboard/via/vt8454c/romstage.c ============================================================================== --- trunk/src/mainboard/via/vt8454c/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/via/vt8454c/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -26,8 +26,7 @@ #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "northbridge/via/cx700/raminit.h" #include "cpu/x86/bist.h" Modified: trunk/src/mainboard/winent/pl6064/romstage.c ============================================================================== --- trunk/src/mainboard/winent/pl6064/romstage.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/mainboard/winent/pl6064/romstage.c Sat May 8 11:14:51 2010 (r5528) @@ -20,12 +20,12 @@ */ #include <stdint.h> +#include <stdlib.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> #include <arch/hlt.h> -#include "pc80/serial.c" -#include "console/console.c" +#include <console/console.h> #include "lib/ramtest.c" #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" @@ -33,7 +33,6 @@ #include <cpu/amd/geode_post_code.h> #include "southbridge/amd/cs5536/cs5536.h" -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #include "southbridge/amd/cs5536/cs5536_early_smbus.c" Modified: trunk/src/pc80/Makefile.inc ============================================================================== --- trunk/src/pc80/Makefile.inc Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/pc80/Makefile.inc Sat May 8 11:14:51 2010 (r5528) @@ -4,7 +4,7 @@ obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o -#initobj-y += serial.o +initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o subdirs-y += vga $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H) Modified: trunk/src/pc80/serial.c ============================================================================== --- trunk/src/pc80/serial.c Thu May 6 21:32:12 2010 (r5527) +++ trunk/src/pc80/serial.c Sat May 8 11:14:51 2010 (r5528) @@ -1,4 +1,5 @@ #include <lib.h> /* Prototypes */ +#include <arch/io.h> /* Base Address */ #ifndef CONFIG_TTYS0_BASE

1 0

PATCH: model_6bx CPUs can go in a lot of places
by Keith Hui 08 May '10

08 May '10

Hi all, Intel model 6bx CPUs (specifically 6B1 and 6B4) can end up in a lot of places, specifically Slot 1 and Socket 370. Ever since references to them were removed from cpu/intel/model_6xx my coreboot would die when initializing CPU with a "Unknown cpu" error. This patch fixes it by adding references to model_6bx to cpu/intel/slot_1 and cpu/intel/socket_PGA370. Also included are before and after boot logs with relevant sections highlighted. Before boot log: http://coreboot.pastebin.com/CGWgihaG After boot log: http://coreboot.pastebin.com/GLgnpZT6 Signed-off-by: Keith Hui <buurin(a)gmail.com> ----- Begin patch ----- Index: src/cpu/intel/slot_1/Makefile.inc =================================================================== --- src/cpu/intel/slot_1/Makefile.inc (revision 5527) +++ src/cpu/intel/slot_1/Makefile.inc (working copy) @@ -20,6 +20,7 @@ obj-y += slot_1.o subdirs-y += ../model_6xx +subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic Index: src/cpu/intel/socket_PGA370/Makefile.inc =================================================================== --- src/cpu/intel/socket_PGA370/Makefile.inc (revision 5527) +++ src/cpu/intel/socket_PGA370/Makefile.inc (working copy) @@ -20,6 +20,7 @@ obj-y += socket_PGA370.o subdirs-y += ../model_6xx +subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic ----- End patch -----

3 5

AMD CAR II
by Rudolf Marek 07 May '10

07 May '10

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi all, I examined a bit how does it works. Maybe if one can read this http://en.wikipedia.org/wiki/CPU_cache and then continue here :) I was particularly curious because we do writeback - writeback copy of data from CAR to ram (to copy stack and sysinfo, which must cause L1 evictions), and also we do DQS memory training (which writes to RAM during CAR) and we use cache to cache ROM too. This means not only L1 is used but we must be using L2 too. Here are some notes why I think it works :) Here is what I found: AMD L2 cache is exclusive, it means it only contains data evicted from L1 caches. In other words there is never same data in both caches. I could not find any info if it is valid for the Icache too. If the icache gets moved to L2 or not. It should but it does not seem to happen during CAR. L1 Data cache: Size: 64Kb 2-way associative. lines per tag=1 line size=64 bytes. L1 Instruction cache: Size: 64Kb 2-way associative. lines per tag=1 line size=64 bytes. 512KB/core L2 cache: Size: 1024Kb 16-way associative. lines per tag=1 line size=64 bytes. Here is basic math how to calculate cache organization: line size => tells how many bytes are stored in one cache line (exploits the spatial locality of data). Here it is 64 bytes so bits of address 5:0 are used. Index: it tells how many cache lines do we have. The level of associativity tells how many addresses which compete for same index can be stored in cache simultaneously. For L1 we have: 64*1024 / 64 / 2 = 512 is the number of cache lines. We have 2 (assoc is 2) "arrays" each has 64 bytes/per line and total size is 64KB. The index is therefore on addresses 14:6. The rest of address is used as tag (tag identifies the actual location of data in memory together with the cache line index) One can say each 14:0 bit of address compete for same index. We have asoc level of 2 so each 16 bits of addr will fill whole cache. For L2 here it is 512KB assoc is 16. We have 32KB / 64 indexes = 512 (lines) so addresses 14:6 build up the index. Rest is tag. The CAR idea on AMD is just to use it and never cause an eviction from L2 cache to main memory (which is not functioning). Step 0) enable cache and WB mtrrs for any ranges 1) all lines are invalid, validate them by dummy read exactly as big as max L1 cache. For instruction cache enough is a instr fetch. 2) The dummy read region can be now used to store data - it is simply an arbitrary address range 0-64KB max. 3) caching of ROM works too because: a) MTRR for rom is set (currently only for part of it) it could be WP type but we use WB, no harm here because we do not modify any code ;) b) L1 instruction cache is filled from flash chip directly (remember L2 is exclusive cache on AMD) c) if L1 instr cache is not evicted into L2 then on cache miss it L1 line is simply invalidated and refilled from flash rom. I tried to check this using performance counters but there is not a counter for this. This is uninteresting case because it does not complicate anything. c) if L1 instr cache gets evicted into L2, (which I dont know if is true), then we can run into following I) no L1 data cache lines was evicted into L2 - again not interesting case because nothing gets wrong. II) we have some L1 data cache evicted into L2. This really happens in our CAR! print_debug("Copying data from cache to RAM -- switching to use RAM as stack..."); memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); It happens here because we do copy from CAR region to RAM while CAR is still running. Both regions are WB so we must evict some L1 cache lines for sure, and performance counters confirm this. You may say this is not an issue because RAM is running normally, but for example while we resume from S3 we cannot overwrite random memory with out CAR... I think this evictions so far happens only here and still things works nice here is why: We have at most 64KB or dirty data, we can spread it into L2 nicely and still have a lot of free space even on systems where we have 128KB L2. In this case no evictions into system because we can have the data still in L2. Now lets go back, what if CPU instruction cache gets evicted into L2? Here it would cause problems because in L2 would be L1 data cache data and random L1 instr cache code competing for the space. I think here it works because dirty data is evicted with lowest priority. I think if all lanes of cache are full, the lane with "clean" data is invalidated first. This saves the day for us because it guarantees that our L1 data will not fall off the cache never ever - only if we exceed the L2 cache size with dirty data. We examined so far the ROM caching and oversized L1 handling. But the memory training uses writes to not yet initialized RAM. How it works here? I checked and the memory write uses the instruction which bypasses caches. The read uses cache, but it invalidates the cache line afterwards. Again because we have at most L1size of dirty data and L2 is big enough it does not spoil the party and no stuff gets evicted back to non functioning memory. Last thing which worries me are speculated fills which can be do by CPU. I think they are disabled because the bit for proble FILLs is 0. The fam11 which has better documented L2 for general storage needs to have some other bits toggled not to do some extra speculations. Fam 10h describes only L1 car and older fams also the L1 only CAR. In our code we practically use L2 in all cases. What we could do is to program a performance counter for L2 writebacks to system at the beginning of CAR and in CAR disable check if it is still zero. This will tell if we did something nasty. We could also avoid the WB-WB copy of the CAR area. I tried with WB-UC copy and we have then 0 evictions from L1 which is fine (i did some experiments in January see AMD CAR questions email). Uhh its long email took like hour to write, please tell if you think that it works really this way. Thanks, Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAkvkV60ACgkQ3J9wPJqZRNXaYgCglBFGuv2PtaR7yI/xxpVgvFBu vjwAn1ZPp1AArEih9CyO1T44tz/o97LR =ce4w -----END PGP SIGNATURE-----

3 2

← Newer
1
...
23
24
25
26
27
28
29
30
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot May 2010