coreboot October 2010

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[commit] r5950 - in trunk/src/cpu/intel: . model_67x model_6xx slot_1
by repository service 13 Oct '10

13 Oct '10

Author: uwe Date: Wed Oct 13 19:00:42 2010 New Revision: 5950 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5950 Log: Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x. abuild-tested. Boot tested on P2B-LS. Signed-off-by: Keith Hui <buurin(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Added: trunk/src/cpu/intel/model_67x/ trunk/src/cpu/intel/model_67x/Kconfig trunk/src/cpu/intel/model_67x/Makefile.inc trunk/src/cpu/intel/model_67x/microcode-293-MU267114.h trunk/src/cpu/intel/model_67x/microcode-530-MU16730e.h trunk/src/cpu/intel/model_67x/microcode-531-MU26732e.h trunk/src/cpu/intel/model_67x/microcode-539-MU167210.h trunk/src/cpu/intel/model_67x/microcode-540-MU267238.h trunk/src/cpu/intel/model_67x/model_67x_init.c Modified: trunk/src/cpu/intel/Kconfig trunk/src/cpu/intel/model_6xx/model_6xx_init.c trunk/src/cpu/intel/slot_1/Makefile.inc Modified: trunk/src/cpu/intel/Kconfig ============================================================================== --- trunk/src/cpu/intel/Kconfig Wed Oct 13 10:21:44 2010 (r5949) +++ trunk/src/cpu/intel/Kconfig Wed Oct 13 19:00:42 2010 (r5950) @@ -1,5 +1,6 @@ # CPU models source src/cpu/intel/model_6xx/Kconfig +source src/cpu/intel/model_67x/Kconfig source src/cpu/intel/model_68x/Kconfig source src/cpu/intel/model_69x/Kconfig source src/cpu/intel/model_6bx/Kconfig Added: trunk/src/cpu/intel/model_67x/Kconfig ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/Kconfig Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,3 @@ +config CPU_INTEL_MODEL_67X + bool + select SMP Added: trunk/src/cpu/intel/model_67x/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/Makefile.inc Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2010 Keith Hui <buurin(a)gmail.com> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +driver-y += model_67x_init.c + Added: trunk/src/cpu/intel/model_67x/microcode-293-MU267114.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/microcode-293-MU267114.h Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,163 @@ +//+++ +// Copyright (c) <1995-2010>, Intel Corporation. +// All rights reserved. +// +// Redistribution. Redistribution and use in binary form, without modification, are +// permitted provided that the following conditions are met: +// .Redistributions must reproduce the above copyright notice and the following +// disclaimer in the documentation and/or other materials provided with the +// distribution. +// .Neither the name of Intel Corporation nor the names of its suppliers may be used +// to endorse or promote products derived from this software without specific prior +// written permission. +// .No reverse engineering, decompilation, or disassembly of this software is +// permitted. +// ."Binary form" includes any format commonly used for electronic conveyance +// which is a reversible, bit-exact translation of binary representation to ASCII or +// ISO text, for example, "uuencode." +// +// DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER +// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//--- +/* Tue Feb 9 12:54:50 CST 2010 */ +/* 293-mu267114.inc */ +0x00000001, 0x00000014, 0x08111998, 0x00000671, +0x83239dd8, 0x00000001, 0x00000004, 0x00000000, +0x00000000, 0x00000000, 0x00000000, 0x00000000, +0x2900aa36, 0xedef91d1, 0x980381b8, 0x990ac1a8, +0xce6aee27, 0xcd579679, 0x93340485, 0xb4ffaf67, +0x2a528bc7, 0x5cf526ec, 0x0ffd39bb, 0x6536a335, +0x3996f969, 0x2976103e, 0x2bf45e9c, 0x19cce6b8, +0xc3a599da, 0x41442e0c, 0x7d60efcf, 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============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/microcode-530-MU16730e.h Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,163 @@ +//+++ +// Copyright (c) <1995-2010>, Intel Corporation. +// All rights reserved. +// +// Redistribution. Redistribution and use in binary form, without modification, are +// permitted provided that the following conditions are met: +// .Redistributions must reproduce the above copyright notice and the following +// disclaimer in the documentation and/or other materials provided with the +// distribution. +// .Neither the name of Intel Corporation nor the names of its suppliers may be used +// to endorse or promote products derived from this software without specific prior +// written permission. +// .No reverse engineering, decompilation, or disassembly of this software is +// permitted. +// ."Binary form" includes any format commonly used for electronic conveyance +// which is a reversible, bit-exact translation of binary representation to ASCII or +// ISO text, for example, "uuencode." +// +// DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER +// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//--- +/* Tue Feb 9 12:54:50 CST 2010 */ +/* 530-mu16730e.inc */ +0x00000001, 0x0000000e, 0x09101999, 0x00000673, +0xf64116d1, 0x00000001, 0x00000001, 0x00000000, +0x00000000, 0x00000000, 0x00000000, 0x00000000, +0xd008ea9a, 0x90d1fc1b, 0x08e139ca, 0x3f54f83b, +0x6985ceca, 0xa832ab46, 0x5f54c319, 0x2a2aad6a, +0x82af41e6, 0xb946820b, 0x273d0f0b, 0x5f2b4860, +0x22fb8bf0, 0x09d64919, 0xe5ef5108, 0xd5be0718, +0xc20c175c, 0x90849d77, 0x9cb5ae2c, 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+0x3e586469, 0xd9b7630a, 0xb88f9e44, 0x0cda6f4d, +0xe5bf5844, 0x8709f788, 0xdae37da6, 0x1fb41777, +0x1d903f69, 0x34383b69, 0xd409ae70, 0xd1c99758, +0xdedfd7a4, 0xa4bdf018, 0xf4058202, 0x8565d66f, +0x5365aed9, 0xfa69742e, 0x2cfbfbcf, 0x88a00b60, +0x506c0713, 0x2866475b, 0x3e1df573, 0xb86f7feb, +0x31d23a7f, 0xc6320e6a, 0x3ebbc2a5, 0x83a1d4ef, +0x15169f5f, 0x42a61753, 0x893e553e, 0x4ddbc66d, +0x7449ec1f, 0x76f65d22, 0x0622e13b, 0x32986f89, +0x21181b4b, 0x99a80c0a, 0xd6fe00b0, 0x282c0e81, +0x9fc1cf88, 0x919b855d, 0x618257d8, 0x82c448b8, +0xe22537a1, 0xa90de388, 0xba73b90c, 0xd765eeb0, +0x62b2727e, 0xa08dfe20, 0x70b3c8c5, 0x3ef04007, +0x9f73732b, 0x2201edd7, 0xb836219c, 0xf913af7c, +0xf50f64ca, 0x93ac107a, 0xf509f84a, 0x6f6026f6, +0xd9bb8eac, 0x4b268cfa, 0xa65a3fa6, 0x9837cb75, +0x784fb835, 0x2060576d, 0xb1604cae, 0xb9da4116, +0xab320cf2, 0x60a1b501, 0x0c73fa79, 0x8d5a6f1e, +0x57688086, 0x218e4005, 0xca054e3d, 0xc1a3c3ec, Added: trunk/src/cpu/intel/model_67x/microcode-531-MU26732e.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/microcode-531-MU26732e.h Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,163 @@ +//+++ +// Copyright (c) <1995-2010>, Intel Corporation. +// All rights reserved. +// +// Redistribution. Redistribution and use in binary form, without modification, are +// permitted provided that the following conditions are met: +// .Redistributions must reproduce the above copyright notice and the following +// disclaimer in the documentation and/or other materials provided with the +// distribution. +// .Neither the name of Intel Corporation nor the names of its suppliers may be used +// to endorse or promote products derived from this software without specific prior +// written permission. +// .No reverse engineering, decompilation, or disassembly of this software is +// permitted. +// ."Binary form" includes any format commonly used for electronic conveyance +// which is a reversible, bit-exact translation of binary representation to ASCII or +// ISO text, for example, "uuencode." +// +// DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER +// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//--- +/* Tue Feb 9 12:54:50 CST 2010 */ +/* 531-mu26732e.inc */ +0x00000001, 0x0000002e, 0x09101999, 0x00000673, +0xa5945abf, 0x00000001, 0x00000004, 0x00000000, +0x00000000, 0x00000000, 0x00000000, 0x00000000, +0x608ab600, 0x7653aba3, 0x90cf06df, 0x2cb405de, +0xe4c59cfb, 0xe6c669e7, 0x3aa728ba, 0x83d3111f, +0x892fc321, 0x2566fbdb, 0x8c37ee68, 0xbfbe902e, +0x58c979b3, 0xe18b8acb, 0x8d0d319d, 0x4b0ed465, +0xf4f644f7, 0x847da89c, 0x587df5fd, 0xa3aed418, +0xb8b811cb, 0x0330bc99, 0xe8167486, 0xa00d6d3a, +0x77bfa90d, 0xbaa76e96, 0xf9098d1c, 0x3320799a, +0xcf8409f1, 0xe176caa8, 0x4f0319a8, 0xb4952500, +0x967781c1, 0x63834cab, 0xc6e650d3, 0xed9dd97c, +0x3007ef9a, 0xa4fe2c6e, 0xf45fe99e, 0x6b3e6506, +0xf2cdd2f3, 0xb59c79c9, 0x14c6ed40, 0xa5148f5d, +0xf5fde82e, 0x3bcfe380, 0xd4530539, 0xf29c478b, +0x0783cd9f, 0x804ce845, 0xb9f62a6c, 0x2ae018f8, +0xd7c42c7d, 0xe2106e84, 0x0954ef6e, 0xbdf3275f, +0x96d8f3a3, 0x127c0bfc, 0x9b459637, 0xae1c6dbc, +0x52986367, 0x8ce39f67, 0x9460054a, 0x012da826, +0xe6a663f5, 0x9b7d890e, 0x7954aa8e, 0xc92ef63b, +0xbfe64a51, 0x7ad32697, 0xa42480dc, 0xd904d833, +0x7e8fc827, 0xeab91ad0, 0x869b7a18, 0x496c1157, +0xd07db5d6, 0xc4befd10, 0x692303f2, 0xb7219baf, +0xaf54123f, 0x7def51a2, 0xb284536c, 0xd67c0f8f, +0x02b5ed18, 0xbccb127d, 0x92139fc2, 0x1e70a3fb, +0x84fde186, 0xe3e678e4, 0x3f04793d, 0xefbfd6e5, +0xce8eb13f, 0x60c77646, 0x966d3b7b, 0xc3e7a620, +0x4447e93c, 0x8f604fc1, 0x91c17b22, 0x7f232650, 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0x5198702c, 0x3e3458b7, +0x0b1ce9a1, 0x51b1bd7f, 0x711e791e, 0x927d8bed, +0x91dbaea9, 0x7eefbda9, 0x7a19edd9, 0xdf7b8dce, +0x5bb40613, 0x0b0c1e0f, 0x85b82c98, 0x18da4dc1, +0xc5fd78ac, 0x57c1e31d, 0x4c4001b5, 0xe31d2643, +0xa6afbf58, 0xad200e68, 0xf0114ba4, 0xd6a620f2, +0xc753a720, 0xac9022a0, 0x28a41f01, 0x22a4ba95, +0xc00b7531, 0x23d42795, 0xcd836a86, 0x90262708, +0x3292cad0, 0x40022e39, 0xc1581b0a, 0xe5101550, +0x6538096b, 0x208c549d, 0x3ce2bf88, 0xa71df38e, +0x3dec3685, 0xca3949f1, 0x79f3ad1b, 0x3ee8b300, +0x9d305fc6, 0x7a2e5288, 0xbe81a2f2, 0x7ada0c06, +0x191c7f01, 0x58dfcbd1, 0xc78dee72, 0x72364226, +0x1866de12, 0x8d22305c, 0x943a0f0e, 0xc81967ff, +0x4d55fb0f, 0xaf199be1, 0x90bbda61, 0x4e7c234f, +0x90cfec16, 0x9b4bcf26, 0x21622023, 0x0926f0fa, +0x1d504377, 0xa58db427, 0x8d93ce2b, 0x90bfe900, +0x29e67397, 0x2c1261ed, 0x4ace9474, 0xd5c60282, +0xe53fb300, 0x8a61a0ab, 0xa7aa0918, 0x4389d7c5, +0xd09d605c, 0x6c5bedb5, 0xd6d54c51, 0x433dea21, +0x7ad9e677, 0x813bff76, 0x5a162c75, 0x1ee0661f, +0x9b6c2030, 0x8e8dc989, 0xcd4bc9fc, 0x4454675b, +0x8d583c9c, 0xe3400094, 0x116ebb83, 0xe847bc9a, +0x2a4622dd, 0x2a901e6f, 0xd789b1c0, 0x094e2bbb, +0x056e563f, 0x9f17e606, 0x8bc79b8d, 0xd2c535c1, +0x06a45a27, 0x9dc56771, 0xa06649e2, 0x5ff25ac8, +0x6554961e, 0x98e583d9, 0x38ba93da, 0xdee1de18, +0x037cb9d5, 0x6b17f195, 0x3431faaf, 0x13860a0d, +0x28bca10d, 0x0a54c011, 0x9957cdb6, 0x3aa1f429, +0x9d41b7b3, 0x9aea5be2, 0x60c7ce6b, 0x4cd1c10b, +0x24ddddcd, 0xe28412ba, 0xa03a5466, 0xa1896879, +0x59edcb87, 0x1b241765, 0x157bf161, 0xf219f950, +0xe86ff526, 0x262005d9, 0x11769531, 0xbca15d95, +0x28f5ef17, 0x1f27e725, 0xc32631d2, 0x07249e61, +0x1ba851e3, 0x4f49b577, 0xe2a1df5e, 0x826fa7ff, +0xc34e1e2e, 0x7fe26024, 0xbc19800f, 0x0d368dc9, +0xe03da0c6, 0xadaa4f9c, 0x9ad1e43c, 0x96f84e44, +0x0b6cd695, 0x1bb46971, 0x942d6e5b, 0x6316170d, +0x3164509f, 0xc6659450, 0xb2a0370a, 0xabc208e8, +0x6d479811, 0x3684bc0e, 0x80b7b101, 0xa50b7bb5, +0x43d21233, 0xb423559d, 0xf41dcd16, 0xdfd3c276, +0x3e586469, 0xd9b7630a, 0xb88f9e44, 0x0cda6f4d, +0xe5bf5844, 0x8709f788, 0xdae37da6, 0x1fb41777, +0x1d903f69, 0x34383b69, 0xd409ae70, 0xd1c99758, +0xdedfd7a4, 0xa4bdf018, 0xf4058202, 0x8565d66f, +0x5365aed9, 0xfa69742e, 0x2cfbfbcf, 0x88a00b60, +0x506c0713, 0x2866475b, 0x3e1df573, 0xb86f7feb, +0x31d23a7f, 0xc6320e6a, 0x3ebbc2a5, 0x83a1d4ef, +0x15169f5f, 0x42a61753, 0x893e553e, 0x4ddbc66d, +0x7449ec1f, 0x76f65d22, 0x0622e13b, 0x32986f89, +0x21181b4b, 0x99a80c0a, 0xd6fe00b0, 0x282c0e81, +0x9fc1cf88, 0x919b855d, 0x618257d8, 0x82c448b8, +0xe22537a1, 0xa90de388, 0xba73b90c, 0xd765eeb0, +0x62b2727e, 0xa08dfe20, 0x70b3c8c5, 0x3ef04007, +0x9f73732b, 0x2201edd7, 0xb836219c, 0xf913af7c, +0xf50f64ca, 0x93ac107a, 0xf509f84a, 0x6f6026f6, +0xd9bb8eac, 0x4b268cfa, 0xa65a3fa6, 0x9837cb75, +0x784fb835, 0x2060576d, 0xb1604cae, 0xb9da4116, +0xab320cf2, 0x60a1b501, 0x0c73fa79, 0x8d5a6f1e, +0x57688086, 0x218e4005, 0xca054e3d, 0xc1a3c3ec, Added: trunk/src/cpu/intel/model_67x/microcode-539-MU167210.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/microcode-539-MU167210.h Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,163 @@ +//+++ +// Copyright (c) <1995-2010>, Intel Corporation. +// All rights reserved. +// +// Redistribution. Redistribution and use in binary form, without modification, are +// permitted provided that the following conditions are met: +// .Redistributions must reproduce the above copyright notice and the following +// disclaimer in the documentation and/or other materials provided with the +// distribution. +// .Neither the name of Intel Corporation nor the names of its suppliers may be used +// to endorse or promote products derived from this software without specific prior +// written permission. +// .No reverse engineering, decompilation, or disassembly of this software is +// permitted. +// ."Binary form" includes any format commonly used for electronic conveyance +// which is a reversible, bit-exact translation of binary representation to ASCII or +// ISO text, for example, "uuencode." +// +// DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER +// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//--- +/* Tue Feb 9 12:54:50 CST 2010 */ +/* 539-mu167210.inc */ +0x00000001, 0x00000010, 0x09221999, 0x00000672, +0x0fc53099, 0x00000001, 0x00000001, 0x00000000, +0x00000000, 0x00000000, 0x00000000, 0x00000000, +0x5880aae8, 0xfaf512a7, 0x94957b73, 0xde532d8d, +0x63486cc5, 0x03c40bc2, 0xfc37b015, 0xa2bb44db, +0x4cee0355, 0x0caf4096, 0x6a27b5f2, 0xa35d5645, +0xd215451c, 0xc44bbcfd, 0x3af5a7ab, 0xdc73f7a9, +0x6c7fd419, 0x730ed02f, 0x0a17f0ac, 0x0ff2cb01, +0x3568e8f9, 0xb66ffb52, 0x5a491384, 0x951e8f0d, +0xbdef7d13, 0x05bf66c7, 0x2eebe2ed, 0x8b3e282d, +0x6d4d2a7e, 0xa90e5a1a, 0x8da2cf30, 0x27a1e9c1, +0x4c213e6e, 0xe706acdd, 0x107f29d4, 0x8dab4326, +0x0c25a3c6, 0x6614b954, 0xd2da266b, 0x2492aec5, +0x23b67a43, 0x1ad8ec74, 0xc626d333, 0xa84fc0af, +0x1fe014b1, 0x7c571487, 0x0bd8f4fd, 0xb40b50f4, +0x96024e3a, 0xb7fb756d, 0x7b178f2e, 0x63f2f5eb, +0x6c4f0df0, 0x4082d795, 0xddc4c133, 0xdd61b9a0, +0x3b771dd0, 0x2ccb5aa9, 0x0ab1540d, 0x27277645, +0xf669cdca, 0x96dc652c, 0xe9b40689, 0x1c6977d7, +0x3668f5e0, 0x44c48a36, 0x5f86dcc4, 0xdd930f89, +0xf518d808, 0xf3bcc771, 0x3b146ab2, 0x6ab0215a, +0x7f8376df, 0x919dd4e5, 0x72af3e92, 0xcd238191, +0x9de0ba0d, 0xc7d99731, 0x3ffdb94a, 0x70a4c322, +0x3263d10b, 0xc9ab0976, 0x42674ccd, 0x291c4988, +0x178e5728, 0x325854d7, 0x1266fed3, 0x68cfa797, +0xb042263c, 0x83fbf8a2, 0xa1e42d77, 0x06f01879, +0xd4ba01b1, 0x43e18410, 0xad7c57c2, 0x929c65d9, +0xb52b0c58, 0x7bfbdfc0, 0x200e489d, 0xa805d3f3, +0x41c7d2a8, 0x8c7e1072, 0x5ad805c1, 0xf337886f, +0x256a5f75, 0x4292408c, 0x62b1aeea, 0xe0155a3e, +0xe9356b4f, 0x92b8123a, 0x69d788f6, 0x147c9899, +0x94ade173, 0xf1639fb9, 0xd27a0263, 0x55c7b9fd, +0xfbf3d168, 0x8b493de9, 0x5b3e6b02, 0xeb7e1730, +0x9a0e99c7, 0x9bb77bbf, 0x44b82682, 0xbea818e3, +0x0aac061a, 0xdfde0f65, 0x1219fe0c, 0x08db086e, +0x984f8dba, 0x64d669a2, 0xcb4a6056, 0xc335ec63, +0x003db584, 0xa2e85d9a, 0x62b5109c, 0x8979f26d, +0x25f87439, 0xda7b4ff9, 0x9b41ceef, 0xb166f52d, +0x3e12f451, 0xe6bc67aa, 0x105e378a, 0x56aa2225, +0x04ee1756, 0x0bf598ec, 0xfd0d75f4, 0xcc87d91d, +0xf3ab70be, 0x5719b2a6, 0x9c1212a7, 0x5bcfd4a7, +0xba07238f, 0x1e4571f4, 0x9e872e9c, 0x74ab36da, +0xc00d1a89, 0x2190f089, 0x12ee646d, 0x2895d335, +0xc3f4c779, 0x0294df2b, 0x6fe754f8, 0xcee161c7, +0x971aa78a, 0x8d067af4, 0x77626aa5, 0xb97bd5f0, +0x71f09e7f, 0x69cd562c, 0xa0893f41, 0x507b7309, +0x3cd26b46, 0x36ce6092, 0x0ae56616, 0x962c4698, +0x0aad0d3d, 0x1b7bfd33, 0x5e3712bb, 0xc66987e7, +0x42428867, 0x614a8b9d, 0xb1d127cb, 0xe5a965c9, +0x56a5a213, 0x240790c8, 0x745c0950, 0x897da696, +0xf65d24bd, 0x2617eea5, 0xd2349c52, 0x39b4fdd7, +0x5dfdfe3f, 0x0c3e4c1a, 0x10db9fc0, 0xf81bbcba, +0x4b5b0e28, 0x767511bd, 0x2b15bb50, 0x0349ec8a, +0x63481733, 0xbb899174, 0xd1065e6a, 0xbfa14024, +0xfaa727db, 0x0021f11b, 0x0a24c0c1, 0x9b55db09, +0x15ba31c5, 0xa972be16, 0x515e3cda, 0xd3d33e51, +0x5d372c14, 0xdd9160e4, 0x7c877e1b, 0x796cdcba, +0xf6faf1bd, 0x77048424, 0xb4ecd723, 0xb672c546, +0xfc152a26, 0x76423bce, 0x8a7a30fc, 0x005b181a, +0x79fc967a, 0x253e1b6c, 0xa947e4c2, 0x1d21ce72, +0x4e1dab59, 0x938eb0f8, 0xb4b0b387, 0x5fb04592, +0x2ee4a528, 0xe2d10729, 0x2f4c5f42, 0x873563ee, +0x838ba96f, 0x4f0239d3, 0xf295395e, 0xb3c38631, +0x7ea7a143, 0x157a4e43, 0x46f8173f, 0xfbc18d4a, +0xc401e17a, 0xc4620358, 0xd2ab5437, 0xa01db06f, +0x58ce91fc, 0x850de1a3, 0x9b542dba, 0xee77f038, +0xddd3ced6, 0xc225d2ce, 0x63a3f765, 0x3342a06c, +0x6a780c2f, 0xfaa925b2, 0x366ebeec, 0xbcc9abea, +0xc7b3fa4e, 0xf4f1123d, 0x5198702c, 0x3e3458b7, +0x0b1ce9a1, 0x51b1bd7f, 0x711e791e, 0x927d8bed, +0x91dbaea9, 0x7eefbda9, 0x7a19edd9, 0xdf7b8dce, +0x5bb40613, 0x0b0c1e0f, 0x85b82c98, 0x18da4dc1, +0xc5fd78ac, 0x57c1e31d, 0x4c4001b5, 0xe31d2643, +0xa6afbf58, 0xad200e68, 0xf0114ba4, 0xd6a620f2, +0xc753a720, 0xac9022a0, 0x28a41f01, 0x22a4ba95, +0xc00b7531, 0x23d42795, 0xcd836a86, 0x90262708, +0x3292cad0, 0x40022e39, 0xc1581b0a, 0xe5101550, +0x6538096b, 0x208c549d, 0x3ce2bf88, 0xa71df38e, +0x3dec3685, 0xca3949f1, 0x79f3ad1b, 0x3ee8b300, +0x9d305fc6, 0x7a2e5288, 0xbe81a2f2, 0x7ada0c06, +0x191c7f01, 0x58dfcbd1, 0xc78dee72, 0x72364226, +0x1866de12, 0x8d22305c, 0x943a0f0e, 0xc81967ff, +0x4d55fb0f, 0xaf199be1, 0x90bbda61, 0x4e7c234f, +0x90cfec16, 0x9b4bcf26, 0x21622023, 0x0926f0fa, +0x1d504377, 0xa58db427, 0x8d93ce2b, 0x90bfe900, +0x29e67397, 0x2c1261ed, 0x4ace9474, 0xd5c60282, +0xe53fb300, 0x8a61a0ab, 0xa7aa0918, 0x4389d7c5, +0xd09d605c, 0x6c5bedb5, 0xd6d54c51, 0x433dea21, +0x7ad9e677, 0x813bff76, 0x5a162c75, 0x1ee0661f, +0x9b6c2030, 0x8e8dc989, 0xcd4bc9fc, 0x4454675b, +0x8d583c9c, 0xe3400094, 0x116ebb83, 0xe847bc9a, +0x2a4622dd, 0x2a901e6f, 0xd789b1c0, 0x094e2bbb, +0x056e563f, 0x9f17e606, 0x8bc79b8d, 0xd2c535c1, +0x06a45a27, 0x9dc56771, 0xa06649e2, 0x5ff25ac8, +0x6554961e, 0x98e583d9, 0x38ba93da, 0xdee1de18, +0x037cb9d5, 0x6b17f195, 0x3431faaf, 0x13860a0d, +0x28bca10d, 0x0a54c011, 0x9957cdb6, 0x3aa1f429, +0x9d41b7b3, 0x9aea5be2, 0x60c7ce6b, 0x4cd1c10b, +0x24ddddcd, 0xe28412ba, 0xa03a5466, 0xa1896879, +0x59edcb87, 0x1b241765, 0x157bf161, 0xf219f950, +0xe86ff526, 0x262005d9, 0x11769531, 0xbca15d95, +0x28f5ef17, 0x1f27e725, 0xc32631d2, 0x07249e61, +0x1ba851e3, 0x4f49b577, 0xe2a1df5e, 0x826fa7ff, +0xc34e1e2e, 0x7fe26024, 0xbc19800f, 0x0d368dc9, +0xe03da0c6, 0xadaa4f9c, 0x9ad1e43c, 0x96f84e44, +0x0b6cd695, 0x1bb46971, 0x942d6e5b, 0x6316170d, +0x3164509f, 0xc6659450, 0xb2a0370a, 0xabc208e8, +0x6d479811, 0x3684bc0e, 0x80b7b101, 0xa50b7bb5, +0x43d21233, 0xb423559d, 0xf41dcd16, 0xdfd3c276, +0x3e586469, 0xd9b7630a, 0xb88f9e44, 0x0cda6f4d, +0xe5bf5844, 0x8709f788, 0xdae37da6, 0x1fb41777, +0x1d903f69, 0x34383b69, 0xd409ae70, 0xd1c99758, +0xdedfd7a4, 0xa4bdf018, 0xf4058202, 0x8565d66f, +0x5365aed9, 0xfa69742e, 0x2cfbfbcf, 0x88a00b60, +0x506c0713, 0x2866475b, 0x3e1df573, 0xb86f7feb, +0x31d23a7f, 0xc6320e6a, 0x3ebbc2a5, 0x83a1d4ef, +0x15169f5f, 0x42a61753, 0x893e553e, 0x4ddbc66d, +0x7449ec1f, 0x76f65d22, 0x0622e13b, 0x32986f89, +0x21181b4b, 0x99a80c0a, 0xd6fe00b0, 0x282c0e81, +0x9fc1cf88, 0x919b855d, 0x618257d8, 0x82c448b8, +0xe22537a1, 0xa90de388, 0xba73b90c, 0xd765eeb0, +0x62b2727e, 0xa08dfe20, 0x70b3c8c5, 0x3ef04007, +0x9f73732b, 0x2201edd7, 0xb836219c, 0xf913af7c, +0xf50f64ca, 0x93ac107a, 0xf509f84a, 0x6f6026f6, +0xd9bb8eac, 0x4b268cfa, 0xa65a3fa6, 0x9837cb75, +0x784fb835, 0x2060576d, 0xb1604cae, 0xb9da4116, +0xab320cf2, 0x60a1b501, 0x0c73fa79, 0x8d5a6f1e, +0x57688086, 0x218e4005, 0xca054e3d, 0xc1a3c3ec, Added: trunk/src/cpu/intel/model_67x/microcode-540-MU267238.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/microcode-540-MU267238.h Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,163 @@ +//+++ +// Copyright (c) <1995-2010>, Intel Corporation. +// All rights reserved. +// +// Redistribution. Redistribution and use in binary form, without modification, are +// permitted provided that the following conditions are met: +// .Redistributions must reproduce the above copyright notice and the following +// disclaimer in the documentation and/or other materials provided with the +// distribution. +// .Neither the name of Intel Corporation nor the names of its suppliers may be used +// to endorse or promote products derived from this software without specific prior +// written permission. +// .No reverse engineering, decompilation, or disassembly of this software is +// permitted. +// ."Binary form" includes any format commonly used for electronic conveyance +// which is a reversible, bit-exact translation of binary representation to ASCII or +// ISO text, for example, "uuencode." +// +// DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER +// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +// NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +//--- +/* Tue Feb 9 12:54:50 CST 2010 */ +/* 540-mu267238.inc */ +0x00000001, 0x00000038, 0x09221999, 0x00000672, +0xffd6aa2a, 0x00000001, 0x00000004, 0x00000000, +0x00000000, 0x00000000, 0x00000000, 0x00000000, +0xa2560856, 0x779b0125, 0x1443265a, 0x0a535feb, +0x70e89c38, 0xd71286b0, 0xa0ec5939, 0x525bccb1, +0x6fdfa495, 0xe99aac23, 0x73d359ac, 0x4104d3af, +0xc8a1849d, 0xd8dd20b9, 0x591df59a, 0xb23c9ce8, +0x5720703d, 0x28791338, 0x37b7440c, 0x3f4152d3, +0x946e068c, 0xbd4cbca7, 0x02e2980c, 0x78902676, +0x7c66c91b, 0x55e1a9ca, 0x55cca14b, 0xd0a82082, +0xbe66f162, 0xa499f342, 0xee344972, 0x0b4f8aa4, +0x3c26d31f, 0xa2492061, 0xd845fee0, 0xb253d108, +0x6ccc9b4b, 0x92ce1712, 0x11fcbc36, 0xe384d472, +0x8447afa4, 0x599b1a33, 0x78535766, 0xeb4f2543, +0x91629f05, 0x6af162d5, 0x949517b9, 0xc38e49a6, +0x5805826e, 0xd03155dd, 0xcc8800bb, 0xb98e9a71, +0xb75fd98a, 0x96c79e9a, 0xdf7478d3, 0x29a43071, +0xbf2a5470, 0xd5be473a, 0xf66c074d, 0x7ee133f5, +0xfaa5823b, 0x9fce08e1, 0x43bffec1, 0x12644f98, +0x26fe9f43, 0x096f8940, 0x703a390c, 0x598abb8a, +0x8b79f053, 0x5c294000, 0x6221fba4, 0xeb226211, +0x6b1e7e6e, 0xc5233cc8, 0xae9ab65d, 0x3aa0a89f, +0x0e422a22, 0x0f1886ef, 0x3379e3a6, 0x12f12284, +0x409f4e06, 0x41efac41, 0x07693087, 0x7a9f1916, +0x31269e69, 0x9caf7cbb, 0x3ff0bee6, 0x3ef2a057, +0x1de737d2, 0x8df81860, 0xc41ba7d0, 0x39584115, +0x1321abd7, 0x97dbe297, 0xa376ca1e, 0xaaf6b25b, +0x0c9b1d13, 0x363e1074, 0xc75e2a58, 0x79774604, +0x8ebe27aa, 0x95443c05, 0xb716ee48, 0x77a05fb7, +0x482eaeef, 0xeac5e94f, 0x79e3ef59, 0x2cd191db, +0x2b71c633, 0x95c675c5, 0xbf1e639b, 0xbac226f3, +0xfb2fac20, 0xa9e72a20, 0x5a46b3ee, 0x1743bec9, +0xb89df094, 0x15af2d36, 0x45944344, 0xb41d5a97, +0x2216d4b7, 0x98ba1092, 0xc97d4982, 0x336f6c35, +0xc43df462, 0x9fa0dc3a, 0x7a240c30, 0x7d248a85, +0x0995bbcf, 0xe9929521, 0x5d828729, 0xc8f41f11, +0x2d0f0e4e, 0x8e67c634, 0x68567623, 0xc237ba69, +0x78a6b1d9, 0x6f6c2ba8, 0xa8908a4f, 0x909b771c, +0x0428bb10, 0x7c1b33cf, 0x76af41c8, 0x6037d37c, +0x5ded7bbb, 0x534c6d21, 0xd9a6343b, 0x74482250, +0xb961501d, 0x0988d71b, 0x073dedea, 0x5d0a4702, +0xca22ce05, 0xf14f6f72, 0x8f7f744c, 0x1a78507e, +0x4b0b3b33, 0xe5a62813, 0xb76e4b43, 0xbee09325, +0x21a02fe8, 0x513abf7a, 0xe780fc18, 0x25b7ae25, +0xec70dec0, 0x25d1fc14, 0x47fc868f, 0xd348e013, +0xab83414a, 0x48e8afaa, 0xae9e7eb5, 0x4591f771, +0x8209dd0c, 0x84929f07, 0x7fb35bc9, 0x9ce719af, +0x339470a1, 0x85f7be9e, 0x2ea78a4b, 0x7cf3e760, +0xe0cf2ee2, 0xc8c60ee0, 0x06843417, 0x9ccb4cce, +0x117cde32, 0xe6b68d75, 0xfaedfa5f, 0x6407e9f8, +0x6db65a34, 0x07717a0c, 0x3578a834, 0xcf9f70e0, +0xbb0c1401, 0xc7624cd2, 0xe8102ce4, 0x2c342121, +0x353c2bc0, 0xa08d06e7, 0xee40ca20, 0x069f1b72, +0x1da2d573, 0x766565dd, 0xf684f183, 0x1a9a4c6f, +0x9566f043, 0xe083be7b, 0x1d9c5ed6, 0x85c01b1e, +0x1481bde2, 0x5e3d1b22, 0x0a47aeb2, 0x36c29f21, +0x9b5604ca, 0x8519256a, 0x5bf0e38d, 0xf061f342, +0xf3cc6aff, 0x3e928f99, 0x6c65bca7, 0x950fb3cd, +0x7bc6cc53, 0x5c3bb72a, 0x177eee6e, 0x4f1f0363, +0x7e2d8e88, 0x3ab83f54, 0x062f818a, 0x2b53143c, +0x6127e61f, 0x95cf1f48, 0x04798f41, 0x61ba5878, +0xb0fd99d2, 0x71c835e4, 0x3c4a814a, 0xe07eaa41, +0x838ba96f, 0x4f0239d3, 0xf295395e, 0xb3c38631, +0x7ea7a143, 0x157a4e43, 0x46f8173f, 0xfbc18d4a, +0xc401e17a, 0xc4620358, 0xd2ab5437, 0xa01db06f, +0x58ce91fc, 0x850de1a3, 0x9b542dba, 0xee77f038, +0xddd3ced6, 0xc225d2ce, 0x63a3f765, 0x3342a06c, +0x6a780c2f, 0xfaa925b2, 0x366ebeec, 0xbcc9abea, +0xc7b3fa4e, 0xf4f1123d, 0x5198702c, 0x3e3458b7, +0x0b1ce9a1, 0x51b1bd7f, 0x711e791e, 0x927d8bed, +0x91dbaea9, 0x7eefbda9, 0x7a19edd9, 0xdf7b8dce, +0x5bb40613, 0x0b0c1e0f, 0x85b82c98, 0x18da4dc1, +0xc5fd78ac, 0x57c1e31d, 0x4c4001b5, 0xe31d2643, +0xa6afbf58, 0xad200e68, 0xf0114ba4, 0xd6a620f2, +0xc753a720, 0xac9022a0, 0x28a41f01, 0x22a4ba95, +0xc00b7531, 0x23d42795, 0xcd836a86, 0x90262708, +0x3292cad0, 0x40022e39, 0xc1581b0a, 0xe5101550, +0x6538096b, 0x208c549d, 0x3ce2bf88, 0xa71df38e, +0x3dec3685, 0xca3949f1, 0x79f3ad1b, 0x3ee8b300, +0x9d305fc6, 0x7a2e5288, 0xbe81a2f2, 0x7ada0c06, +0x191c7f01, 0x58dfcbd1, 0xc78dee72, 0x72364226, +0x1866de12, 0x8d22305c, 0x943a0f0e, 0xc81967ff, +0x4d55fb0f, 0xaf199be1, 0x90bbda61, 0x4e7c234f, +0x90cfec16, 0x9b4bcf26, 0x21622023, 0x0926f0fa, +0x1d504377, 0xa58db427, 0x8d93ce2b, 0x90bfe900, +0x29e67397, 0x2c1261ed, 0x4ace9474, 0xd5c60282, +0xe53fb300, 0x8a61a0ab, 0xa7aa0918, 0x4389d7c5, +0xd09d605c, 0x6c5bedb5, 0xd6d54c51, 0x433dea21, +0x7ad9e677, 0x813bff76, 0x5a162c75, 0x1ee0661f, +0x9b6c2030, 0x8e8dc989, 0xcd4bc9fc, 0x4454675b, +0x8d583c9c, 0xe3400094, 0x116ebb83, 0xe847bc9a, +0x2a4622dd, 0x2a901e6f, 0xd789b1c0, 0x094e2bbb, +0x056e563f, 0x9f17e606, 0x8bc79b8d, 0xd2c535c1, +0x06a45a27, 0x9dc56771, 0xa06649e2, 0x5ff25ac8, +0x6554961e, 0x98e583d9, 0x38ba93da, 0xdee1de18, +0x037cb9d5, 0x6b17f195, 0x3431faaf, 0x13860a0d, +0x28bca10d, 0x0a54c011, 0x9957cdb6, 0x3aa1f429, +0x9d41b7b3, 0x9aea5be2, 0x60c7ce6b, 0x4cd1c10b, +0x24ddddcd, 0xe28412ba, 0xa03a5466, 0xa1896879, +0x59edcb87, 0x1b241765, 0x157bf161, 0xf219f950, +0xe86ff526, 0x262005d9, 0x11769531, 0xbca15d95, +0x28f5ef17, 0x1f27e725, 0xc32631d2, 0x07249e61, +0x1ba851e3, 0x4f49b577, 0xe2a1df5e, 0x826fa7ff, +0xc34e1e2e, 0x7fe26024, 0xbc19800f, 0x0d368dc9, +0xe03da0c6, 0xadaa4f9c, 0x9ad1e43c, 0x96f84e44, +0x0b6cd695, 0x1bb46971, 0x942d6e5b, 0x6316170d, +0x3164509f, 0xc6659450, 0xb2a0370a, 0xabc208e8, +0x6d479811, 0x3684bc0e, 0x80b7b101, 0xa50b7bb5, +0x43d21233, 0xb423559d, 0xf41dcd16, 0xdfd3c276, +0x3e586469, 0xd9b7630a, 0xb88f9e44, 0x0cda6f4d, +0xe5bf5844, 0x8709f788, 0xdae37da6, 0x1fb41777, +0x1d903f69, 0x34383b69, 0xd409ae70, 0xd1c99758, +0xdedfd7a4, 0xa4bdf018, 0xf4058202, 0x8565d66f, +0x5365aed9, 0xfa69742e, 0x2cfbfbcf, 0x88a00b60, +0x506c0713, 0x2866475b, 0x3e1df573, 0xb86f7feb, +0x31d23a7f, 0xc6320e6a, 0x3ebbc2a5, 0x83a1d4ef, +0x15169f5f, 0x42a61753, 0x893e553e, 0x4ddbc66d, +0x7449ec1f, 0x76f65d22, 0x0622e13b, 0x32986f89, +0x21181b4b, 0x99a80c0a, 0xd6fe00b0, 0x282c0e81, +0x9fc1cf88, 0x919b855d, 0x618257d8, 0x82c448b8, +0xe22537a1, 0xa90de388, 0xba73b90c, 0xd765eeb0, +0x62b2727e, 0xa08dfe20, 0x70b3c8c5, 0x3ef04007, +0x9f73732b, 0x2201edd7, 0xb836219c, 0xf913af7c, +0xf50f64ca, 0x93ac107a, 0xf509f84a, 0x6f6026f6, +0xd9bb8eac, 0x4b268cfa, 0xa65a3fa6, 0x9837cb75, +0x784fb835, 0x2060576d, 0xb1604cae, 0xb9da4116, +0xab320cf2, 0x60a1b501, 0x0c73fa79, 0x8d5a6f1e, +0x57688086, 0x218e4005, 0xca054e3d, 0xc1a3c3ec, Added: trunk/src/cpu/intel/model_67x/model_67x_init.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/cpu/intel/model_67x/model_67x_init.c Wed Oct 13 19:00:42 2010 (r5950) @@ -0,0 +1,82 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2010 Keith Hui <buurin(a)gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <string.h> +#include <cpu/cpu.h> +#include <cpu/x86/mtrr.h> +#include <cpu/x86/lapic.h> +#include <cpu/intel/microcode.h> +#include <cpu/x86/cache.h> +#include <cpu/x86/msr.h> + +static const uint32_t microcode_updates[] = { + /* Include microcode updates here. */ + #include "microcode-293-MU267114.h" + #include "microcode-530-MU16730e.h" + #include "microcode-531-MU26732e.h" + #include "microcode-539-MU167210.h" + #include "microcode-540-MU267238.h" + /* Dummy terminator */ + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0, +}; + +static void model_67x_init(device_t cpu) +{ + /* Update the microcode */ + intel_update_microcode(microcode_updates); + + /* Turn on caching if we haven't already */ + x86_enable_cache(); + + /* Setup MTRRs */ + x86_setup_mtrrs(36); + x86_mtrr_check(); + + /* Enable the local cpu apics */ + setup_lapic(); +} + +static struct device_operations cpu_dev_ops = { + .init = model_67x_init, +}; + +/* + * Intel Pentium III Processor Identification and Package Information + * http://www.intel.com/design/pentiumiii/qit/update.pdf + * + * Intel Pentium III Processor Specification Update + * http://download.intel.com/design/intarch/specupdt/24445358.pdf + */ +static struct cpu_device_id cpu_table[] = { + { X86_VENDOR_INTEL, 0x0671 }, + { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */ + { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */ + + { 0, 0 }, +}; + +static const struct cpu_driver driver __cpu_driver = { + .ops = &cpu_dev_ops, + .id_table = cpu_table, +}; Modified: trunk/src/cpu/intel/model_6xx/model_6xx_init.c ============================================================================== --- trunk/src/cpu/intel/model_6xx/model_6xx_init.c Wed Oct 13 10:21:44 2010 (r5949) +++ trunk/src/cpu/intel/model_6xx/model_6xx_init.c Wed Oct 13 19:00:42 2010 (r5950) @@ -93,9 +93,6 @@ { X86_VENDOR_INTEL, 0x0665 }, /* Celeron, B0 */ { X86_VENDOR_INTEL, 0x066a }, /* PII, mdxA0/dmmA0 + others */ - { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */ - { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */ - { X86_VENDOR_INTEL, 0x0680 }, { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ Modified: trunk/src/cpu/intel/slot_1/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/slot_1/Makefile.inc Wed Oct 13 10:21:44 2010 (r5949) +++ trunk/src/cpu/intel/slot_1/Makefile.inc Wed Oct 13 19:00:42 2010 (r5950) @@ -20,6 +20,7 @@ ramstage-y += slot_1.c subdirs-y += ../model_6xx +subdirs-y += ../model_67x subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr

1 0

devroom @ FOSDEM
by Rudolf Marek 13 Oct '10

13 Oct '10

Hi all, Anyone already did some request for devroom? The deadline is on 16th. Who wants to come to FOSDEM anyway? In my case I could come (most likely with my driver ;) Is there a chance of getting bigger room? Do we plan to make more workshops this year? Maybe more "hands-on" ? Thanks, Rudolf

3 2

CarPC project, with MB899 MB
by Nasa 13 Oct '10

13 Oct '10

Hi, As a hobby, I play with a carpc in my accord. I have been recently trying the Meego linux distro. Meego is a fairly quick booting system, but it doesn't do anything to help with the really slow BIOS my MB899 has -- as I was doing a search on BIOS updates, I came across this project. While the MB899 isn't listed on the website as supported, I noted that it was addressed/added recently in email traffic on this list. I also noted that this BIOS is supposedly really quick... Somewhere I read you could get to the Linux terminal in less than 5 seconds?Which is something I am really interested in as an "instant boot" would be a welcome addition to my system. All that said, I was hoping to get pointed in the right direction to being able to install this in my motherboard. The specifics of the board (in case I misread the post) are(from manual): IBASE MB899 Intel 945GM Chipset GMCH: 82945GM 1466-pin Micro-FCBGA ICH7M:82801GBM 652-pin MBGA. While I am very capable of building software out of SVN (been doing that for mythtv, openmobile, etc) and linux kernel, I have not played with pulling individual chips, like a BIOS. So I don't know anything about acquiring and/or replacing one. But I can be somewhat adventureous... Thanks in advance, Nasa

1 0

[PATCH] Unify the Socket 940 CAR configuration.
by Warren Turkal 13 Oct '10

13 Oct '10

Hey folks, I am looking for some comments on the following patch. It unifies the socket 940 cache-as-ram implementation. Previously, the affected boards had their own CAR options in their Kconfig files. There is a default set of CAR configs in the socket. Does anyone have comments on why this patch should or should not be committed? I would like to commit this since it would unify the socket 940 CAR implementation. However, I feel like I cannot properly gauge the risk of this change to the affected boards, and I'd like some comments from more experienced developers. Thanks, wt 8<---------------------------------------------------------------------- The affected boards had special one-off configurations in the past. This patch unifies them by using the CAR configuration from the socket instead. Signed-off-by: Warren Turkal <wt(a)penguintechs.org> --- src/mainboard/broadcom/blast/Kconfig | 12 ------------ src/mainboard/ibm/e325/Kconfig | 12 ------------ src/mainboard/ibm/e326/Kconfig | 12 ------------ src/mainboard/newisys/khepri/Kconfig | 8 -------- src/mainboard/sunw/ultra40/Kconfig | 8 -------- src/mainboard/tyan/s4880/Kconfig | 8 -------- src/mainboard/tyan/s4882/Kconfig | 8 -------- 7 files changed, 0 insertions(+), 68 deletions(-) diff --git a/src/mainboard/broadcom/blast/Kconfig b/src/mainboard/broadcom/blast/Kconfig index 943627a..563c5ff 100644 --- a/src/mainboard/broadcom/blast/Kconfig +++ b/src/mainboard/broadcom/blast/Kconfig @@ -21,18 +21,6 @@ config MAINBOARD_DIR string default broadcom/blast -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x0 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/ibm/e325/Kconfig b/src/mainboard/ibm/e325/Kconfig index d986eb4..d02c66b 100644 --- a/src/mainboard/ibm/e325/Kconfig +++ b/src/mainboard/ibm/e325/Kconfig @@ -21,18 +21,6 @@ config MAINBOARD_DIR string default ibm/e325 -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x1000 - -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x0 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/ibm/e326/Kconfig b/src/mainboard/ibm/e326/Kconfig index 10c5181..c974029 100644 --- a/src/mainboard/ibm/e326/Kconfig +++ b/src/mainboard/ibm/e326/Kconfig @@ -21,18 +21,6 @@ config MAINBOARD_DIR string default ibm/e326 -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x1000 - -config DCACHE_RAM_GLOBAL_VAR_SIZE - hex - default 0x0 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig index 3d7aade..64d3df8 100644 --- a/src/mainboard/newisys/khepri/Kconfig +++ b/src/mainboard/newisys/khepri/Kconfig @@ -20,14 +20,6 @@ config MAINBOARD_DIR string default newisys/khepri -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - config APIC_ID_OFFSET hex default 0x0 diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig index ac07513..853db4f 100644 --- a/src/mainboard/sunw/ultra40/Kconfig +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -19,14 +19,6 @@ config MAINBOARD_DIR string default sunw/ultra40 -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - config APIC_ID_OFFSET hex default 0x10 diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig index c9c59b1..8d9de8b 100644 --- a/src/mainboard/tyan/s4880/Kconfig +++ b/src/mainboard/tyan/s4880/Kconfig @@ -20,14 +20,6 @@ config MAINBOARD_DIR string default tyan/s4880 -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - config APIC_ID_OFFSET hex default 0x10 diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig index f19448f..6ab362c 100644 --- a/src/mainboard/tyan/s4882/Kconfig +++ b/src/mainboard/tyan/s4882/Kconfig @@ -20,14 +20,6 @@ config MAINBOARD_DIR string default tyan/s4882 -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - config APIC_ID_OFFSET hex default 0x10 -- 1.7.1

3 5

[PATCH] 780 mmconfig space access issue
by Bao, Zheng 13 Oct '10

13 Oct '10

I checked the code and found a stupid bug. I wonder if it can fix your problem. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: src/southbridge/amd/rs780/rs780_cmn.c =================================================================== --- src/southbridge/amd/rs780/rs780_cmn.c (revision 5926) +++ src/southbridge/amd/rs780/rs780_cmn.c (working copy) @@ -70,7 +70,7 @@ reg &= ~mask; reg |= val; if (reg != reg_old) { - *((u32 *) addr) = val; + *((u32 *) addr) = reg; } } Index: src/southbridge/amd/rs690/rs690_cmn.c =================================================================== --- src/southbridge/amd/rs690/rs690_cmn.c (revision 5926) +++ src/southbridge/amd/rs690/rs690_cmn.c (working copy) @@ -72,7 +72,7 @@ reg &= ~mask; reg |= val; if (reg != reg_old) { - *((u32 *) addr) = val; + *((u32 *) addr) = reg; } } Zheng

3 2

[commit] r5949 - in trunk/src: cpu/intel/socket_PGA370 mainboard/asus/mew-am mainboard/asus/mew-vm mainboard/ecs/p6iwp-fe mainboard/hp/e_vectra_p2706t mainboard/intel/d810e2cb mainboard/mitac/6513w...
by repository service 13 Oct '10

13 Oct '10

Author: uwe Date: Wed Oct 13 10:21:44 2010 New Revision: 5949 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5949 Log: Convert all Intel i810 boards to CAR. - Drop "select ROMCC" from the boards, as well as early_mtrr stuff. - Add "select CACHE_AS_RAM" to socket_PGA370/Kconfig, as well as the usual DCACHE_RAM_BASE and DCACHE_RAM_SIZE variables. - In socket_PGA370/Makefile.inc add: cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc - Other smaller related fixes. Abuild-tested and boot-tested on MSI MS-6178. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/src/cpu/intel/socket_PGA370/Kconfig trunk/src/cpu/intel/socket_PGA370/Makefile.inc trunk/src/cpu/intel/socket_PGA370/socket_PGA370.c trunk/src/mainboard/asus/mew-am/Kconfig trunk/src/mainboard/asus/mew-am/romstage.c trunk/src/mainboard/asus/mew-vm/Kconfig trunk/src/mainboard/asus/mew-vm/romstage.c trunk/src/mainboard/ecs/p6iwp-fe/Kconfig trunk/src/mainboard/ecs/p6iwp-fe/romstage.c trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c trunk/src/mainboard/intel/d810e2cb/romstage.c trunk/src/mainboard/mitac/6513wu/Kconfig trunk/src/mainboard/mitac/6513wu/romstage.c trunk/src/mainboard/msi/ms6178/Kconfig trunk/src/mainboard/msi/ms6178/romstage.c trunk/src/mainboard/nec/powermate2000/Kconfig trunk/src/mainboard/nec/powermate2000/romstage.c trunk/src/northbridge/intel/i82810/debug.c trunk/src/northbridge/intel/i82810/raminit.c Modified: trunk/src/cpu/intel/socket_PGA370/Kconfig ============================================================================== --- trunk/src/cpu/intel/socket_PGA370/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/cpu/intel/socket_PGA370/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -21,10 +21,22 @@ bool select MMX select UDELAY_TSC + select CACHE_AS_RAM + +if CPU_INTEL_SOCKET_PGA370 # Not all CPUs for Socket 370 can do SSE2 config SSE2 bool default n - depends on CPU_INTEL_SOCKET_PGA370 + +config DCACHE_RAM_BASE + hex + default 0xc0000 + +config DCACHE_RAM_SIZE + hex + default 0x01000 + +endif Modified: trunk/src/cpu/intel/socket_PGA370/Makefile.inc ============================================================================== --- trunk/src/cpu/intel/socket_PGA370/Makefile.inc Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/cpu/intel/socket_PGA370/Makefile.inc Wed Oct 13 10:21:44 2010 (r5949) @@ -27,3 +27,5 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode +cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc + Modified: trunk/src/cpu/intel/socket_PGA370/socket_PGA370.c ============================================================================== --- trunk/src/cpu/intel/socket_PGA370/socket_PGA370.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/cpu/intel/socket_PGA370/socket_PGA370.c Wed Oct 13 10:21:44 2010 (r5949) @@ -1,7 +1,6 @@ #include <device/device.h> #include "chip.h" - struct chip_operations cpu_intel_socket_PGA370_ops = { CHIP_NAME("Socket PGA370 CPU") }; Modified: trunk/src/mainboard/asus/mew-am/Kconfig ============================================================================== --- trunk/src/mainboard/asus/mew-am/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/asus/mew-am/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -25,7 +25,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_SMSC_SMSCSUPERIO - select ROMCC select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/asus/mew-am/romstage.c ============================================================================== --- trunk/src/mainboard/asus/mew-am/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/asus/mew-am/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,31 +26,21 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" - -#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) - -static inline int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - #include "northbridge/intel/i82810/raminit.c" /* #include "northbridge/intel/i82810/debug.c" */ +#include <lib.h> -static void main(unsigned long bist) -{ - if (bist == 0) - early_mtrr_init(); +#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) +void main(unsigned long bist) +{ smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); @@ -60,6 +50,4 @@ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/asus/mew-vm/Kconfig ============================================================================== --- trunk/src/mainboard/asus/mew-vm/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/asus/mew-vm/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -25,7 +25,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_SMSC_LPC47B272 - select ROMCC select HAVE_OPTION_TABLE select HAVE_PIRQ_TABLE select UDELAY_TSC Modified: trunk/src/mainboard/asus/mew-vm/romstage.c ============================================================================== --- trunk/src/mainboard/asus/mew-vm/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/asus/mew-vm/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,42 +26,28 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c" #include "northbridge/intel/i82810/raminit.h" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" - -#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) - #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "northbridge/intel/i82810/raminit.c" #include "northbridge/intel/i82810/debug.c" +#include <lib.h> -static void main(unsigned long bist) -{ - if (bist == 0) - early_mtrr_init(); +#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) +void main(unsigned long bist) +{ lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); - enable_smbus(); - - /* Halt if there was a built in self test failure. */ report_bist_failure(bist); - - /* dump_spd_registers(); */ - + dump_spd_registers(); sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - - /* Check RAM. */ - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/ecs/p6iwp-fe/Kconfig ============================================================================== --- trunk/src/mainboard/ecs/p6iwp-fe/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/ecs/p6iwp-fe/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -26,7 +26,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_ITE_IT8712F - select ROMCC select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/ecs/p6iwp-fe/romstage.c ============================================================================== --- trunk/src/mainboard/ecs/p6iwp-fe/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/ecs/p6iwp-fe/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -27,37 +27,21 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "superio/ite/it8712f/it8712f_early_serial.c" - -static inline int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - #include "northbridge/intel/i82810/raminit.c" #include "northbridge/intel/i82810/debug.c" +#include <lib.h> -/* Early mainboard specific GPIO setup. */ -static void mb_gpio_init(void) +void main(unsigned long bist) { -} - -static void main(unsigned long bist) -{ - if (bist == 0) - early_mtrr_init(); - it8712f_24mhz_clkin(); it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter - mb_gpio_init(); uart_init(); console_init(); report_bist_failure(bist); @@ -67,6 +51,4 @@ sdram_set_spd_registers(); sdram_enable(); dump_spd_registers(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig ============================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/hp/e_vectra_p2706t/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -29,7 +29,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_NSC_PC87360 - select ROMCC select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c ============================================================================== --- trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/hp/e_vectra_p2706t/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,40 +26,30 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" /* TODO: It's a PC87364 actually! */ #include "superio/nsc/pc87360/pc87360_early_serial.c" /* TODO: It's i810E actually! */ #include "northbridge/intel/i82810/raminit.h" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "pc80/udelay_io.c" #include "lib/debug.c" #include "northbridge/intel/i82810/raminit.c" +#include <lib.h> /* TODO: It's a PC87364 actually! */ #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) -static void main(unsigned long bist) +void main(unsigned long bist) { - if (bist == 0) - early_mtrr_init(); - /* TODO: It's a PC87364 actually! */ pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); - enable_smbus(); - report_bist_failure(bist); - /* dump_spd_registers(); */ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/intel/d810e2cb/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d810e2cb/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/intel/d810e2cb/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -35,21 +35,15 @@ #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "gpio.c" +#include "northbridge/intel/i82810/raminit.c" +/* #include "northbridge/intel/i82810/debug.c" */ #include <lib.h> #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) -static inline int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/i82810/raminit.c" -/* #include "northbridge/intel/i82810/debug.c" */ - void main(unsigned long bist) { - /* Set southbridge and superio gpios */ + /* Set southbridge and Super I/O GPIOs. */ mb_gpio_init(); smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); @@ -62,6 +56,4 @@ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/mitac/6513wu/Kconfig ============================================================================== --- trunk/src/mainboard/mitac/6513wu/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/mitac/6513wu/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -25,7 +25,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_SMSC_SMSCSUPERIO - select ROMCC select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/mitac/6513wu/romstage.c ============================================================================== --- trunk/src/mainboard/mitac/6513wu/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/mitac/6513wu/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,31 +26,21 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <console/console.h> -#include "lib/ramtest.c" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" #include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" - -#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) - -static inline int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - #include "northbridge/intel/i82810/raminit.c" /* #include "northbridge/intel/i82810/debug.c" */ +#include <lib.h> -static void main(unsigned long bist) -{ - if (bist == 0) - early_mtrr_init(); +#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) +void main(unsigned long bist) +{ smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); @@ -61,6 +51,4 @@ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/msi/ms6178/Kconfig ============================================================================== --- trunk/src/mainboard/msi/ms6178/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/msi/ms6178/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -25,7 +25,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_WINBOND_W83627HF - select ROMCC select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_512 select HAVE_MAINBOARD_RESOURCES Modified: trunk/src/mainboard/msi/ms6178/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms6178/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/msi/ms6178/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,23 +26,19 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "northbridge/intel/i82810/raminit.h" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "pc80/udelay_io.c" #include "lib/debug.c" #include "northbridge/intel/i82810/raminit.c" +#include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -static void main(unsigned long bist) +void main(unsigned long bist) { - if (bist == 0) - early_mtrr_init(); - /* FIXME */ outb(0x87, 0x2e); outb(0x87, 0x2e); @@ -61,6 +57,4 @@ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/mainboard/nec/powermate2000/Kconfig ============================================================================== --- trunk/src/mainboard/nec/powermate2000/Kconfig Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/nec/powermate2000/Kconfig Wed Oct 13 10:21:44 2010 (r5949) @@ -25,7 +25,6 @@ select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX select SUPERIO_SMSC_SMSCSUPERIO - select ROMCC select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 Modified: trunk/src/mainboard/nec/powermate2000/romstage.c ============================================================================== --- trunk/src/mainboard/nec/powermate2000/romstage.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/mainboard/nec/powermate2000/romstage.c Wed Oct 13 10:21:44 2010 (r5949) @@ -26,34 +26,25 @@ #include <arch/hlt.h> #include <stdlib.h> #include <console/console.h> -#include "lib/ramtest.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "northbridge/intel/i82810/raminit.h" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c" #include "pc80/udelay_io.c" #include "northbridge/intel/i82810/raminit.c" +#include <lib.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -static void main(unsigned long bist) +void main(unsigned long bist) { - if (bist == 0) - early_mtrr_init(); - smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); - enable_smbus(); - report_bist_failure(bist); - /* dump_spd_registers(); */ sdram_set_registers(); sdram_set_spd_registers(); sdram_enable(); - /* ram_check(0, 640 * 1024); */ } - Modified: trunk/src/northbridge/intel/i82810/debug.c ============================================================================== --- trunk/src/northbridge/intel/i82810/debug.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/northbridge/intel/i82810/debug.c Wed Oct 13 10:21:44 2010 (r5949) @@ -1,6 +1,6 @@ - static void dump_spd_registers(void) { +#if CONFIG_DEBUG_RAM_SETUP int i; print_debug("\n"); for(i = 0; i < DIMM_SOCKETS; i++) { @@ -32,4 +32,5 @@ print_debug("\n"); } } +#endif } Modified: trunk/src/northbridge/intel/i82810/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i82810/raminit.c Wed Oct 13 08:23:02 2010 (r5948) +++ trunk/src/northbridge/intel/i82810/raminit.c Wed Oct 13 10:21:44 2010 (r5949) @@ -137,6 +137,11 @@ SDRAM configuration functions. -----------------------------------------------------------------------------*/ +static inline int spd_read_byte(unsigned device, unsigned address) +{ + return smbus_read_byte(device, address); +} + /** * Send the specified RAM command to all DIMMs. *

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[PATCH] Enable or disable the power button in Kconfig
by Peter Stuge 13 Oct '10

13 Oct '10

Please see the attached patch. I would like to especially ask those who have worked on boards which use the 5536 to check if maybe their board should select a different POWER_BUTTON_* now. Again, existing behavior should be unchanged from previous except on ALIX.1. Jens, please confirm if my understanding of the old vs. new hurricane-lx board version vs. power button behavior is correct. Thanks! //Peter

5 6

[commit] r5948 - in trunk/src: . mainboard mainboard/amd/db800 mainboard/amd/norwich mainboard/amd/rumba mainboard/artecgroup/dbe61 mainboard/digitallogic/msm800sev mainboard/iei/pcisa-lx-800-r10 m...
by repository service 13 Oct '10

13 Oct '10

Author: stuge Date: Wed Oct 13 08:23:02 2010 New Revision: 5948 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5948 Log: Enable or disable the power button in Kconfig Some mainboards need to disable the power button to avoid turning off right after being turned on, while other boards ship with a jumper over the power button and should allow the user to configure the behavior. This adds infrastructure in the form of four mutually exclusive options which can be selected in a mainboard Kconfig (power button forced on/off, and user-controllable with default on/off) and one result bool which source code can test. (Enable the button or not.) The options have been implemented in CS5536 code and for all mainboards which select SOUTHBRIDGE_AMD_CS5536, but should be used also by other chipsets where applicable. Note that if chipset code uses the result bool ENABLE_POWER_BUTTON, then every board using that chipset must select one out of the four control options in order to build. All touched boards should have unchanged behavior, except pcengines/alix1c, traverse/geos and lippert/hurricane-lx where the power button can now be configured by the user. Build tested for alix1c, alix2d, hurricane-lx and wyse-s50. Confirmed to work as advertised on alix1c both with button enabled and disabled. Includes additional traverse/geos changes from Nathan and lippert/hurricane-lx changes from Jens to correctly use the new feature on those boards. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Aurelien Guillaume <aurelien(a)iwi.me> Acked-by: Nils Jacobs <njacobs8(a)hetnet.nl> Modified: trunk/src/Kconfig trunk/src/mainboard/Kconfig trunk/src/mainboard/amd/db800/Kconfig trunk/src/mainboard/amd/norwich/Kconfig trunk/src/mainboard/amd/rumba/Kconfig trunk/src/mainboard/artecgroup/dbe61/Kconfig trunk/src/mainboard/digitallogic/msm800sev/Kconfig trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig trunk/src/mainboard/lippert/hurricane-lx/Kconfig trunk/src/mainboard/lippert/hurricane-lx/romstage.c trunk/src/mainboard/lippert/literunner-lx/Kconfig trunk/src/mainboard/lippert/roadrunner-lx/Kconfig trunk/src/mainboard/lippert/spacerunner-lx/Kconfig trunk/src/mainboard/pcengines/alix1c/Kconfig trunk/src/mainboard/pcengines/alix2d/Kconfig trunk/src/mainboard/pcengines/alix2d/romstage.c trunk/src/mainboard/traverse/geos/Kconfig trunk/src/mainboard/winent/pl6064/Kconfig trunk/src/mainboard/wyse/s50/Kconfig trunk/src/mainboard/wyse/s50/romstage.c trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c Modified: trunk/src/Kconfig ============================================================================== --- trunk/src/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -736,4 +736,43 @@ hex default 0x10 +# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE, +# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are +# mutually exclusive. One of these options must be selected in the +# mainboard Kconfig if the chipset supports enabling and disabling of +# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set +# in mainboard/Kconfig to know if the button should be enabled or not. + +config POWER_BUTTON_DEFAULT_ENABLE + def_bool n + help + Select when the board has a power button which can optionally be + disabled by the user. + +config POWER_BUTTON_DEFAULT_DISABLE + def_bool n + help + Select when the board has a power button which can optionally be + enabled by the user, e.g. when the board ships with a jumper over + the power switch contacts. + +config POWER_BUTTON_FORCE_ENABLE + def_bool n + help + Select when the board requires that the power button is always + enabled. + +config POWER_BUTTON_FORCE_DISABLE + def_bool n + help + Select when the board requires that the power button is always + disabled, e.g. when it has been hardwired to ground. + +config POWER_BUTTON_IS_OPTIONAL + bool + default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE + default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE) + help + Internal option that controls ENABLE_POWER_BUTTON visibility. + source src/Kconfig.deprecated_options Modified: trunk/src/mainboard/Kconfig ============================================================================== --- trunk/src/mainboard/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -247,4 +247,22 @@ default 0x200000 if COREBOOT_ROMSIZE_KB_2048 default 0x400000 if COREBOOT_ROMSIZE_KB_4096 +config ENABLE_POWER_BUTTON + bool "Enable the power button" if POWER_BUTTON_IS_OPTIONAL + default y if POWER_BUTTON_DEFAULT_ENABLE + default n if POWER_BUTTON_DEFAULT_DISABLE + help + The selected mainboard can optionally have the power button tied + to ground with a jumper so that the button appears to be + constantly depressed. If this option is enabled and the jumper is + installed then the board will turn on, but turn off again after a + short timeout, usually 4 seconds. + + Select Y here if you have removed the jumper and want to use an + actual power button. Select N if you have the jumper installed. + +config ENABLE_POWER_BUTTON + def_bool y if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_ENABLE + def_bool n if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_DISABLE + endmenu Modified: trunk/src/mainboard/amd/db800/Kconfig ============================================================================== --- trunk/src/mainboard/amd/db800/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/amd/db800/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -11,6 +11,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/amd/norwich/Kconfig ============================================================================== --- trunk/src/mainboard/amd/norwich/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/amd/norwich/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -10,6 +10,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/amd/rumba/Kconfig ============================================================================== --- trunk/src/mainboard/amd/rumba/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/amd/rumba/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -27,6 +27,7 @@ select UDELAY_TSC select HAVE_PIRQ_TABLE select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/artecgroup/dbe61/Kconfig ============================================================================== --- trunk/src/mainboard/artecgroup/dbe61/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/artecgroup/dbe61/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -10,6 +10,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_DISABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/digitallogic/msm800sev/Kconfig ============================================================================== --- trunk/src/mainboard/digitallogic/msm800sev/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/digitallogic/msm800sev/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -11,6 +11,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig ============================================================================== --- trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -10,6 +10,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/lippert/hurricane-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/hurricane-lx/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/lippert/hurricane-lx/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -29,11 +29,20 @@ config BOARD_OLD_REVISION bool "Board is old pre-3.0 revision" default n + select POWER_BUTTON_DEFAULT_DISABLE help Look on the bottom side for a number like 406-0001-30. The last 2 digits state the PCB revision (3.0 in this example). For 2.0 or older boards choose Y, for 3.0 and newer say N. + Old revision boards need a jumper shorting the power button to + power on automatically. You may enable the button only after this + jumper has been removed. New revision boards are not restricted + in this way, and always have the power button enabled. + +config POWER_BUTTON_FORCE_ENABLE + def_bool y if !BOARD_OLD_REVISION + config ONBOARD_UARTS_RS485 bool "Switch on-board serial ports to RS485" default n Modified: trunk/src/mainboard/lippert/hurricane-lx/romstage.c ============================================================================== --- trunk/src/mainboard/lippert/hurricane-lx/romstage.c Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/lippert/hurricane-lx/romstage.c Wed Oct 13 08:23:02 2010 (r5948) @@ -147,14 +147,7 @@ cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); -#if CONFIG_BOARD_OLD_REVISION - /* - * Old revision boards need a jumper shorting the power button to power - * on automatically. So we must disable the button's fail-safe function, - * or the board will shut down after 4 s. - */ - outl(0, PMS_IO_BASE + PM_FSD); // Fail-Save Delay register -#else +#if !CONFIG_BOARD_OLD_REVISION int err; /* bit0 = Spread Spectrum */ if ((err = smc_send_config(SMC_CONFIG))) { Modified: trunk/src/mainboard/lippert/literunner-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/literunner-lx/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/lippert/literunner-lx/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -14,6 +14,7 @@ # Board is equipped with a 1 MB SPI flash, however, due to limitations # of the IT8712F Super I/O, only the top 512 KB are directly mapped. select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/lippert/roadrunner-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/roadrunner-lx/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/lippert/roadrunner-lx/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -13,6 +13,7 @@ # Standard chip is a 512 KB FWH. Replacing it with a 1 MB # SST 49LF008A is possible. select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/lippert/spacerunner-lx/Kconfig ============================================================================== --- trunk/src/mainboard/lippert/spacerunner-lx/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/lippert/spacerunner-lx/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -14,6 +14,7 @@ # Board is equipped with a 1 MB SPI flash, however, due to limitations # of the IT8712F Super I/O, only the top 512 KB are directly mapped. select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/pcengines/alix1c/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/alix1c/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/pcengines/alix1c/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -11,6 +11,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_DEFAULT_DISABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/pcengines/alix2d/Kconfig ============================================================================== --- trunk/src/mainboard/pcengines/alix2d/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/pcengines/alix2d/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -10,6 +10,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_FORCE_DISABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/pcengines/alix2d/romstage.c ============================================================================== --- trunk/src/mainboard/pcengines/alix2d/romstage.c Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/pcengines/alix2d/romstage.c Wed Oct 13 08:23:02 2010 (r5948) @@ -120,12 +120,6 @@ static void mb_gpio_init(void) { /* - * Disable power button, since it is hardwired to ground on this board, - * and the power would be cut off atfer a 4-second delay otherwise. - */ - outl(0x00020000, PMS_IO_BASE + 0x40); - - /* * Enable LEDs GPIO outputs to light up the leds * This is how the original tinyBIOS sets them after boot. * Info: GPIO_IO_BASE, 0x6100, is only valid before PCI init, so it Modified: trunk/src/mainboard/traverse/geos/Kconfig ============================================================================== --- trunk/src/mainboard/traverse/geos/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/traverse/geos/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -10,6 +10,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_1024 + select POWER_BUTTON_DEFAULT_DISABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/winent/pl6064/Kconfig ============================================================================== --- trunk/src/mainboard/winent/pl6064/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/winent/pl6064/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -11,6 +11,7 @@ select PIRQ_ROUTE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select POWER_BUTTON_FORCE_ENABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/wyse/s50/Kconfig ============================================================================== --- trunk/src/mainboard/wyse/s50/Kconfig Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/wyse/s50/Kconfig Wed Oct 13 08:23:02 2010 (r5948) @@ -28,6 +28,7 @@ select HAVE_PIRQ_TABLE select PIRQ_ROUTE select BOARD_ROMSIZE_KB_256 + select POWER_BUTTON_FORCE_DISABLE config MAINBOARD_DIR string Modified: trunk/src/mainboard/wyse/s50/romstage.c ============================================================================== --- trunk/src/mainboard/wyse/s50/romstage.c Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/mainboard/wyse/s50/romstage.c Wed Oct 13 08:23:02 2010 (r5948) @@ -134,9 +134,6 @@ cs5536_early_setup(); - /* disable the power button */ - outl(0x00, PMS_IO_BASE + 0x40); - /* cs5536_disable_internal_uart disable them. Set them up now... */ cs5536_setup_onchipuart(1); Modified: trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c ============================================================================== --- trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c Wed Oct 13 07:16:48 2010 (r5947) +++ trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c Wed Oct 13 08:23:02 2010 (r5948) @@ -92,8 +92,9 @@ static void cs5536_setup_power_button(void) { - /* Power Button Setup */ +#if CONFIG_ENABLE_POWER_BUTTON outl(0x40020000, PMS_IO_BASE + 0x40); +#endif /* setup WORK_AUX/GPIO24, it is the external signal for 5536 * vsb_work_aux controls all voltage rails except Vstandby & Vmem.

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[commit] r5947 - in trunk/src/southbridge/amd: rs690 rs780
by repository service 13 Oct '10

13 Oct '10

Author: zbao Date: Wed Oct 13 07:16:48 2010 New Revision: 5947 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5947 Log: Fix a stupid bug in rs780 and rs690 code. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Scott Duplichan <scott(a)notabs.org> Modified: trunk/src/southbridge/amd/rs690/rs690_cmn.c trunk/src/southbridge/amd/rs780/rs780_cmn.c Modified: trunk/src/southbridge/amd/rs690/rs690_cmn.c ============================================================================== --- trunk/src/southbridge/amd/rs690/rs690_cmn.c Wed Oct 13 04:46:59 2010 (r5946) +++ trunk/src/southbridge/amd/rs690/rs690_cmn.c Wed Oct 13 07:16:48 2010 (r5947) @@ -72,7 +72,7 @@ reg &= ~mask; reg |= val; if (reg != reg_old) { - *((u32 *) addr) = val; + *((u32 *) addr) = reg; } } Modified: trunk/src/southbridge/amd/rs780/rs780_cmn.c ============================================================================== --- trunk/src/southbridge/amd/rs780/rs780_cmn.c Wed Oct 13 04:46:59 2010 (r5946) +++ trunk/src/southbridge/amd/rs780/rs780_cmn.c Wed Oct 13 07:16:48 2010 (r5947) @@ -70,7 +70,7 @@ reg &= ~mask; reg |= val; if (reg != reg_old) { - *((u32 *) addr) = val; + *((u32 *) addr) = reg; } }

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Re: [coreboot] [PATCH] Drop nrv2b support from coreboot
by Carl-Daniel Hailfinger 13 Oct '10

13 Oct '10

[seems the CC to flashrom@ was lost] On 13.10.2010 04:08, Warren Turkal wrote: > On Tuesday 12 October 2010 15:32:18 you wrote: > >> Those boards are unable to map more than 512 kB of flash at a time. The >> contents of bigger flash chips have to be retrieved with programmed I/O >> in 3-byte chunks. If the LZMA code assumes the ability to unpack a >> mapped image, it will fail. You need the stream decompressor variant of >> lzma to get it working. Not sure if that variant is available in the >> tree and working. >> > > That board doesn't select CONFIG_COMPRESSED_PAYLOAD_NRV2B. Shouldn't it do so > if it depends on that type of compression? > The non-modded M57SLI should work fine with LZMA, but to be honest, working with only 512 kB of flash is not my idea of fun. It is quite possible that the default for the M57SLI is for 512 kB chips, but many people use bigger chips to have Linux or something else in flash. Regards, Carl-Daniel -- http://www.hailfinger.org/

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coreboot October 2010