coreboot June 2009

coreboot@coreboot.org

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500 discussions

Intel Eagle Height evaluation board support
by Thomas JOURDAN 01 Jul '09

01 Jul '09

Hi This series of patches add support in coreboot-v2 for the Intel Eagle Heights evaluation board (http://www.intel.com/design/intarch/manuals/316639.pdf). This board has a Core 2 Duo Mobile SL9380 (FSB 800Mhz - 45nm) processor with a SCH i3100 chipset (northbridge and southbridge in the same package). It has 2 GB of ECC memory, 6 USB, 6 Sata, 2 serial, 1 parallel, PS/2 keyboard and mouse, 3 PCIe 4x slots and 1 PCI 32bits/33Mhz slot. Features : * CAR * CBFS * a little bit of ACPI * AHCI sata (legacy IDE mode available). Things that work : * Ram with ECC (memtest ok) * All PCI / PCIe slot * All sata ports, * serial ports, PS/2 keyboard Things not tested (but should work) : * PS/2 mouse * parallel port * hpet * virtualization Things broken : * reset (the config file only has a fallback image and don't really understand the concept of failover / fallback / normal image) * vga rom -> The evaluation board comes with a PCIe 1x Matrox G550 graphics card. Coreboot fails to execute the vga rom (either x86emu, yabel or real mode). There is an exception 0x06 and everything will freeze. It could be the loadall instruction (http://en.wikipedia.org/wiki/LOADALL). I'll investigate tomorrow with a probe to understand what happens. Some remarks : - the mptable is based on the RCBA interrupt routing config registers, but not the acpi table - the mmconf is hardcoded to 0xE0000000 but I don't understand how the resource allocate can properly handle it. If you change the mmconf address in the northbridge code, don't forget to adjust the associated motherboard resource in the DSDT. For lucky people (like me) who owns the board and wants to give it a try, flashrom won't work with the original bios. The board has a SST49LF008A (FWH 1MB) on a PLCC32 socket, which is cool. But the default bios will lock down half of the chip. Flashrom will fail to properly detect it. To bypass this, I forced flashrom to detect the chip as a 49LF004A (512KB). This way, I can write a first 512KB coreboot file. After, no more problems, the full 1MB are available in flashrom. Of course, no problem if you use an external flasher. Regards, Thomas

7 30

Bug in cache_as_ram.inc and cache_as_ram_post.c
by Thomas Jourdan 01 Jul '09

01 Jul '09

Hi guys I don't know how usefull is it but there is a bug in cache_as_ram.inc and cache_as_ram_post.c for the 6fx intel processors. The code disable / enable the prefetcher in IA32_MISC_ENABLES MSR register. cache_as_ram.inc : /* Disable prefetchers */ movl $0x01a0, %eax rdmsr orl $((1 << 9) | (1 << 19)), %eax orl $((1 << 5) | (1 << 7)), %edx wrmsr should be movl $0x01a0, %ecx Same thing in cache_as_ram_post.c /* Enable prefetchers */ "movl $0x01a0, %eax\n" "rdmsr\n" "andl $~((1 << 9) | (1 << 19)), %eax\n" "andl $~((1 << 5) | (1 << 7)), %edx\n" "wrmsr\n" should be "movl $0x01a0, %ecx\n" Regards, Thomas

2 1

[RFC] Mailing list and IRC split
by Carl-Daniel Hailfinger 30 Jun '09

30 Jun '09

Hi, AFAICS the time has come to give flashrom its own mailing list (maybe flashrom(a)coreboot.org) and IRC channel (irc.freenode.net/#flashrom). I do realize this has been brought up in the past, but while I was sceptical back then, I realized that the times have changed in the last few months. The release of flashrom 0.9.0 has increased both visiblity and user base, resulting in a sizable portion of list and chat traffic to be related to flashrom. Some of us are only interested in coreboot, while others are only interested in flashrom. Since filtering mails according to subject can introduce lots of errors, having two separate lists would make watching one one of flashrom/coreboot easier. List traffic over the last few years: 2007: 29 mails/day 2008: 41 mails/day 2009: 36 mails/day Although the list traffic has not yet reached linux-kernel levels, it is already too much to read in full. I hope splitting the lists will allow people to concentrate on their personal area of interest and also encourage more reviews. After all, if you have to read less mails, you can respond to more of them. One issue to solve is how we want to handle flashrom success/failure reports sent to flashrom(a)coreboot.org. Right now they end up on an unmoderated private list. After the change, they'd get a message that the list is moderated. This might discourage users, so we have to think of a nice moderation message, possibly mentioning that emergency help for broken flash is available on IRC. The suggested way forward is outlined below: 1. Register #flashrom on irc.freenode.net (done) 2. Invite parties interested in flashrom to join #flashrom besides #coreboot. 3. Pre-Announce the mailing list split with the following text: "coreboot(a)coreboot.org will be split in two lists. flashrom(a)coreboot.org is where flashrom development and usage will be discussed. coreboot(a)coreboot.org will carry all traffic not related to flashrom. coreboot(a)coreboot.org list members will be subscribed automatically to flashrom(a)coreboot.org. If you are only interested in either coreboot or flashrom, feel free to unsubscribe from either list once the split is done." 4. Wait a week for protests etc. 5. Create a new mailing list flashrom(a)coreboot.org with the same subscribers as coreboot(a)coreboot.org. 6. Announce the mailing list split with the following text: "coreboot(a)coreboot.org has been split in two lists. flashrom(a)coreboot.org is where flashrom development and usage are discussed from now own. coreboot(a)coreboot.org carries all traffic not related to flashrom. coreboot(a)coreboot.org list members have been subscribed automatically to flashrom(a)coreboot.org. If you are only interested in either coreboot or flashrom, feel free to unsubscribe from either list." Thoughts? Flames? Regards, Carl-Daniel

4 5

[PATCH] Changes for DLP 1232H external programer to Flashrom
by Jakob Bornecrantz 30 Jun '09

30 Jun '09

Hi all. These are the changes I had to do the flashrom to get my in circuit programer working. Not much as you can see. Unfortunately it seems to have problems writing to the chip. The first time I tried it it worked well. Writing random data to the chip. But when I then tried to write the bios image. After several tries, adding more capacitors, increasing the bus speed (yes increasing not decreasing) and always erasing the chip before doing a write I got good write. There where a couple of write runs that seems to be get partial success, parts of the bios looked okay while parts where still all FF. Increasing the bus speed seemed to make it write more data. I have some pictures of the programer here: http://irc.walkyrie.se/coreboot/pictures/ Signed-off-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Cheers Jakob.

3 4

build service results for r4384
by coreboot information 30 Jun '09

30 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4384 to the coreboot repository. This caused the following changes: Change Log: the tool chain settings should not be in renamed (as they will never live in Kconfig) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4384&device=sandpointx3_al… Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4384&device=epia-m700&vend… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

[v2] r4384 - in trunk/coreboot-v2: src/arch/i386 src/config src/mainboard/a-trend/atc-6220 src/mainboard/a-trend/atc-6240 src/mainboard/abit/be6-ii_v2_0 src/mainboard/advantech/pcm-5820 src/mainboard/amd/db800 src/mainboard/amd/dbm690t src/mainboard/amd/norwich src/mainboard/amd/pistachio src/mainboard/amd/rumba src/mainboard/amd/serengeti_cheetah src/mainboard/amd/serengeti_cheetah_fam10 src/mainboard/arima/hdama src/mainboard/artecgroup/dbe61 src/mainboard/asi/mb_5blgp src/mainboard/asi/mb_5blm
by svn＠coreboot.org 30 Jun '09

30 Jun '09

Author: stepan Date: 2009-06-30 19:13:58 +0200 (Tue, 30 Jun 2009) New Revision: 4384 Modified: trunk/coreboot-v2/src/arch/i386/Config.lb trunk/coreboot-v2/src/config/Config.lb trunk/coreboot-v2/src/config/Options.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb trunk/coreboot-v2/src/mainboard/embeddedplanet/ep405pc/Options.lb trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/motorola/sandpoint/Options.lb trunk/coreboot-v2/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb trunk/coreboot-v2/src/mainboard/totalimpact/briq/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb trunk/coreboot-v2/src/mainboard/via/epia/Options.lb trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb trunk/coreboot-v2/src/northbridge/intel/e7520/Config.lb trunk/coreboot-v2/src/northbridge/intel/e7525/Config.lb trunk/coreboot-v2/targets/amd/dbm690t/Config-abuild.lb trunk/coreboot-v2/targets/amd/pistachio/Config-abuild.lb trunk/coreboot-v2/targets/amd/serengeti_cheetah/Config-abuild.lb trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb trunk/coreboot-v2/targets/arima/hdama/Config-abuild.lb trunk/coreboot-v2/targets/asus/a8n_e/Config-abuild.lb trunk/coreboot-v2/targets/asus/m2v-mx_se/Config-abuild.lb trunk/coreboot-v2/targets/bcom/winnetp680/Config-abuild.lb trunk/coreboot-v2/targets/digitallogic/msm586seg/Config-abuild.lb trunk/coreboot-v2/targets/emulation/qemu-x86/Config-abuild.lb trunk/coreboot-v2/targets/gigabyte/ga_2761gxdk/Config-abuild.lb trunk/coreboot-v2/targets/gigabyte/m57sli/Config-abuild.lb trunk/coreboot-v2/targets/ibm/e326/Config-abuild.lb trunk/coreboot-v2/targets/iei/juki-511p/Config-abuild.lb trunk/coreboot-v2/targets/iwill/dk8_htx/Config-abuild.lb trunk/coreboot-v2/targets/jetway/j7f24/Config-abuild.lb trunk/coreboot-v2/targets/kontron/986lcd-m/Config-abuild.lb trunk/coreboot-v2/targets/msi/ms7135/Config-abuild.lb trunk/coreboot-v2/targets/msi/ms7260/Config-abuild.lb trunk/coreboot-v2/targets/msi/ms9185/Config-abuild.lb trunk/coreboot-v2/targets/msi/ms9282/Config-abuild.lb trunk/coreboot-v2/targets/nvidia/l1_2pvv/Config-abuild.lb trunk/coreboot-v2/targets/rca/rm4100/Config-abuild.lb trunk/coreboot-v2/targets/supermicro/h8dme/Config-abuild.lb trunk/coreboot-v2/targets/supermicro/h8dmr/Config-abuild.lb trunk/coreboot-v2/targets/technexion/tim8690/Config-abuild.lb trunk/coreboot-v2/targets/technologic/ts5300/Config-abuild.lb trunk/coreboot-v2/targets/thomson/ip1000/Config-abuild.lb trunk/coreboot-v2/targets/tyan/s2891/Config-abuild.lb trunk/coreboot-v2/targets/tyan/s2892/Config-abuild.lb trunk/coreboot-v2/targets/tyan/s2895/Config-abuild.lb trunk/coreboot-v2/targets/tyan/s2912/Config-abuild.lb trunk/coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb trunk/coreboot-v2/targets/via/epia-cn/Config-abuild.lb trunk/coreboot-v2/targets/via/epia-m/Config-abuild.lb trunk/coreboot-v2/targets/via/pc2500e/Config-abuild.lb trunk/coreboot-v2/targets/via/vt8454c/Config-abuild.lb trunk/coreboot-v2/util/abuild/abuild trunk/coreboot-v2/util/cbfstool/Makefile trunk/coreboot-v2/util/cbfstool/tools/Makefile Log: the tool chain settings should not be in renamed (as they will never live in Kconfig) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/coreboot-v2/src/arch/i386/Config.lb =================================================================== --- trunk/coreboot-v2/src/arch/i386/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/arch/i386/Config.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -54,7 +54,7 @@ makerule nrv2b depends "$(TOP)/util/nrv2b/nrv2b.c" - action "$(CONFIG_HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@" + action "$(HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@" end makerule payload Modified: trunk/coreboot-v2/src/config/Config.lb =================================================================== --- trunk/coreboot-v2/src/config/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/config/Config.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -136,7 +136,7 @@ # the buildrom tool makerule buildrom depends "$(TOP)/util/buildrom/buildrom.c" - action "$(CONFIG_HOSTCC) -o $@ $<" + action "$(HOSTCC) -o $@ $<" end # Force crt0.s (which has build time version code in it to rebuild every time) @@ -178,13 +178,13 @@ # be in a correct and valid state if it exists because the move is atomic. makerule ../romcc depends "$(TOP)/util/romcc/romcc.c" - action "$(CONFIG_HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile" + action "$(HOSTCC) -g $(HOSTCFLAGS) $< -o romcc.tmpfile" action "mv romcc.tmpfile $@" end makerule build_opt_tbl depends "$(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/coreboot_tables.h Makefile.settings Makefile" - action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@" + action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) $< -o $@" end makerule option_table.h option_table.c Modified: trunk/coreboot-v2/src/config/Options.lb =================================================================== --- trunk/coreboot-v2/src/config/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/config/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -86,7 +86,7 @@ export always comment "Target C Compiler" end -define CONFIG_HOSTCC +define HOSTCC default "gcc" export always comment "Host C Compiler" Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -88,7 +88,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc " -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -136,7 +136,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -72,7 +72,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -240,7 +240,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -136,7 +136,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -72,7 +72,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -240,7 +240,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -32,7 +32,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -115,7 +115,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -56,7 +56,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -274,7 +274,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -75,7 +75,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -308,7 +308,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/arima/hdama/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -48,7 +48,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -186,7 +186,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -136,7 +136,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc " -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -30,7 +30,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -112,7 +112,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/a8n_e/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -65,7 +65,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -156,7 +156,7 @@ default CONFIG_RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_GDB_STUB = 0 default CONFIG_USE_PRINTK_IN_CAR=1 default CONFIG_CONSOLE_SERIAL8250 = 1 Modified: trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/a8v-e_se/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -61,7 +61,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -157,7 +157,7 @@ # default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE default CONFIG_ROM_PAYLOAD = 1 default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_GDB_STUB = 0 default CONFIG_USE_PRINTK_IN_CAR = 1 default CONFIG_CONSOLE_SERIAL8250 = 1 Modified: trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/m2v-mx_se/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -63,7 +63,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -160,7 +160,7 @@ # default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE default CONFIG_ROM_PAYLOAD = 1 default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_GDB_STUB = 0 default CONFIG_USE_PRINTK_IN_CAR=1 default CONFIG_CONSOLE_SERIAL8250 = 1 Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -32,7 +32,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -112,7 +112,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -88,7 +88,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -94,7 +94,7 @@ default CONFIG_IOAPIC = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -94,7 +94,7 @@ default CONFIG_IOAPIC = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc " -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc " -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -55,7 +55,7 @@ uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -94,7 +94,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/broadcom/blast/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -206,7 +206,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL @@ -111,7 +111,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -34,7 +34,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_SERIAL8250 @@ -119,7 +119,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -136,7 +136,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -32,7 +32,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -118,7 +118,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/embeddedplanet/ep405pc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/embeddedplanet/ep405pc/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/embeddedplanet/ep405pc/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses COREBOOT_EXTRA_VERSION uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY ## Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -34,7 +34,7 @@ uses CONFIG_HAVE_HIGH_TABLES uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_PCI_ROM_RUN uses CONFIG_PCI_OPTION_ROM_RUN_REALMODE @@ -129,7 +129,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## known-good settings for qemu Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga_2761gxdk/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -80,7 +80,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT @@ -298,7 +298,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/gigabyte/m57sli/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -78,7 +78,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT @@ -307,7 +307,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/hp/dl145_g3/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -77,7 +77,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -271,7 +271,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -44,7 +44,7 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_USE_DCACHE_RAM uses CONFIG_DCACHE_RAM_BASE @@ -170,7 +170,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" default CONFIG_USE_PRINTK_IN_CAR=1 Modified: trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -44,7 +44,7 @@ uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -176,7 +176,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" default CONFIG_USE_PRINTK_IN_CAR=1 Modified: trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -35,7 +35,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL @@ -141,7 +141,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" default CONFIG_VIDEO_MB = 0 Modified: trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -30,7 +30,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -125,7 +125,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -54,7 +54,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -98,7 +98,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY uses CONFIG_MAX_REBOOT_CNT @@ -182,7 +182,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -64,7 +64,7 @@ uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -171,7 +171,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -64,7 +64,7 @@ uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -171,7 +171,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -39,7 +39,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -180,7 +180,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8_htx/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -56,7 +56,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -273,7 +273,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -48,7 +48,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_USE_DCACHE_RAM uses CONFIG_DCACHE_RAM_BASE @@ -172,7 +172,7 @@ ## The default compiler ## #default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -#default CONFIG_HOSTCC="gcc" +#default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -48,7 +48,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_USE_DCACHE_RAM uses CONFIG_DCACHE_RAM_BASE @@ -171,7 +171,7 @@ ## The default compiler ## #default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -#default CONFIG_HOSTCC="gcc" +#default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -55,7 +55,7 @@ uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. Modified: trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -95,7 +95,7 @@ uses CONFIG_DEBUG # Toolchain uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY # Tweaks @@ -269,7 +269,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -32,7 +32,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -115,7 +115,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -61,7 +61,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEBUG uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL @@ -164,7 +164,7 @@ ## default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -61,7 +61,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEBUG uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL @@ -164,7 +164,7 @@ ## default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/motorola/sandpoint/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/motorola/sandpoint/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/motorola/sandpoint/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -47,7 +47,7 @@ uses COREBOOT_EXTRA_VERSION uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY ## @@ -65,7 +65,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## use a cross compiler #default CONFIG_CROSS_COMPILE="powerpc-eabi-" #default CONFIG_CROSS_COMPILE="ppc_74xx-" Modified: trunk/coreboot-v2/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/motorola/sandpointx3_altimus_mpc7410/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -43,7 +43,7 @@ uses COREBOOT_EXTRA_VERSION uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY ## @@ -61,7 +61,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## use a cross compiler #default CONFIG_CROSS_COMPILE="powerpc-eabi-" #default CONFIG_CROSS_COMPILE="ppc_74xx-" Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -85,7 +85,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms7135/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -65,7 +65,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -265,7 +265,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms7260/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -72,7 +72,7 @@ uses CONFIG_HAVE_INIT_TIMER # ? uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -176,7 +176,7 @@ default CONFIG_RAMBASE = 0x00100000 default CONFIG_ROM_PAYLOAD = 1 default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_USE_PRINTK_IN_CAR = 1 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 Modified: trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms9185/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -77,7 +77,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -275,7 +275,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/msi/ms9282/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -63,7 +63,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -254,7 +254,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -84,7 +84,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/newisys/khepri/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -189,7 +189,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/nvidia/l1_2pvv/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -78,7 +78,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT @@ -296,7 +296,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -116,7 +116,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -33,7 +33,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -116,7 +116,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -53,7 +53,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -154,7 +154,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## The Serial Console Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -41,7 +41,7 @@ uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HEAP_SIZE -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_IRQ_SLOT_COUNT uses COREBOOT_EXTRA_VERSION uses CONFIG_MAINBOARD @@ -87,7 +87,7 @@ default CONFIG_USE_OPTION_TABLE = 0 default CONFIG_ROM_PAYLOAD = 1 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -51,7 +51,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -87,7 +87,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/sunw/ultra40/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -41,7 +41,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -222,7 +222,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dme/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -80,7 +80,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -298,7 +298,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/h8dmr/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -78,7 +78,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -293,7 +293,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_BTEXT uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_CROSS_COMPILE uses CONFIG_OBJCOPY @@ -168,7 +168,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/technexion/tim8690/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -72,7 +72,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -241,7 +241,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -34,7 +34,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -134,7 +134,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" # # CBFS Modified: trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_XIP_ROM_BASE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -96,7 +96,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc " -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -41,7 +41,7 @@ uses CONFIG_HAVE_OPTION_TABLE uses CONFIG_HAVE_PIRQ_TABLE uses CONFIG_HEAP_SIZE -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_IRQ_SLOT_COUNT uses COREBOOT_EXTRA_VERSION uses CONFIG_MAINBOARD @@ -87,7 +87,7 @@ default CONFIG_USE_OPTION_TABLE = 0 default CONFIG_ROM_PAYLOAD = 1 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/totalimpact/briq/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/totalimpact/briq/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/totalimpact/briq/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -44,7 +44,7 @@ uses COREBOOT_EXTRA_VERSION uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY ## @@ -69,7 +69,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## use a cross compiler #default CONFIG_CROSS_COMPILE="powerpc-eabi-" #default CONFIG_CROSS_COMPILE="ppc_74xx-" Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -52,7 +52,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -88,7 +88,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 default CONFIG_TTYS0_BASE = 0x3f8 Modified: trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -43,7 +43,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -202,7 +202,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -190,7 +190,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -191,7 +191,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2880/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -190,7 +190,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -207,7 +207,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2882/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -190,7 +190,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -217,7 +217,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2891/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -46,7 +46,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -246,7 +246,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2892/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -46,7 +46,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -234,7 +234,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2895/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -49,7 +49,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_TTYS0_BAUD uses CONFIG_TTYS0_BASE @@ -253,7 +253,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -78,7 +78,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT @@ -298,7 +298,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s2912_fam10/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -77,7 +77,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_USBDEBUG_DIRECT @@ -307,7 +307,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -199,7 +199,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/tyan/s4882/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -50,7 +50,7 @@ uses CONFIG_GDB_STUB uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN @@ -198,7 +198,7 @@ ## The default compiler ## default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Disable the gdb stub by default Modified: trunk/coreboot-v2/src/mainboard/via/epia/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -41,7 +41,7 @@ uses CONFIG_HAVE_MP_TABLE uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY # logging @@ -138,7 +138,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -55,7 +55,7 @@ uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -95,7 +95,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -35,7 +35,7 @@ uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -128,7 +128,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Set this to the max PCI bus number you Modified: trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/epia-m700/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -53,7 +53,7 @@ uses CONFIG_HAVE_ACPI_TABLES uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -134,7 +134,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_CBFS = 0 ## Modified: trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -56,7 +56,7 @@ uses CONFIG_HAVE_ACPI_RESUME uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL @@ -103,7 +103,7 @@ default CONFIG_ROM_PAYLOAD = 1 default CONFIG_CROSS_COMPILE = "" default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector" -default CONFIG_HOSTCC = "gcc" +default HOSTCC = "gcc" default CONFIG_MAX_PCI_BUSES = 3 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_TTYS0_BAUD = 115200 Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -60,7 +60,7 @@ # compiler specifics uses CONFIG_CROSS_COMPILE uses CC -uses CONFIG_HOSTCC +uses HOSTCC uses CONFIG_OBJCOPY # Console specifics @@ -185,7 +185,7 @@ ## default CONFIG_CROSS_COMPILE="" default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default CONFIG_HOSTCC="gcc" +default HOSTCC="gcc" ## ## Set this to the max PCI bus number you Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb =================================================================== --- trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/northbridge/amd/amdk8/Config.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -16,7 +16,7 @@ makerule raminit_test depends "$(TOP)/src/northbridge/amd/amdk8/raminit_test.c" depends "$(TOP)/src/northbridge/amd/amdk8/raminit_f.c" - action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" + action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" end else @@ -24,7 +24,7 @@ makerule raminit_test depends "$(TOP)/src/northbridge/amd/amdk8/raminit_test.c" depends "$(TOP)/src/northbridge/amd/amdk8/raminit.c" - action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" + action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" end end Modified: trunk/coreboot-v2/src/northbridge/intel/e7520/Config.lb =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7520/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/northbridge/intel/e7520/Config.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -12,5 +12,5 @@ makerule raminit_test depends "$(TOP)/src/northbridge/intel/e7520/raminit_test.c" depends "$(TOP)/src/northbridge/intel/e7520/raminit.c" - action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" + action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" end Modified: trunk/coreboot-v2/src/northbridge/intel/e7525/Config.lb =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/e7525/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/src/northbridge/intel/e7525/Config.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -12,5 +12,5 @@ makerule raminit_test depends "$(TOP)/src/northbridge/intel/e7525/raminit_test.c" depends "$(TOP)/src/northbridge/intel/e7525/raminit.c" - action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" + action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@" end Modified: trunk/coreboot-v2/targets/amd/dbm690t/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/amd/dbm690t/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/amd/dbm690t/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/amd/pistachio/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/amd/pistachio/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/amd/pistachio/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/amd/serengeti_cheetah/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/amd/serengeti_cheetah/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/amd/serengeti_cheetah/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/arima/hdama/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/arima/hdama/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/arima/hdama/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/asus/a8n_e/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/asus/a8n_e/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/asus/a8n_e/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/asus/m2v-mx_se/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/asus/m2v-mx_se/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/asus/m2v-mx_se/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -22,7 +22,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" ## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use ## (normal AND fallback images and payloads). Modified: trunk/coreboot-v2/targets/bcom/winnetp680/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/bcom/winnetp680/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/bcom/winnetp680/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/digitallogic/msm586seg/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/digitallogic/msm586seg/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/digitallogic/msm586seg/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -3,7 +3,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/emulation/qemu-x86/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/emulation/qemu-x86/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/emulation/qemu-x86/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -3,7 +3,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/gigabyte/ga_2761gxdk/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/gigabyte/ga_2761gxdk/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/gigabyte/ga_2761gxdk/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -24,7 +24,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/gigabyte/m57sli/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/gigabyte/m57sli/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/gigabyte/m57sli/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/ibm/e326/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/ibm/e326/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/ibm/e326/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/iei/juki-511p/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/iei/juki-511p/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/iei/juki-511p/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -3,7 +3,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/iwill/dk8_htx/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/iwill/dk8_htx/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/iwill/dk8_htx/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/jetway/j7f24/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/jetway/j7f24/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/jetway/j7f24/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/kontron/986lcd-m/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/kontron/986lcd-m/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/kontron/986lcd-m/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/msi/ms7135/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/msi/ms7135/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/msi/ms7135/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/msi/ms7260/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/msi/ms7260/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/msi/ms7260/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -23,7 +23,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/msi/ms9185/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/msi/ms9185/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/msi/ms9185/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/msi/ms9282/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/msi/ms9282/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/msi/ms9282/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/nvidia/l1_2pvv/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/nvidia/l1_2pvv/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/nvidia/l1_2pvv/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/rca/rm4100/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/rca/rm4100/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/rca/rm4100/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -23,7 +23,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/supermicro/h8dme/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/supermicro/h8dme/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/supermicro/h8dme/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/supermicro/h8dmr/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/supermicro/h8dmr/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/supermicro/h8dmr/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/technexion/tim8690/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/technexion/tim8690/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/technexion/tim8690/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/technologic/ts5300/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/technologic/ts5300/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/technologic/ts5300/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -3,7 +3,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/thomson/ip1000/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/thomson/ip1000/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/thomson/ip1000/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -23,7 +23,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/tyan/s2891/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2891/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/tyan/s2891/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/tyan/s2892/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2892/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/tyan/s2892/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/tyan/s2895/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2895/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/tyan/s2895/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/tyan/s2912/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2912/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/tyan/s2912/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -23,7 +23,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/via/epia-cn/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/via/epia-cn/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/via/epia-cn/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -5,7 +5,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/via/epia-m/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/via/epia-m/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/via/epia-m/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -3,7 +3,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/via/pc2500e/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/via/pc2500e/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/via/pc2500e/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -23,7 +23,7 @@ option CC = "CROSSCC" option CONFIG_CROSS_COMPILE = "CROSS_PREFIX" -option CONFIG_HOSTCC = "CROSS_HOSTCC" +option HOSTCC = "CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/targets/via/vt8454c/Config-abuild.lb =================================================================== --- trunk/coreboot-v2/targets/via/vt8454c/Config-abuild.lb 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/targets/via/vt8454c/Config-abuild.lb 2009-06-30 17:13:58 UTC (rev 4384) @@ -26,7 +26,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" option CONFIG_ROM_SIZE=512*1024 Modified: trunk/coreboot-v2/util/abuild/abuild =================================================================== --- trunk/coreboot-v2/util/abuild/abuild 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/util/abuild/abuild 2009-06-30 17:13:58 UTC (rev 4384) @@ -166,7 +166,7 @@ option CC="CROSSCC" option CONFIG_CROSS_COMPILE="CROSS_PREFIX" -option CONFIG_HOSTCC="CROSS_HOSTCC" +option HOSTCC="CROSS_HOSTCC" __COMPRESSION__ __LOGLEVEL__ Modified: trunk/coreboot-v2/util/cbfstool/Makefile =================================================================== --- trunk/coreboot-v2/util/cbfstool/Makefile 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/util/cbfstool/Makefile 2009-06-30 17:13:58 UTC (rev 4384) @@ -8,7 +8,7 @@ OBJ=$(COMMANDS) cbfstool.o util.o fs.o INC=cbfstool.h cbfs.h -CONFIG_HOSTCC ?= gcc +HOSTCC ?= gcc HOSTCXX ?= g++ CFLAGS=-g -Wall -W -Werror @@ -18,7 +18,7 @@ all: $(obj)/cbfstool $(obj)/tools/cbfs-mkpayload $(obj)/tools/cbfs-mkstage $(obj)/cbfstool: $(patsubst %,$(obj)/%,$(OBJ)) - $(CONFIG_HOSTCC) -o $@ $(patsubst %,$(obj)/%,$(OBJ)) + $(HOSTCC) -o $@ $(patsubst %,$(obj)/%,$(OBJ)) tobj = $(obj)/tools tsrc = $(shell pwd)/tools @@ -26,7 +26,7 @@ include $(tsrc)/Makefile $(obj)/%.o: %.c $(INC) - $(CONFIG_HOSTCC) $(CFLAGS) -c -o $@ $< + $(HOSTCC) $(CFLAGS) -c -o $@ $< install: $(obj)/cbfstool $(obj)/tools/cbfs-mkpayload $(obj)/tools/cbfs-mkstage @ install -d $(DESTDIR) Modified: trunk/coreboot-v2/util/cbfstool/tools/Makefile =================================================================== --- trunk/coreboot-v2/util/cbfstool/tools/Makefile 2009-06-30 15:54:53 UTC (rev 4383) +++ trunk/coreboot-v2/util/cbfstool/tools/Makefile 2009-06-30 17:13:58 UTC (rev 4384) @@ -18,7 +18,7 @@ $(HOSTCXX) $(CFLAGS) -o $@ $^ $(tobj)/%.o: %.c - $(CONFIG_HOSTCC) $(CFLAGS) -c -o $@ $< + $(HOSTCC) $(CFLAGS) -c -o $@ $< tools-clean: rm -f $(tobj)/cbfs-mkpayload.o $(tobj)/cbfs-mkstage.o $(patsubst %,$(tobj)/%,$(COMMON))

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build service results for r4383
by coreboot information 30 Jun '09

30 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4383 to the coreboot repository. This caused the following changes: Change Log: whoops. missed those two.. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Configuration of embeddedplanet:ep405pc has been fixed Configuration of motorola:sandpointx3_altimus_mpc7410 has been fixed Configuration of totalimpact:briq has been fixed Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4383&device=epia-m700&vend… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

1 0

build service results for r4382
by coreboot information 30 Jun '09

30 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4382 to the coreboot repository. This caused the following changes: Change Log: commit svn:externals for last commit (what a pain) (1/2) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4382&device=ep405pc&vendor… Configuration of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4382&device=sandpointx3_al… Configuration of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4382&device=briq&vendor=to… Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4382&device=epia-m700&vend… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[v2] r4383 - in trunk/coreboot-v2: targets/tyan/s2912_fam10 util/abuild
by svn＠coreboot.org 30 Jun '09

30 Jun '09

Author: stepan Date: 2009-06-30 17:54:53 +0200 (Tue, 30 Jun 2009) New Revision: 4383 Modified: trunk/coreboot-v2/targets/tyan/s2912_fam10/Config.lb trunk/coreboot-v2/util/abuild/abuild Log: whoops. missed those two.. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/targets/tyan/s2912_fam10/Config.lb =================================================================== --- trunk/coreboot-v2/targets/tyan/s2912_fam10/Config.lb 2009-06-30 15:23:20 UTC (rev 4382) +++ trunk/coreboot-v2/targets/tyan/s2912_fam10/Config.lb 2009-06-30 15:54:53 UTC (rev 4383) @@ -25,7 +25,7 @@ mainboard tyan/s2912_fam10 # Make room for ATI ES1000 VGA ROM -option CONFIG_ROM_SIZE=ROM_SIZE-44*1024 +option CONFIG_ROM_SIZE=CONFIG_ROM_SIZE-44*1024 romimage "normal" option CONFIG_USE_FAILOVER_IMAGE=0 Modified: trunk/coreboot-v2/util/abuild/abuild =================================================================== --- trunk/coreboot-v2/util/abuild/abuild 2009-06-30 15:23:20 UTC (rev 4382) +++ trunk/coreboot-v2/util/abuild/abuild 2009-06-30 15:54:53 UTC (rev 4383) @@ -201,7 +201,7 @@ option COREBOOT_EXTRA_VERSION=".0" payload __PAYLOAD__ end -buildrom ./coreboot.rom ROM_SIZE "only" +buildrom ./coreboot.rom CONFIG_ROM_SIZE "only" EOF fi ) > $TARGET/Config-${VENDOR}_${MAINBOARD}.lb

1 0

build service results for r4381
by coreboot information 30 Jun '09

30 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 4381 to the coreboot repository. This caused the following changes: Change Log: This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Build Log: Configuration of embeddedplanet:ep405pc has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4381&device=ep405pc&vendor… Configuration of motorola:sandpointx3_altimus_mpc7410 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4381&device=sandpointx3_al… Configuration of totalimpact:briq has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4381&device=briq&vendor=to… Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4381&device=epia-m700&vend… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot June 2009