coreboot June 2009

coreboot@coreboot.org

84 participants
500 discussions

Re: [coreboot] ACPI on M57SLI
by Ronald Hoogenboom 18 Jun '09

18 Jun '09

Hi Harald, On Sun, 2009-06-14 at 16:59 +0200, Harald Gutmann wrote: > Hello, > > I posted right now the ACPI patch for M57SLI[1] to the list. > Hopefully you can test and verify this once again. I tried it after first undoing your previous acpi patch, but it doesn't work for me. The linux kernel freezes directly after printing the initialization message for the serial driver. So I think there is still something not right with the interrupt routing. > > Enjoy it! > I enjoyed it anyway. Ronald.

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flashrom: Macronix MX29F040C support
by Arjan Koers 18 Jun '09

18 Jun '09

Hello, The flash part in my MSI ms-7021 (KT6V) mainboard wasn't recognized. After peeling the label off, the markings on the chip showed: MX 29F040QC-90 This is a Macronix MX29F040C (Q=PLCC; C=0C..70C; 90=90ns) The software commands in the datasheet seem to match those of the AMD Am29F040B and ST M29F040B. I copied the configuration and performed some tests. Probe, read, erase and write all work (see below for code and results). Since the software commands for a different Macronix part (MX29LV040C) also appear to be the same, I copied the configuration for that part and performed some more tests. Probe, read, erase and write all work and writing is about twice as fast. I'm not sure why the code writes to address 0x5555 and 0x2AAA instead of 0x555 and 0x2AA as specified in the datasheet, but it seems to work. Maybe someone with more knowledge about these flash parts knows what's the best way to support this MX29F040C part? Please let me know if you need more information (i.e. -V debug output). MX29F040C with *_29f040b probe, erase and write functions: Index: flashchips.c =================================================================== --- flashchips.c (revision 602) +++ flashchips.c (working copy) @@ -1403,6 +1403,22 @@ { .vendor = "Macronix", + .name = "MX29F040C", + .bustype = CHIP_BUSTYPE_NONSPI, + .manufacture_id = MX_ID, + .model_id = MX_29F040C, + .total_size = 512, + .page_size = 64 * 1024, + .tested = TEST_OK_PREW, + .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .erase = erase_29f040b, + .write = write_29f040b, + .read = read_memmapped, + }, + + { + .vendor = "Macronix", .name = "MX29LV040C", .bustype = CHIP_BUSTYPE_NONSPI, .manufacture_id = MX_ID, # dd if=/dev/urandom of=random.bin bs=1024 count=512 ; time ./flashrom -w random.bin ; time ./flashrom -v random.bin 512+0 records in 512+0 records out 524288 bytes (524 kB) copied, 0.182563 s, 2.9 MB/s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page 0007 at address: 0x0007ffff COMPLETE. real 0m27.706s user 0m11.657s sys 0m0.020s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. real 0m2.757s user 0m2.740s sys 0m0.016s # time ./flashrom -E ; time ./flashrom -r empty.bin ; hexdump -C empty.bin flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Erasing flash chip... SUCCESS. real 0m7.647s user 0m7.640s sys 0m0.008s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Reading flash... done. real 0m2.761s user 0m2.748s sys 0m0.016s 00000000 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| * 00080000 MX29F040C with *_29f002 probe, erase and write functions: Index: flashchips.c =================================================================== --- flashchips.c (revision 602) +++ flashchips.c (working copy) @@ -1403,6 +1403,22 @@ { .vendor = "Macronix", + .name = "MX29F040C", + .bustype = CHIP_BUSTYPE_NONSPI, + .manufacture_id = MX_ID, + .model_id = MX_29F040C, + .total_size = 512, + .page_size = 64 * 1024, + .tested = TEST_OK_PREW, + .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .erase = erase_29f002, + .write = write_29f002, + .read = read_memmapped, + }, + + { + .vendor = "Macronix", .name = "MX29LV040C", .bustype = CHIP_BUSTYPE_NONSPI, .manufacture_id = MX_ID, # dd if=/dev/urandom of=random.bin bs=1024 count=512 ; time ./flashrom -w random.bin ; time ./flashrom -v random.bin 512+0 records in 512+0 records out 524288 bytes (524 kB) copied, 0.180451 s, 2.9 MB/s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: address: 0x0007f000 COMPLETE. real 0m14.711s user 0m14.669s sys 0m0.004s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. real 0m2.766s user 0m2.748s sys 0m0.016s # time ./flashrom -E ; time ./flashrom -r empty.bin ; hexdump -C empty.bin flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Erasing flash chip... SUCCESS. real 0m7.636s user 0m7.628s sys 0m0.008s flashrom v0.9.0-r602 No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Calibrating delay loop... OK. Found chip "Macronix MX29F040C" (512 KB) at physical address 0xfff80000. Reading flash... done. real 0m2.756s user 0m2.732s sys 0m0.016s 00000000 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................| * 00080000

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Re: [coreboot] [patch][v2]:fam10 microcode
by Maximilian Thuermer 18 Jun '09

18 Jun '09

Hi all, while working on porting an HP DL 145G3 to K10 support with rev C2 Opterons, our team stumbled across the same problem Ward described in his thread. I tried out all errata fixes and the latest microcode patch files - no success. We tracked down the problem to be in the CpuFindCapability function which returns faulty offsets to address the ht phy links. For instance, when link 0 is to be accessed, the function returns A0 as an offset thereby leading function "AMD_checkLinkType" to check for a present and correctly initialized channel on link1. Now, when the AMD_SetHtPhyRegister function hits the function 4 portal of link1, the do/while loop waits for a completion bit to be set on a link that may not even be connected. According to the BKDG, the completion flag will never be set on an uninitialized link, therefore the system hang. Below is a fix of abovementioned function which spits out correct offsets. I am not sure, why this problem did not occur with previous revisions. My guess though is that this defined behaviour is something new to the C2 series. Also, this problem is highly topology dependent. When working with motherboards with all Opteron links properly connected and initialized, the only effect one would see is a missing switch to HT3 frequencies on link0. Hope this helps some people. Best regards, Maximilian Thuermer Index: init_cpus.c =================================================================== --- init_cpus.c (revision 4048) +++ init_cpus.c (working copy) @@ -705,37 +705,40 @@ * * Returns the offset of the link register. */ -BOOL AMD_CpuFindCapability (u8 node, u8 cap_count, u8 *offset) +BOOL AMD_CpuFindCapability (u8 node, u8 link_no, u8 *offset) { u32 val; + u8 cap_count = 0; /* get start of CPU HT Host Capabilities */ val = pci_read_config32(NODE_PCI(node, 0), 0x34); val &= 0xFF; - cap_count++; - /* Traverse through the capabilities. */ - do { + while((cap_count < link_no) && val) + { val = pci_read_config32(NODE_PCI(node, 0), val); /* Is the capability block a HyperTransport capability block? */ if ((val & 0xFF) == 0x08) /* Is the HT capability block an HT Host Capability? */ if ((val & 0xE0000000) == (1 << 29)) - cap_count--; + cap_count++; val = (val >> 8) & 0xFF; - } while (cap_count && val); + } *offset = (u8) val; + //printk_debug("Offset is 0x%x \n", (u8)val); + /* If requested capability found val != 0 */ - if (!cap_count) + if (val != 0x00) return TRUE; else return FALSE; }

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[flashrom] r605 - trunk
by svn＠coreboot.org 18 Jun '09

18 Jun '09

Author: uwe Date: 2009-06-18 20:25:39 +0200 (Thu, 18 Jun 2009) New Revision: 605 Modified: trunk/board_enable.c Log: Some more board status updates: Mark as OK: - ASRock A770CrossFire (reported by RIVANVX on IRC, no email available). User verified read and write with -wv, which VERIFIED OK. Mark as non-working for now: - HP/Compaq nx9010 (laptop, reported by Murawski Mateusz <matowy(a)tlen.pl>). Hangs upon 'flashrom -V' (needs hard power-cycle then). - Elitegroup K7VTA3 (reported by Uwe Hermann <uwe(a)hermann-uwe.de>). Needs board-enable. - GIGABYTE GA-7ZM (reported by Uwe Hermann <uwe(a)hermann-uwe.de>). Needs board-enable. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-18 14:04:44 UTC (rev 604) +++ trunk/board_enable.c 2009-06-18 18:25:39 UTC (rev 605) @@ -762,6 +762,7 @@ { "Abit", "AX8", }, { "Advantech", "PCM-5820", }, { "ASI", "MB-5BLMP", }, + { "ASRock", "A770CrossFire", }, { "ASUS", "A7N8X Deluxe", }, { "ASUS", "A7N8X-E Deluxe", }, { "ASUS", "A7V400-MX", }, @@ -847,7 +848,9 @@ { "Biostar", "M6TBA", }, { "Boser", "HS-6637", }, { "DFI", "855GME-MGF", }, + { "Elitegroup", "K7VTA3", }, { "FIC", "VA-502", }, + { "GIGABYTE", "GA-7ZM", }, { "MSI", "MS-6178", }, { "MSI", "MS-7260 (K9N Neo)", }, { "PCCHIPS", "M537DMA33", }, @@ -873,6 +876,7 @@ /* Verified non-working boards (for now). */ { "Acer", "Aspire One", }, { "Dell", "Latitude CPi A366XT", }, + { "HP/Compaq", "nx9010", }, { "IBM/Lenovo", "Thinkpad T40p", }, { "IBM/Lenovo", "240", },

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build service results for r4363
by coreboot information 18 Jun '09

18 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "ward" checked in revision 4363 to the coreboot repository. This caused the following changes: Change Log: Make sure the address variable is initialized to zero - it is only set when a [base address] parameter is supplied on the command line... This patch fixes random segfaults when using 'cbfstool add'. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4363&device=ep405pc&vendor… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4363&device=sandpointx3_al… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4363&device=briq&vendor=to… Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4363&device=epia-m700&vend… If something broke during this checkin please be a pain in ward's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[PATCH] cbfstool: always initialize address in add_handler (add.c)
by Ward Vandewege 18 Jun '09

18 Jun '09

See attached. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior Systems Administrator

2 2

[v2] r4363 - trunk/coreboot-v2/util/cbfstool
by svn＠coreboot.org 18 Jun '09

18 Jun '09

Author: ward Date: 2009-06-18 18:38:35 +0200 (Thu, 18 Jun 2009) New Revision: 4363 Modified: trunk/coreboot-v2/util/cbfstool/add.c Log: Make sure the address variable is initialized to zero - it is only set when a [base address] parameter is supplied on the command line... This patch fixes random segfaults when using 'cbfstool add'. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/util/cbfstool/add.c =================================================================== --- trunk/coreboot-v2/util/cbfstool/add.c 2009-06-18 10:05:41 UTC (rev 4362) +++ trunk/coreboot-v2/util/cbfstool/add.c 2009-06-18 16:38:35 UTC (rev 4363) @@ -238,7 +238,7 @@ int add_handler(struct rom *rom, int argc, char **argv) { unsigned int type = CBFS_COMPONENT_NULL; - unsigned long address; + unsigned long address = 0; if ((argc < 3) || (argc > 4)) { add_usage();

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[PATCH] flashrom: Support only one operation at a time
by Carl-Daniel Hailfinger 18 Jun '09

18 Jun '09

flashrom does not honor argument ordering for operations. Not only does this violate the principle of least surprise, it also caused one bug where -Ewv was specified and the flash ended up being empty. Support only one operation at a time. As a side benefit, this allows us to clean up main() quite a bit. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-one_commandline_operation_only/flashrom.8 =================================================================== --- flashrom-one_commandline_operation_only/flashrom.8 (Revision 583) +++ flashrom-one_commandline_operation_only/flashrom.8 (Arbeitskopie) @@ -2,7 +2,7 @@ .SH NAME flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS -.B flashrom \fR[\fB\-EVfLhR\fR] [\fB\-r\fR file] [\fB\-w\fR file] [\fB\-v\fR file] +.B flashrom \fR[\fB\-VfLhR\fR] [\fB\-E\fR|\fB\-r\fR file|\fB\-w\fR file|\fB\-v\fR file] [\fB\-c\fR chipname] [\fB\-s\fR addr] [\fB\-e\fR addr] [\fB\-m\fR [vendor:]part] [\fB\-l\fR file] [\fB\-i\fR image] [\fB\-p\fR programmer] [file] .SH DESCRIPTION @@ -25,7 +25,8 @@ flashrom 1.0. Do not use flashrom in scripts or other automated tools without checking that your flashrom version won't interpret options in a different way. .PP -If no file is specified, then all that happens +You can specify one of -E, -r, -w, -v or no operation. +If no operation is specified, then all that happens is that flash info is dumped and the flash chip is set to writable. .TP .B "\-r, \-\-read <file>" Index: flashrom-one_commandline_operation_only/flashrom.c =================================================================== --- flashrom-one_commandline_operation_only/flashrom.c (Revision 583) +++ flashrom-one_commandline_operation_only/flashrom.c (Arbeitskopie) @@ -471,7 +471,7 @@ void usage(const char *name) { - printf("usage: %s [-EVfLhR] [-r file] [-w file] [-v file] [-c chipname] [-s addr]\n" + printf("usage: %s [-VfLhR] [-E|-r file|-w file|-v file] [-c chipname] [-s addr]\n" " [-e addr] [-m [vendor:]part] [-l file] [-i image] [-p programmer] [file]\n\n", name); @@ -498,7 +498,8 @@ " (internal, dummy, nic3com, satasii, it87spi)\n" " -h | --help: print this help text\n" " -R | --version: print the version (release)\n" - "\nIf no file is specified, then all that happens" + "\nYou can specify one of -E, -r, -w, -v or no operation.\n" + "If no operation is specified, then all that happens" " is that flash info is dumped.\n\n"); exit(1); } @@ -520,6 +521,7 @@ int force = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int list_supported = 0; + int operation_specified = 0; int ret = 0, i; static struct option long_options[] = { @@ -562,12 +564,27 @@ long_options, &option_index)) != EOF) { switch (opt) { case 'r': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } read_it = 1; break; case 'w': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } write_it = 1; break; case 'v': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } verify_it = 1; break; case 'c': @@ -577,6 +594,11 @@ verbose = 1; break; case 'E': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } erase_it = 1; break; case 's': -- http://www.hailfinger.org/ Index: flashrom-one_commandline_operation_only/flashrom.8 =================================================================== --- flashrom-one_commandline_operation_only/flashrom.8 (Revision 583) +++ flashrom-one_commandline_operation_only/flashrom.8 (Arbeitskopie) @@ -2,7 +2,7 @@ .SH NAME flashrom \- detect, read, write, verify and erase flash chips .SH SYNOPSIS -.B flashrom \fR[\fB\-EVfLhR\fR] [\fB\-r\fR file] [\fB\-w\fR file] [\fB\-v\fR file] +.B flashrom \fR[\fB\-VfLhR\fR] [\fB\-E\fR|\fB\-r\fR file|\fB\-w\fR file|\fB\-v\fR file] [\fB\-c\fR chipname] [\fB\-s\fR addr] [\fB\-e\fR addr] [\fB\-m\fR [vendor:]part] [\fB\-l\fR file] [\fB\-i\fR image] [\fB\-p\fR programmer] [file] .SH DESCRIPTION @@ -25,7 +25,8 @@ flashrom 1.0. Do not use flashrom in scripts or other automated tools without checking that your flashrom version won't interpret options in a different way. .PP -If no file is specified, then all that happens +You can specify one of -E, -r, -w, -v or no operation. +If no operation is specified, then all that happens is that flash info is dumped and the flash chip is set to writable. .TP .B "\-r, \-\-read <file>" Index: flashrom-one_commandline_operation_only/flashrom.c =================================================================== --- flashrom-one_commandline_operation_only/flashrom.c (Revision 583) +++ flashrom-one_commandline_operation_only/flashrom.c (Arbeitskopie) @@ -471,7 +471,7 @@ void usage(const char *name) { - printf("usage: %s [-EVfLhR] [-r file] [-w file] [-v file] [-c chipname] [-s addr]\n" + printf("usage: %s [-VfLhR] [-E|-r file|-w file|-v file] [-c chipname] [-s addr]\n" " [-e addr] [-m [vendor:]part] [-l file] [-i image] [-p programmer] [file]\n\n", name); @@ -498,7 +498,8 @@ " (internal, dummy, nic3com, satasii, it87spi)\n" " -h | --help: print this help text\n" " -R | --version: print the version (release)\n" - "\nIf no file is specified, then all that happens" + "\nYou can specify one of -E, -r, -w, -v or no operation.\n" + "If no operation is specified, then all that happens" " is that flash info is dumped.\n\n"); exit(1); } @@ -520,6 +521,7 @@ int force = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int list_supported = 0; + int operation_specified = 0; int ret = 0, i; static struct option long_options[] = { @@ -562,12 +564,27 @@ long_options, &option_index)) != EOF) { switch (opt) { case 'r': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } read_it = 1; break; case 'w': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } write_it = 1; break; case 'v': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } verify_it = 1; break; case 'c': @@ -577,6 +594,11 @@ verbose = 1; break; case 'E': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation " + "specified. Aborting.\n"); + exit(1); + } erase_it = 1; break; case 's':

4 8

[flashrom] r604 - trunk
by svn＠coreboot.org 18 Jun '09

18 Jun '09

Author: uwe Date: 2009-06-18 16:04:44 +0200 (Thu, 18 Jun 2009) New Revision: 604 Modified: trunk/board_enable.c trunk/flash.h trunk/print.c Log: Also print the supported/nonsupported laptops in -L output (trivial). Content taken from current wiki page. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-18 12:42:46 UTC (rev 603) +++ trunk/board_enable.c 2009-06-18 14:04:44 UTC (rev 604) @@ -860,6 +860,25 @@ {}, }; +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info laptops_ok[] = { + /* Verified working laptops. */ + { "Lenovo", "3000 V100 TF05Cxx", }, + + {}, +}; + +/* Please keep this list alphabetically ordered by vendor/board. */ +const struct board_info laptops_bad[] = { + /* Verified non-working boards (for now). */ + { "Acer", "Aspire One", }, + { "Dell", "Latitude CPi A366XT", }, + { "IBM/Lenovo", "Thinkpad T40p", }, + { "IBM/Lenovo", "240", }, + + {}, +}; + /** * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-06-18 12:42:46 UTC (rev 603) +++ trunk/flash.h 2009-06-18 14:04:44 UTC (rev 604) @@ -250,6 +250,8 @@ extern const struct board_info boards_ok[]; extern const struct board_info boards_bad[]; +extern const struct board_info laptops_ok[]; +extern const struct board_info laptops_bad[]; /* udelay.c */ void myusec_delay(int usecs); Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-06-18 12:42:46 UTC (rev 603) +++ trunk/print.c 2009-06-18 14:04:44 UTC (rev 604) @@ -167,13 +167,15 @@ } } -void print_supported_boards_helper(const struct board_info *b) +void print_supported_boards_helper(const struct board_info *b, const char *msg) { int i, j, boardcount = 0; for (i = 0; b[i].vendor != NULL; i++) boardcount++; + printf("\n%s (total: %d):\n\n", msg, boardcount); + for (i = 0; b[i].vendor != NULL; i++) { printf("%s", b[i].vendor); for (j = 0; j < 25 - strlen(b[i].vendor); j++) @@ -210,15 +212,12 @@ printf("(none, board is autodetected)\n"); } - for (i = 0, boardcount = 0; boards_ok[i].vendor != NULL; i++) - boardcount++; - printf("\nSupported boards which don't need write-enable code " - "(total: %d):\n\n", boardcount); - print_supported_boards_helper(boards_ok); - - for (i = 0, boardcount = 0; boards_bad[i].vendor != NULL; i++) - boardcount++; - printf("\nBoards which have been verified to NOT work yet " - "(total: %d):\n\n", boardcount); - print_supported_boards_helper(boards_bad); + print_supported_boards_helper(boards_ok, + "Supported boards which don't need write-enable code"); + print_supported_boards_helper(boards_bad, + "Boards which have been verified to NOT work yet"); + print_supported_boards_helper(laptops_ok, + "Laptops which have been verified to work"); + print_supported_boards_helper(laptops_bad, + "Laptops which have been verified to NOT work yet"); }

1 0

[flashrom] r603 - trunk
by svn＠coreboot.org 18 Jun '09

18 Jun '09

Author: hailfinger Date: 2009-06-18 14:42:46 +0200 (Thu, 18 Jun 2009) New Revision: 603 Modified: trunk/chipset_enable.c Log: Chipset enable for VIA VT8233. Signed-off-by: Mateusz Murawski <matowy(a)tlen.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-06-17 14:43:24 UTC (rev 602) +++ trunk/chipset_enable.c 2009-06-18 12:42:46 UTC (rev 603) @@ -1021,6 +1021,7 @@ {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x},

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2003

2002

coreboot June 2009