coreboot June 2009

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Re: [coreboot] Flashrom support for EPIA-N(L) - patch for review
by bari 17 Jun '09

17 Jun '09

Jon, Just to be certain do: ./flashrom -r empty.dd' and them 'hexdump -C empty.dd', which should return only 0xff bytes. Also write an image consisting of random bytes (if you have an extra device or biosavior, etc. to recover with), then verify it with -v: dd if=/dev/urandom of=rnd.dd bs=1024c count=512 ./flashrom -w rnd.dd ./flashrom -v rnd.dd If this verifies OK, you can then write your good BIOS image back to the device. -Bari Harrison, Jon (SELEX GALILEO, UK) wrote: > Hi Guys, > > See below patch for flashrom to add support for EPIA-N(L) Programming. > > This has been built against R599 and tested for read, write and verify > on an EPIA-NL 800 > > Seems to work for me! > > Regards, > Jon > > > Index: util/flashrom/board_enable.c > =================================================================== > --- util/flashrom/board_enable.c (revision 599) > +++ util/flashrom/board_enable.c (working copy) > @@ -270,6 +270,44 @@ > } > > /** > + * Suited for VIAs EPIA N & NL. > + */ > +static int board_via_epia_n(const char *name) > +{ > + struct pci_dev *dev; > + uint16_t base; > + uint8_t val; > + > + dev = pci_dev_find(0x1106, 0x3227); /* VT8237R ISA bridge */ > + if (!dev) { > + fprintf(stderr, "\nERROR: VT8237R ISA bridge not > found.\n"); > + return -1; > + } > + > + /* All memory cycles, not just ROM ones, go to LPC */ > + val = pci_read_byte(dev, 0x59); > + val &= ~0x80; > + pci_write_byte(dev, 0x59, val); > + > + /* GPIO9 -> output */ > + val = pci_read_byte(dev, 0xE4); > + //printf("GPO Pin Select Reg = 0x%02X\n", val); > + val |= 0x20; > + pci_write_byte(dev, 0xE4, val); > + > + /* Get Power Management IO address. */ > + base = pci_read_word(dev, 0x88) & 0xFF80; > + > + /* Enable GPIO9 which is connected to write protect. */ > + val = INB(base + 0x4D); > + //printf("PMM GPIO = 0x%02X\n", val); > + val |= 0x02; > + OUTB(val, base + 0x4D); > + > + return 0; > +} > + > +/** > * Suited for EPoX EP-8K5A2 and Albatron PM266A. > */ > static int board_epox_ep_8k5a2(const char *name) > @@ -718,6 +756,7 @@ > {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, > 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat > K7M)", board_asus_a7v8x_mx}, > {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, > 0xAA08, NULL, NULL, "VIA", "EPIA-CN", > board_via_epia_sp}, > {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, > 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", > board_via_epia_m}, > + {0x1106, 0x0259, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, > 0xAA08, "via", "epia-n", "VIA", "EPIA-N/NL", > board_via_epia_n}, > {0x1106, 0x3227, 0x1106, 0xAA01, 0x1106, 0x0259, 0x1106, > 0xAA01, NULL, NULL, "VIA", "EPIA SP", > board_via_epia_sp}, > {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, > 0x337e, "via", "pc3500g", "VIA", "PC3500G", > it87xx_probe_spi_flash}, > { 0, 0, 0, 0, 0, 0, 0, > 0, NULL, NULL, NULL, NULL, > NULL}, /* end marker */ > SELEX Sensors and Airborne Systems Limited > Registered Office: Sigma House, Christopher Martin Road, Basildon, Essex SS14 3EL > A company registered in England & Wales. Company no. 02426132 > ******************************************************************** > This email and any attachments are confidential to the intended > recipient and may also be privileged. If you are not the intended > recipient please delete it from your system and notify the sender. > You should not copy it or use it for any purpose nor disclose or > distribute its contents to any other person. > ******************************************************************** > >

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[v2] r4360 - in trunk/coreboot-v2/src/mainboard: a-trend/atc-6220 a-trend/atc-6240 abit/be6-ii_v2_0 advantech/pcm-5820 amd/db800 amd/norwich amd/rumba artecgroup/dbe61 asi/mb_5blgp asi/mb_5blmp asus/mew-am asus/mew-vm asus/p2b asus/p2b-d asus/p2b-ds asus/p2b-f asus/p3b-f axus/tc320 azza/pt-6ibd bcom/winnet100 bcom/winnetp680 biostar/m6tba compaq/deskpro_en_sff_p600 dell/s1850 digitallogic/adl855pc digitallogic/msm800sev eaglelion/5bcm gigabyte/ga-6bxc iei/juki-511p iei/nova4899r iei/pcisa-lx-800-
by svn＠coreboot.org 17 Jun '09

17 Jun '09

Author: myles Date: 2009-06-17 18:38:43 +0200 (Wed, 17 Jun 2009) New Revision: 4360 Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb trunk/coreboot-v2/src/mainboard/via/epia/Options.lb trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb Log: Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial. Abuild tested with -C. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/advantech/pcm-5820/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blgp/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asi/mb_5blmp/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_PIRQ_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-d/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-ds/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/axus/tc320/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/bcom/winnet100/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/bcom/winnetp680/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -21,6 +21,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/dell/s1850/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/iei/juki-511p/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/iei/nova4899r/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/intel/jarrell/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/intel/mtarvon/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -19,6 +19,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/intel/truxton/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -19,6 +19,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/intel/xe7501devkit/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_ACPI_TABLES uses HAVE_ACPI_RESUME uses HAVE_PIRQ_TABLE Modified: trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/jetway/j7f24/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -21,6 +21,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -22,6 +22,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -22,6 +22,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/msi/ms6147/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/msi/ms6178/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/nec/powermate2000/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/rca/rm4100/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses CC uses CONFIG_CBFS +uses CONFIG_USE_INIT uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_VGA uses CONFIG_COMPRESSED_PAYLOAD_LZMA Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dai_g/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhe_g2/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/supermicro/x6dhr_ig2/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/televideo/tc7020/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/thomson/ip1000/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses CC uses CONFIG_CBFS +uses CONFIG_USE_INIT uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_CONSOLE_VGA uses CONFIG_COMPRESSED_PAYLOAD_LZMA Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/via/epia/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/via/epia/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CBFS +uses CONFIG_USE_INIT uses DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 uses TTYS0_BAUD Modified: trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/via/epia-cn/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -21,6 +21,7 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -1,5 +1,6 @@ uses HAVE_MP_TABLE uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT Modified: trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/via/pc2500e/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -20,6 +20,7 @@ uses CONFIG_SMP uses CONFIG_CBFS +uses CONFIG_USE_INIT uses HAVE_MP_TABLE uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE Modified: trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-06-17 15:33:57 UTC (rev 4359) +++ trunk/coreboot-v2/src/mainboard/via/vt8454c/Options.lb 2009-06-17 16:38:43 UTC (rev 4360) @@ -56,6 +56,7 @@ uses XIP_ROM_SIZE uses XIP_ROM_BASE uses CONFIG_CBFS +uses CONFIG_USE_INIT # compiler specifics uses CROSS_COMPILE

1 0

build service results for r4359
by coreboot information 17 Jun '09

17 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "mjones" checked in revision 4359 to the coreboot repository. This caused the following changes: Change Log: Patch AMD Fam10 C2 for errata 327, 344, 346, 354, 351. Removed c2 HT Phy 520a/530a reserved bit. Signed-off-by: Marc Jones <marcj303(a)gmail.com> Acked-by: Ward Vandewege <ward(a)gnu.org> Build Log: Configuration of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=atc-6220&vendo… Configuration of a-trend:atc-6240 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=atc-6240&vendo… Configuration of abit:be6-ii_v2_0 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=be6-ii_v2_0&ve… Configuration of advantech:pcm-5820 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=pcm-5820&vendo… Configuration of amd:db800 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=db800&vendor=a… Configuration of amd:norwich is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=norwich&vendor… Configuration of amd:rumba is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=rumba&vendor=a… Configuration of artecgroup:dbe61 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=dbe61&vendor=a… Configuration of asi:mb_5blgp is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=mb_5blgp&vendo… Configuration of asi:mb_5blmp is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=mb_5blmp&vendo… Configuration of asus:mew-am is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=mew-am&vendor=… Configuration of asus:mew-vm is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=mew-vm&vendor=… Configuration of asus:p2b is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=p2b&vendor=asu… Configuration of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=p2b-d&vendor=a… Configuration of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=p2b-ds&vendor=… Configuration of asus:p2b-f is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=p2b-f&vendor=a… Configuration of asus:p3b-f is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=p3b-f&vendor=a… Configuration of axus:tc320 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=tc320&vendor=a… Configuration of azza:pt-6ibd is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=pt-6ibd&vendor… Configuration of bcom:winnet100 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=winnet100&vend… Configuration of bcom:winnetp680 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=winnetp680&ven… Configuration of biostar:m6tba is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=m6tba&vendor=b… Configuration of compaq:deskpro_en_sff_p600 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=deskpro_en_sff… Configuration of dell:s1850 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=s1850&vendor=d… Configuration of digitallogic:adl855pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=adl855pc&vendo… Configuration of digitallogic:msm800sev is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=msm800sev&vend… Configuration of eaglelion:5bcm is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=5bcm&vendor=ea… Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ep405pc&vendor… Configuration of gigabyte:ga-6bxc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ga-6bxc&vendor… Configuration of iei:pcisa-lx-800-r10 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=pcisa-lx-800-r… Configuration of intel:jarrell is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=jarrell&vendor… Configuration of intel:mtarvon is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=mtarvon&vendor… Configuration of intel:truxton is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=truxton&vendor… Configuration of intel:xe7501devkit is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=xe7501devkit&v… Configuration of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=j7f24&vendor=j… Configuration of lippert:frontrunner is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=frontrunner&ve… Configuration of lippert:roadrunner-lx is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=roadrunner-lx&… Configuration of lippert:spacerunner-lx is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=spacerunner-lx… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=sandpointx3_al… Configuration of msi:ms6119 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ms6119&vendor=… Configuration of msi:ms6147 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ms6147&vendor=… Configuration of msi:ms6178 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ms6178&vendor=… Configuration of nec:powermate2000 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=powermate2000&… Configuration of olpc:btest is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=btest&vendor=o… Configuration of olpc:rev_a is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=rev_a&vendor=o… Configuration of pcengines:alix1c is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=alix1c&vendor=… Configuration of rca:rm4100 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=rm4100&vendor=… Configuration of supermicro:x6dai_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=x6dai_g&vendor… Configuration of supermicro:x6dhe_g is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=x6dhe_g&vendor… Configuration of supermicro:x6dhe_g2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=x6dhe_g2&vendo… Configuration of supermicro:x6dhr_ig is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=x6dhr_ig&vendo… Configuration of supermicro:x6dhr_ig2 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=x6dhr_ig2&vend… Configuration of televideo:tc7020 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=tc7020&vendor=… Configuration of thomson:ip1000 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=ip1000&vendor=… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=briq&vendor=to… Configuration of tyan:s1846 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=s1846&vendor=t… Configuration of via:epia is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=epia&vendor=vi… Configuration of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=epia-cn&vendor… Configuration of via:epia-m is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=epia-m&vendor=… Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=epia-m700&vend… Configuration of via:pc2500e is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=pc2500e&vendor… Configuration of via:vt8454c is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4359&device=vt8454c&vendor… If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

4 3

[v2] r4359 - trunk/coreboot-v2/src/cpu/amd/model_10xxx
by svn＠coreboot.org 17 Jun '09

17 Jun '09

Author: mjones Date: 2009-06-17 17:33:57 +0200 (Wed, 17 Jun 2009) New Revision: 4359 Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h Log: Patch AMD Fam10 C2 for errata 327, 344, 346, 354, 351. Removed c2 HT Phy 520a/530a reserved bit. Signed-off-by: Marc Jones <marcj303(a)gmail.com> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h =================================================================== --- trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2009-06-16 23:02:39 UTC (rev 4358) +++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/defaults.h 2009-06-17 15:33:57 UTC (rev 4359) @@ -124,10 +124,41 @@ { 0, 0xE4, AMD_FAM10_ALL, AMD_PTYPE_ALL, 0x00002000, 0x00002000 }, /* [13] LdtStopTriEn = 1 */ + /* Link Global Retry Control Register */ + { 0, 0x150, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00073900, 0x00073F00 }, + + /* Errata 351 + * System software should program the Link Extended Control Registers[LS2En] + * (F0x[18C:170][8]) to 0b for all links. System software should also + * program Link Global Extended Control Register[ForceFullT0] + * (F0x16C[15:13]) to 000b */ + + { 0, 0x170, AMD_FAM10_ALL, AMD_PTYPE_ALL, /* Fix FAM10_ALL when fixed in rev guide */ + 0x00000000, 0x00000100 }, + { 0, 0x174, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x178, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x17C, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x180, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x184, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x188, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x18C, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + { 0, 0x170, AMD_FAM10_ALL, AMD_PTYPE_ALL, + 0x00000000, 0x00000100 }, + /* Link Global Extended Control Register */ { 0, 0x16C, AMD_FAM10_ALL, AMD_PTYPE_ALL, - 0x0000C000, 0x0000E000 }, /* [15:13] ForceFullT0 = 110b */ + 0x00000014, 0x0000003F }, /* [15:13] ForceFullT0 = 0b, + * Set T0Time 14h per BKDG */ + /* Function 1 - Map Init */ /* Before reading F1x114_x2 or F1x114_x3 software must @@ -257,6 +288,11 @@ [5] DisPciCfgCpuMstAbtRsp = 1, [1] SyncFloodOnUsPwDataErr = 1 */ + /* errata 346 - Fam10 C2 + * System software should set F3x188[22] to 1b. */ + { 3, 0x188, AMD_RB_C2, AMD_PTYPE_ALL, + 0x00400000, 0x00400000 }, + /* L3 Control Register */ { 3, 0x1B8, AMD_FAM10_ALL, AMD_PTYPE_ALL, 0x00001000, 0x00001000 }, /* [12] = L3PrivReplEn */ @@ -279,17 +315,113 @@ u32 mask; } fam10_htphy_default[] = { - { 0x520A, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + /* Errata 344 - Fam10 C2 + * System software should set bit 6 of F4x1[9C, 94, 8C, 84]_x[78:70, 68:60]. */ + { 0x60, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x61, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x62, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x63, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x64, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x65, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x66, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x67, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x68, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + + { 0x70, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x71, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x72, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x73, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x74, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x75, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x76, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x77, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x78, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + + /* Errata 354 - Fam10 C2 + * System software should set bit 6 of F4x1[9C,94,8C,84]_x[58:50, 48:40] for all links. */ + { 0x40, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x41, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x42, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x43, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x44, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x45, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x46, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x47, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x48, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + + { 0x50, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x51, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x52, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x53, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x54, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x55, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x56, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x57, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + { 0x58, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00000040, 0x00000040 }, + + /* Errata 327 - Fam10 C2 + * BIOS should set the Link Phy Impedance Register[RttCtl] + * (F4x1[9C, 94, 8C, 84]_x[D0, C0][31:29]) to 010b and + * Link Phy Impedance Register[RttIndex] + * (F4x1[9C, 94, 8C, 84]_x[D0, C0][20:16]) to 00100b */ + { 0xC0, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x40040000, 0xe01F0000 }, + { 0xD0, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x40040000, 0xe01F0000 }, + + { 0x520A, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00004000, 0x00006000 }, /* HT_PHY_DLL_REG */ + + { 0x530A, AMD_RB_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x00004000, 0x00006000 }, /* HT_PHY_DLL_REG */ + + { 0x520A, AMD_DR_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00004400, 0x00006400 }, /* HT_PHY_DLL_REG */ - { 0x530A, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0x530A, AMD_DR_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, 0x00004400, 0x00006400 }, /* HT_PHY_DLL_REG */ - { 0xCF, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0xCF, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_HT3, 0x00000000, 0x000000FF }, /* Provide clear setting for logical completeness */ - { 0xDF, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + { 0xDF, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_HT3, 0x00000000, 0x000000FF }, /* Provide clear setting for logical completeness */ @@ -315,4 +447,8 @@ { 0xC1, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_HT1, 0x04020000, 0x3FFFC000 }, /* [29:22] LfcMax = 10h, [21:14] LfcMin = 08h */ + + { 0xC0, AMD_FAM10_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL, + 0x40040000, 0xe01F0000 }, /* [31:29] RttCtl = 02h, + [20:16] RttIndex = 04h */ };

1 0

[PATCH] flashrom: board enable for soyo sy-7vca.
by Luc Verhaegen 17 Jun '09

17 Jun '09

2 2

[flashrom] r602 - trunk
by svn＠coreboot.org 17 Jun '09

17 Jun '09

Author: libv Date: 2009-06-17 16:43:24 +0200 (Wed, 17 Jun 2009) New Revision: 602 Modified: trunk/board_enable.c Log: Board enable for Soyo SY-7VCA. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Andrew Morgan <ziltro(a)ziltro.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-17 12:07:12 UTC (rev 601) +++ trunk/board_enable.c 2009-06-17 14:43:24 UTC (rev 602) @@ -661,6 +661,38 @@ } /** + * Suited for Soyo SY-7VCA: Pro133A + VT82C686. + */ +static int board_soyo_sy_7vca(const char *name) +{ + struct pci_dev *dev; + uint32_t base; + uint8_t tmp; + + /* VT82C686 Power management */ + dev = pci_dev_find(0x1106, 0x3057); + if (!dev) { + fprintf(stderr, "\nERROR: VT82C686 PM device not found.\n"); + return -1; + } + + /* GPO0 output from PM IO base + 0x4C */ + tmp = pci_read_byte(dev, 0x54); + tmp &= ~0x03; + pci_write_byte(dev, 0x54, tmp); + + /* PM IO base */ + base = pci_read_long(dev, 0x48) & 0x0000FF00; + + /* Drop GPO0 */ + tmp = INB(base + 0x4C); + tmp &= ~0x01; + OUTB(tmp, base + 0x4C); + + return 0; +} + +/** * We use 2 sets of IDs here, you're free to choose which is which. This * is to provide a very high degree of certainty when matching a board on * the basis of subsystem/card IDs. As not every vendor handles @@ -715,6 +747,7 @@ {0x1106, 0x0571, 0x1462, 0x7120, 0, 0, 0, 0, "msi", "kt4v", "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, {0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, "msi", "kt4ultra", "MSI", "MS-6590 (KT4 Ultra)",board_msi_kt4v}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", ich6_gpio19_raise}, + {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, "Soyo", "SY-7VCA", board_soyo_sy_7vca}, {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan", "S2498 (Tomcat K7M)", board_asus_a7v8x_mx}, {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, 0xAA08, NULL, NULL, "VIA", "EPIA-CN", board_via_epia_sp}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA", "EPIA M/MII/...", board_via_epia_m},

1 0

Re: [coreboot] Flashrom support for EPIA-N(L) - patch for review
by Paul Menzel 17 Jun '09

17 Jun '09

Dear Jon, Am Mittwoch, den 17.06.2009, 12:36 +0100 schrieb Harrison, Jon (SELEX GALILEO, UK): > Hi Guys, > > See below patch for flashrom to add support for EPIA-N(L) Programming. > > This has been built against R599 and tested for read, write and verify > on an EPIA-NL 800 > > Seems to work for me! Thank you for your patch. I am not knowlegdable enough to review it, but I know that the developers need a Signed-off-by line from you, to commit it to the repository after someone has acknowledged your patch [1]. Thanks and bests, Paul [1] http://www.coreboot.org/Development_Guidelines

1 0

512K BIOS
by Rick Ant 17 Jun '09

17 Jun '09

Anyone have experience in creating Thin Client using 512Kbyte BIOS using LinuxBIOS ? Thanks

3 2

[PATCH] flashrom: Move printing code to print.c
by Uwe Hermann 17 Jun '09

17 Jun '09

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 2

[flashrom] r601 - trunk
by svn＠coreboot.org 17 Jun '09

17 Jun '09

Author: uwe Date: 2009-06-17 14:07:12 +0200 (Wed, 17 Jun 2009) New Revision: 601 Added: trunk/print.c Modified: trunk/Makefile trunk/board_enable.c trunk/chipset_enable.c trunk/flash.h trunk/flashrom.c Log: Move all printing code to print.c. Drop no longer needed MAX macro, we have a max() function. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-06-17 10:13:42 UTC (rev 600) +++ trunk/Makefile 2009-06-17 12:07:12 UTC (rev 601) @@ -49,7 +49,7 @@ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \ - dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o + dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o print.o all: pciutils .features dep $(PROGRAM) Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-17 10:13:42 UTC (rev 600) +++ trunk/board_enable.c 2009-06-17 12:07:12 UTC (rev 601) @@ -827,62 +827,6 @@ {}, }; -void print_supported_boards_helper(const struct board_info *b) -{ - int i, j, boardcount = 0; - - for (i = 0; b[i].vendor != NULL; i++) - boardcount++; - - for (i = 0; b[i].vendor != NULL; i++) { - printf("%s", b[i].vendor); - for (j = 0; j < 25 - strlen(b[i].vendor); j++) - printf(" "); - printf("%s", b[i].name); - for (j = 0; j < 23 - strlen(b[i].name); j++) - printf(" "); - printf("\n"); - } -} - -void print_supported_boards(void) -{ - int i, j, boardcount = 0; - struct board_pciid_enable *b = board_pciid_enables; - - for (i = 0; b[i].vendor_name != NULL; i++) - boardcount++; - - printf("\nSupported boards which need write-enable code (total: %d):" - "\n\nVendor: Board: " - "Required option:\n\n", boardcount); - - for (i = 0; b[i].vendor_name != NULL; i++) { - printf("%s", b[i].vendor_name); - for (j = 0; j < 25 - strlen(b[i].vendor_name); j++) - printf(" "); - printf("%s", b[i].board_name); - for (j = 0; j < 25 - strlen(b[i].board_name); j++) - printf(" "); - if (b[i].lb_vendor != NULL) - printf("-m %s:%s\n", b[i].lb_vendor, b[i].lb_part); - else - printf("(none, board is autodetected)\n"); - } - - for (i = 0, boardcount = 0; boards_ok[i].vendor != NULL; i++) - boardcount++; - printf("\nSupported boards which don't need write-enable code " - "(total: %d):\n\n", boardcount); - print_supported_boards_helper(boards_ok); - - for (i = 0, boardcount = 0; boards_bad[i].vendor != NULL; i++) - boardcount++; - printf("\nBoards which have been verified to NOT work yet " - "(total: %d):\n\n", boardcount); - print_supported_boards_helper(boards_bad); -} - /** * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-06-17 10:13:42 UTC (rev 600) +++ trunk/chipset_enable.c 2009-06-17 12:07:12 UTC (rev 601) @@ -948,9 +948,6 @@ return 0; } -#define OK 0 -#define NT 1 /* Not tested */ - /* Please keep this list alphabetically sorted by vendor/device. */ const struct penable chipset_enables[] = { {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, @@ -1035,29 +1032,6 @@ {}, }; -void print_supported_chipsets(void) -{ - int i, j, chipsetcount = 0; - const struct penable *c = chipset_enables; - - for (i = 0; c[i].vendor_name != NULL; i++) - chipsetcount++; - - printf("\nSupported chipsets (total: %d):\n\nVendor: " - "Chipset: PCI IDs:\n\n", chipsetcount); - - for (i = 0; c[i].vendor_name != NULL; i++) { - printf("%s", c[i].vendor_name); - for (j = 0; j < 25 - strlen(c[i].vendor_name); j++) - printf(" "); - printf("%s", c[i].device_name); - for (j = 0; j < 25 - strlen(c[i].device_name); j++) - printf(" "); - printf("%04x:%04x%s\n", c[i].vendor_id, c[i].device_id, - (c[i].status == OK) ? "" : " (untested)"); - } -} - int chipset_flash_enable(void) { struct pci_dev *dev = 0; Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-06-17 10:13:42 UTC (rev 600) +++ trunk/flash.h 2009-06-17 12:07:12 UTC (rev 601) @@ -272,6 +272,12 @@ }; uint32_t pcidev_validate(struct pci_dev *dev, struct pcidev_status *devs); uint32_t pcidev_init(uint16_t vendor_id, struct pcidev_status *devs); + +/* print.c */ +char *flashbuses_to_text(enum chipbustype bustype); +void print_supported_chips(void); +void print_supported_chipsets(void); +void print_supported_boards(void); void print_supported_pcidevs(struct pcidev_status *devs); /* board_enable.c */ @@ -281,12 +287,10 @@ void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); int board_flash_enable(const char *vendor, const char *part); -void print_supported_boards(void); /* chipset_enable.c */ extern enum chipbustype buses_supported; int chipset_flash_enable(void); -void print_supported_chipsets(void); extern unsigned long flashbase; @@ -376,7 +380,11 @@ int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); extern char *pcidev_bdf; +char *strcat_realloc(char *dest, const char *src); +#define OK 0 +#define NT 1 /* Not tested */ + /* layout.c */ int show_id(uint8_t *bios, int size, int force); int read_romlayout(char *name); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-06-17 10:13:42 UTC (rev 600) +++ trunk/flashrom.c 2009-06-17 12:07:12 UTC (rev 601) @@ -236,37 +236,6 @@ return dest; } -/* Return a string corresponding to the bustype parameter. - * Memory is obtained with malloc() and can be freed with free(). - */ -char *flashbuses_to_text(enum chipbustype bustype) -{ - char *ret = calloc(1, 1); - if (bustype == CHIP_BUSTYPE_UNKNOWN) { - ret = strcat_realloc(ret, "Unknown,"); - /* FIXME: Once all chipsets and flash chips have been updated, NONSPI - * will cease to exist and should be eliminated here as well. - */ - } else if (bustype == CHIP_BUSTYPE_NONSPI) { - ret = strcat_realloc(ret, "Non-SPI,"); - } else { - if (bustype & CHIP_BUSTYPE_PARALLEL) - ret = strcat_realloc(ret, "Parallel,"); - if (bustype & CHIP_BUSTYPE_LPC) - ret = strcat_realloc(ret, "LPC,"); - if (bustype & CHIP_BUSTYPE_FWH) - ret = strcat_realloc(ret, "FWH,"); - if (bustype & CHIP_BUSTYPE_SPI) - ret = strcat_realloc(ret, "SPI,"); - if (bustype == CHIP_BUSTYPE_NONE) - ret = strcat_realloc(ret, "None,"); - } - /* Kill last comma. */ - ret[strlen(ret) - 1] = '\0'; - ret = realloc(ret, strlen(ret) + 1); - return ret; -} - /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashchip *flash, int start, int len) { @@ -511,96 +480,6 @@ return 0; } -#ifndef MAX -#define MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) - -static int digits(int n) -{ - int i; - - if (!n) - return 1; - - for (i = 0; n; ++i) - n /= 10; - - return i; -} - -void print_supported_chips(void) -{ - int okcol = 0, pos = 0, i, chipcount = 0; - struct flashchip *f; - - for (f = flashchips; f->name != NULL; f++) { - if (GENERIC_DEVICE_ID == f->model_id) - continue; - okcol = MAX(okcol, strlen(f->vendor) + 1 + strlen(f->name)); - } - okcol = (okcol + 7) & ~7; - - for (f = flashchips; f->name != NULL; f++) - chipcount++; - - printf("\nSupported flash chips (total: %d):\n\n", chipcount); - POS_PRINT("Vendor: Device:"); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } - - printf("Tested OK:\tKnown BAD: Size/KB: Type:\n\n"); - printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); - - for (f = flashchips; f->name != NULL; f++) { - /* Don't print "unknown XXXX SPI chip" entries. */ - if (!strncmp(f->name, "unknown", 7)) - continue; - - printf("%s", f->vendor); - for (i = 0; i < 10 - strlen(f->vendor); i++) - printf(" "); - printf("%s", f->name); - - pos = 10 + strlen(f->name); - while (pos < okcol) { - printf("\t"); - pos += 8 - (pos % 8); - } - if ((f->tested & TEST_OK_MASK)) { - if ((f->tested & TEST_OK_PROBE)) - POS_PRINT("P "); - if ((f->tested & TEST_OK_READ)) - POS_PRINT("R "); - if ((f->tested & TEST_OK_ERASE)) - POS_PRINT("E "); - if ((f->tested & TEST_OK_WRITE)) - POS_PRINT("W "); - } - while (pos < okcol + 9) { - printf("\t"); - pos += 8 - (pos % 8); - } - if ((f->tested & TEST_BAD_MASK)) { - if ((f->tested & TEST_BAD_PROBE)) - printf("P "); - if ((f->tested & TEST_BAD_READ)) - printf("R "); - if ((f->tested & TEST_BAD_ERASE)) - printf("E "); - if ((f->tested & TEST_BAD_WRITE)) - printf("W "); - } - - printf("\t %d", f->total_size); - for (i = 0; i < 10 - digits(f->total_size); i++) - printf(" "); - printf("%s\n", flashbuses_to_text(f->bustype)); - } -} - void usage(const char *name) { printf("usage: %s [-VfLhR] [-E|-r file|-w file|-v file] [-c chipname] [-s addr]\n" Added: trunk/print.c =================================================================== --- trunk/print.c (rev 0) +++ trunk/print.c 2009-06-17 12:07:12 UTC (rev 601) @@ -0,0 +1,224 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <stdlib.h> +#include "flash.h" +#include "flashchips.h" + +/* + * Return a string corresponding to the bustype parameter. + * Memory is obtained with malloc() and can be freed with free(). + */ +char *flashbuses_to_text(enum chipbustype bustype) +{ + char *ret = calloc(1, 1); + if (bustype == CHIP_BUSTYPE_UNKNOWN) { + ret = strcat_realloc(ret, "Unknown,"); + /* + * FIXME: Once all chipsets and flash chips have been updated, NONSPI + * will cease to exist and should be eliminated here as well. + */ + } else if (bustype == CHIP_BUSTYPE_NONSPI) { + ret = strcat_realloc(ret, "Non-SPI,"); + } else { + if (bustype & CHIP_BUSTYPE_PARALLEL) + ret = strcat_realloc(ret, "Parallel,"); + if (bustype & CHIP_BUSTYPE_LPC) + ret = strcat_realloc(ret, "LPC,"); + if (bustype & CHIP_BUSTYPE_FWH) + ret = strcat_realloc(ret, "FWH,"); + if (bustype & CHIP_BUSTYPE_SPI) + ret = strcat_realloc(ret, "SPI,"); + if (bustype == CHIP_BUSTYPE_NONE) + ret = strcat_realloc(ret, "None,"); + } + /* Kill last comma. */ + ret[strlen(ret) - 1] = '\0'; + ret = realloc(ret, strlen(ret) + 1); + return ret; +} + +#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) + +static int digits(int n) +{ + int i; + + if (!n) + return 1; + + for (i = 0; n; ++i) + n /= 10; + + return i; +} + +void print_supported_chips(void) +{ + int okcol = 0, pos = 0, i, chipcount = 0; + struct flashchip *f; + + for (f = flashchips; f->name != NULL; f++) { + if (GENERIC_DEVICE_ID == f->model_id) + continue; + okcol = max(okcol, strlen(f->vendor) + 1 + strlen(f->name)); + } + okcol = (okcol + 7) & ~7; + + for (f = flashchips; f->name != NULL; f++) + chipcount++; + + printf("\nSupported flash chips (total: %d):\n\n", chipcount); + POS_PRINT("Vendor: Device:"); + while (pos < okcol) { + printf("\t"); + pos += 8 - (pos % 8); + } + + printf("Tested OK:\tKnown BAD: Size/KB: Type:\n\n"); + printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); + + for (f = flashchips; f->name != NULL; f++) { + /* Don't print "unknown XXXX SPI chip" entries. */ + if (!strncmp(f->name, "unknown", 7)) + continue; + + printf("%s", f->vendor); + for (i = 0; i < 10 - strlen(f->vendor); i++) + printf(" "); + printf("%s", f->name); + + pos = 10 + strlen(f->name); + while (pos < okcol) { + printf("\t"); + pos += 8 - (pos % 8); + } + if ((f->tested & TEST_OK_MASK)) { + if ((f->tested & TEST_OK_PROBE)) + POS_PRINT("P "); + if ((f->tested & TEST_OK_READ)) + POS_PRINT("R "); + if ((f->tested & TEST_OK_ERASE)) + POS_PRINT("E "); + if ((f->tested & TEST_OK_WRITE)) + POS_PRINT("W "); + } + while (pos < okcol + 9) { + printf("\t"); + pos += 8 - (pos % 8); + } + if ((f->tested & TEST_BAD_MASK)) { + if ((f->tested & TEST_BAD_PROBE)) + printf("P "); + if ((f->tested & TEST_BAD_READ)) + printf("R "); + if ((f->tested & TEST_BAD_ERASE)) + printf("E "); + if ((f->tested & TEST_BAD_WRITE)) + printf("W "); + } + + printf("\t %d", f->total_size); + for (i = 0; i < 10 - digits(f->total_size); i++) + printf(" "); + printf("%s\n", flashbuses_to_text(f->bustype)); + } +} + +void print_supported_chipsets(void) +{ + int i, j, chipsetcount = 0; + const struct penable *c = chipset_enables; + + for (i = 0; c[i].vendor_name != NULL; i++) + chipsetcount++; + + printf("\nSupported chipsets (total: %d):\n\nVendor: " + "Chipset: PCI IDs:\n\n", chipsetcount); + + for (i = 0; c[i].vendor_name != NULL; i++) { + printf("%s", c[i].vendor_name); + for (j = 0; j < 25 - strlen(c[i].vendor_name); j++) + printf(" "); + printf("%s", c[i].device_name); + for (j = 0; j < 25 - strlen(c[i].device_name); j++) + printf(" "); + printf("%04x:%04x%s\n", c[i].vendor_id, c[i].device_id, + (c[i].status == OK) ? "" : " (untested)"); + } +} + +void print_supported_boards_helper(const struct board_info *b) +{ + int i, j, boardcount = 0; + + for (i = 0; b[i].vendor != NULL; i++) + boardcount++; + + for (i = 0; b[i].vendor != NULL; i++) { + printf("%s", b[i].vendor); + for (j = 0; j < 25 - strlen(b[i].vendor); j++) + printf(" "); + printf("%s", b[i].name); + for (j = 0; j < 23 - strlen(b[i].name); j++) + printf(" "); + printf("\n"); + } +} + +void print_supported_boards(void) +{ + int i, j, boardcount = 0; + struct board_pciid_enable *b = board_pciid_enables; + + for (i = 0; b[i].vendor_name != NULL; i++) + boardcount++; + + printf("\nSupported boards which need write-enable code (total: %d):" + "\n\nVendor: Board: " + "Required option:\n\n", boardcount); + + for (i = 0; b[i].vendor_name != NULL; i++) { + printf("%s", b[i].vendor_name); + for (j = 0; j < 25 - strlen(b[i].vendor_name); j++) + printf(" "); + printf("%s", b[i].board_name); + for (j = 0; j < 25 - strlen(b[i].board_name); j++) + printf(" "); + if (b[i].lb_vendor != NULL) + printf("-m %s:%s\n", b[i].lb_vendor, b[i].lb_part); + else + printf("(none, board is autodetected)\n"); + } + + for (i = 0, boardcount = 0; boards_ok[i].vendor != NULL; i++) + boardcount++; + printf("\nSupported boards which don't need write-enable code " + "(total: %d):\n\n", boardcount); + print_supported_boards_helper(boards_ok); + + for (i = 0, boardcount = 0; boards_bad[i].vendor != NULL; i++) + boardcount++; + printf("\nBoards which have been verified to NOT work yet " + "(total: %d):\n\n", boardcount); + print_supported_boards_helper(boards_bad); +}

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coreboot June 2009