coreboot June 2009

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Coreboot with PIII , i810 chipset and 49LF004 Flash BIOS ?
by Rick Ant 18 Jun '09

18 Jun '09

Can I load coreboot into 49LF004 with PIII processor and i810 chipset ? Should i use this bin file : http://www.coreboot.org/images/9/9d/Qemu_coreboot_openbios.zip What should i use for uploader ? I'm using Award flasher and it said the coreboot is not award.. Any others uploader ? Where can I find the source code and the tools, so I can compile it? Thanks

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49LF004
by Rick Ant 18 Jun '09

18 Jun '09

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49LF004
by Rick Ant 18 Jun '09

18 Jun '09

1 0

49LF004
by Rick Ant 18 Jun '09

18 Jun '09

1 0

49LF004
by Rick Ant 18 Jun '09

18 Jun '09

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Soyo SY-6BA+ III
by Andrew Morgan 17 Jun '09

17 Jun '09

I have attached the output of 'lspci -vn' on my Soyo SY-6BA+ III board. (Not to be confused with the other Soyo board yesterday!) -- Andrew. 00:00.0 0600: 8086:7190 (rev 03) Flags: bus master, medium devsel, latency 32 Memory at d8000000 (32-bit, prefetchable) [size=64M] Capabilities: [a0] AGP version 1.0 Kernel driver in use: agpgart-intel Kernel modules: intel-agp 00:01.0 0604: 8086:7191 (rev 03) Flags: bus master, 66MHz, medium devsel, latency 64 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 Memory behind bridge: d0000000-d7ffffff Prefetchable memory behind bridge: 10000000-100fffff Kernel modules: shpchp 00:07.0 0601: 8086:7110 (rev 02) Flags: bus master, medium devsel, latency 0 00:07.1 0101: 8086:7111 (rev 01) (prog-if 80 [Master]) Flags: bus master, medium devsel, latency 32 [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8] [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1] [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8] [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1] I/O ports at f000 [size=16] Kernel driver in use: ata_piix 00:07.2 0c03: 8086:7112 (rev 01) Flags: bus master, medium devsel, latency 32, IRQ 11 I/O ports at e000 [size=32] Kernel driver in use: uhci_hcd 00:07.3 0680: 8086:7113 (rev 02) Flags: medium devsel, IRQ 9 Kernel driver in use: piix4_smbus Kernel modules: i2c-piix4 00:0f.0 0200: 10ec:8139 (rev 10) Subsystem: 10ec:8139 Flags: bus master, medium devsel, latency 32, IRQ 10 I/O ports at e400 [size=256] Memory at dc000000 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 Kernel driver in use: 8139too Kernel modules: 8139too, 8139cp 01:00.0 0300: 5333:8a13 (rev 02) Subsystem: 5333:8a13 Flags: bus master, medium devsel, latency 32 Memory at d0000000 (32-bit, non-prefetchable) [size=64M] [virtual] Expansion ROM at 10000000 [disabled] [size=64K] Capabilities: [dc] Power Management version 1 Capabilities: [80] AGP version 1.0

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build service results for r4360
by coreboot information 17 Jun '09

17 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "myles" checked in revision 4360 to the coreboot repository. This caused the following changes: Change Log: Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial. Abuild tested with -C. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Configuration of a-trend:atc-6220 has been fixed Configuration of a-trend:atc-6240 has been fixed Configuration of abit:be6-ii_v2_0 has been fixed Configuration of advantech:pcm-5820 has been fixed Configuration of amd:db800 has been fixed Configuration of amd:norwich has been fixed Configuration of amd:rumba has been fixed Configuration of artecgroup:dbe61 has been fixed Configuration of asi:mb_5blgp has been fixed Configuration of asi:mb_5blmp has been fixed Configuration of asus:mew-am has been fixed Configuration of asus:mew-vm has been fixed Configuration of asus:p2b has been fixed Configuration of asus:p2b-d has been fixed Configuration of asus:p2b-ds has been fixed Configuration of asus:p2b-f has been fixed Configuration of asus:p3b-f has been fixed Configuration of axus:tc320 has been fixed Configuration of azza:pt-6ibd has been fixed Configuration of bcom:winnet100 has been fixed Configuration of bcom:winnetp680 has been fixed Configuration of biostar:m6tba has been fixed Configuration of compaq:deskpro_en_sff_p600 has been fixed Configuration of dell:s1850 has been fixed Configuration of digitallogic:adl855pc has been fixed Configuration of digitallogic:msm800sev has been fixed Configuration of eaglelion:5bcm has been fixed Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4360&device=ep405pc&vendor… Configuration of gigabyte:ga-6bxc has been fixed Configuration of iei:pcisa-lx-800-r10 has been fixed Configuration of intel:jarrell has been fixed Configuration of intel:mtarvon has been fixed Configuration of intel:truxton has been fixed Configuration of intel:xe7501devkit has been fixed Configuration of jetway:j7f24 has been fixed Configuration of lippert:frontrunner has been fixed Configuration of lippert:roadrunner-lx has been fixed Configuration of lippert:spacerunner-lx has been fixed Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4360&device=sandpointx3_al… Configuration of msi:ms6119 has been fixed Configuration of msi:ms6147 has been fixed Configuration of msi:ms6178 has been fixed Configuration of nec:powermate2000 has been fixed Configuration of olpc:btest has been fixed Configuration of olpc:rev_a has been fixed Configuration of pcengines:alix1c has been fixed Configuration of rca:rm4100 has been fixed Configuration of supermicro:x6dai_g has been fixed Configuration of supermicro:x6dhe_g has been fixed Configuration of supermicro:x6dhe_g2 has been fixed Configuration of supermicro:x6dhr_ig has been fixed Configuration of supermicro:x6dhr_ig2 has been fixed Configuration of televideo:tc7020 has been fixed Configuration of thomson:ip1000 has been fixed Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4360&device=briq&vendor=to… Configuration of tyan:s1846 has been fixed Configuration of via:epia has been fixed Configuration of via:epia-cn has been fixed Configuration of via:epia-m has been fixed Compilation of via:epia-m700 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4360&device=epia-m700&vend… Configuration of via:pc2500e has been fixed Configuration of via:vt8454c has been fixed If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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Re: [coreboot] [v2] r4360 - in trunk/coreboot-v2/src/mainboard: a-trend/atc-6220 a-trend/atc-6240 abit/be6-ii_v2_0 advantech/pcm-5820 amd/db800 amd/norwich amd/rumba artecgroup/dbe61 asi/mb_5blgp asi/mb_5blmp asus/mew-am asus/mew-vm asus/p2b asus/p2b
by Myles Watson 17 Jun '09

17 Jun '09

Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb > =================================================================== > --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-17 > 15:33:57 UTC (rev 4359) > +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/Options.lb 2009-06-17 > 16:38:43 UTC (rev 4360) > @@ -20,6 +20,7 @@ > > uses HAVE_MP_TABLE > uses CONFIG_CBFS > +uses CONFIG_USE_INIT > uses HAVE_PIRQ_TABLE > uses USE_FALLBACK_IMAGE > uses HAVE_FALLBACK_BOOT > > Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb > =================================================================== > --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-17 > 15:33:57 UTC (rev 4359) > +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/Options.lb 2009-06-17 > 16:38:43 UTC (rev 4360) > @@ -20,6 +20,7 @@ > > uses HAVE_MP_TABLE > uses CONFIG_CBFS > +uses CONFIG_USE_INIT > uses HAVE_PIRQ_TABLE > uses USE_FALLBACK_IMAGE > uses HAVE_FALLBACK_BOOT This patch made me want include files for uses clauses. There is a lot of repitition. Thanks, Myles

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Re: [coreboot] build service results for r4359 broken?
by Harrison, Jon (SELEX GALILEO, UK) 17 Jun '09

17 Jun '09

Joe, I noticed this, this morning. (I fixed it locally to test my CN400 patch, and the fix is in the CN400 patch posted this morning - Ididn't know if it was just me!) src/pc80/Config.lb needs an extra 'uses CONFIG_USE_INIT' line in it. This is a latent bug in this file that's been show up from somewhere else.... Jon -----Original Message----- From: coreboot-bounces(a)coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of coreboot-request(a)coreboot.org Sent: 17 June 2009 17:39 To: coreboot(a)coreboot.org Subject: coreboot Digest, Vol 52, Issue 124 *** WARNING *** This message has originated outside your organisation, either from an external partner or the Global Internet. Keep this in mind if you answer this message. Send coreboot mailing list submissions to coreboot(a)coreboot.org To subscribe or unsubscribe via the World Wide Web, visit http://www.coreboot.org/mailman/listinfo/coreboot or, via email, send a message with subject or body 'help' to coreboot-request(a)coreboot.org You can reach the person managing the list at coreboot-owner(a)coreboot.org When replying, please edit your Subject line so it is more specific than "Re: Contents of coreboot digest..." Today's Topics: 1. Re: build service results for r4359 broken? (Joseph Smith) 2. Re: build service results for r4359 broken? (Ward Vandewege) 3. Re: ASUS KFN4D16 - K8 FAM10 (Myles Watson) 4. [v2] r4360 - in trunk/coreboot-v2/src/mainboard: a-trend/atc-6220 a-trend/atc-6240 abit/be6-ii_v2_0 advantech/pcm-5820 amd/db800 amd/norwich amd/rumba artecgroup/dbe61 asi/mb_5blgp asi/mb_5blmp asus/mew-am asus/mew-vm asus/p2b asus/p2b-d asus/p2b-ds asus/p2b-f asus/p3b-f axus/tc320 azza/pt-6ibd bcom/winnet100 bcom/winnetp680 biostar/m6tba compaq/deskpro_en_sff_p600 dell/s1850 digitallogic/adl855pc digitallogic/msm800sev eaglelion/5bcm gigabyte/ga-6bxc iei/juki-511p iei/nova4899r iei/pcisa-lx-800-r10 intel/jarrell intel/mtarvon intel/truxton intel/xe7501devkit jetway/j7f24 lippert/frontrunner lippert/roadrunner-lx lippert/spacerunner-lx msi/ms6119 msi/ms6147 msi/ms6178 nec/powermate2000 olpc/btest olpc/rev_a pcengines/alix1c rca/rm4100 supermicro/x6dai_g supermicro/x6dhe_g supermicro/x6dhe_g2 supermicro/x6dhr_ig supermicro/x6dhr_ig2 televideo/tc7020 thomson/ip1000 tyan/s1846 via/epia via/epia-cn via/epia-m via/pc2500e via/vt8454c (svn(a)coreboot.org) ---------------------------------------------------------------------- Message: 1 Date: Wed, 17 Jun 2009 11:57:39 -0400 From: Joseph Smith <joe(a)settoplinux.org> To: coreboot mailinglist <coreboot(a)coreboot.org> Subject: Re: [coreboot] build service results for r4359 broken? Message-ID: <9cd2430bda7419af8eff8a6cbb862878(a)imap.1and1.com> Content-Type: text/plain; charset="UTF-8" On Wed, 17 Jun 2009 17:44:25 +0200, coreboot information <info(a)coresystems.de> wrote: > Dear coreboot readers! > > This is the automatic build system of coreboot. > > The developer "mjones" checked in revision 4359 to > the coreboot repository. This caused the following > changes: > Hmm, every board is broken, looks like an issue with CONFIG_USE_INIT ??? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org ------------------------------ Message: 2 Date: Wed, 17 Jun 2009 12:04:21 -0400 From: Ward Vandewege <ward(a)gnu.org> To: Joseph Smith <joe(a)settoplinux.org> Cc: coreboot mailinglist <coreboot(a)coreboot.org> Subject: Re: [coreboot] build service results for r4359 broken? Message-ID: <20090617160421.GA22466(a)countzero.vandewege.net> Content-Type: text/plain; charset=us-ascii On Wed, Jun 17, 2009 at 11:57:39AM -0400, Joseph Smith wrote: > > > > On Wed, 17 Jun 2009 17:44:25 +0200, coreboot information > <info(a)coresystems.de> wrote: > > Dear coreboot readers! > > > > This is the automatic build system of coreboot. > > > > The developer "mjones" checked in revision 4359 to > > the coreboot repository. This caused the following > > changes: > > > Hmm, every board is broken, looks like an issue with CONFIG_USE_INIT ??? But it was not because of Marc's commit - its r4357 that did it. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior Systems Administrator ------------------------------ Message: 3 Date: Wed, 17 Jun 2009 10:13:16 -0600 From: Myles Watson <mylesgw(a)gmail.com> To: Thomas Ward <tomwardathome(a)yahoo.co.uk> Cc: "coreboot(a)coreboot.org" <coreboot(a)coreboot.org> Subject: Re: [coreboot] ASUS KFN4D16 - K8 FAM10 Message-ID: <2831fecf0906170913m2ad22008wb02028d3780034c2(a)mail.gmail.com> Content-Type: text/plain; charset="iso-8859-1" On Tue, Jun 16, 2009 at 3:36 AM, Thomas Ward <tomwardathome(a)yahoo.co.uk>wrote: > Hello, > I realise your list is very technical and this is probably a daft set of > question so please forgive me if it is cluttering up your list but I > couldn't find a more appropriate place to ask,.. > ... so here goes. > > My questions are about running coreboot on an ASUS KFN4-D16 with an NVIDIA > CK804 chipset and a SST SST49LF080A (BIOS?) chip 33-4C-NHE 0631138-B > I have 2 cpus one is a 65nm dual core opteron 2210, the second CPU is a > quad core 45nm "Shanghai" opteron 2376 - this CPU isn't supported by the > ASUS BIOS. > My aim is to get the board to boot with the quad core CPU, I would be happy > if it boots with support for all the RAM and at least one of the ethernet > ports, I can live without PCI, SATA, USB etc. They should all work. > My plan is to use a BIOS saviour and buy a second SST49LF080A chip and > then > > 1. flash coreboot for K8 (?) with flashrom to verify that coreboot works > on this board > 2. flash coreboot for fam10 (?) with flashrom > > does this sound like a good plan? Yes. > I have a couple of other questions > E. what sort of BIOS chip / bios saviour kit should I use with this board? RD1 output from flashrom, superiotool and lspci appended below, > > many thanks for any help and good luck with your project, > > Tom Ward > > root@shed:/home/tom/coreboot/flashrom# ./flashrom > flashrom v0.9.0-r555 > No coreboot table found. > Found chipset "NVIDIA CK804", enabling flash write... OK. > Calibrating delay loop... OK. > Found chip "SST SST49LF080A" (1024 KB) at physical address 0xfff00000. Hopefully this chip is socketed. > superiotool r3695 > Found Winbond W83627THF/THG (id=0x82, rev=0x84) at 0x2e This SuperIO is supported. > 00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev > a4) > This board is very similar to the tyan/s2892. If I were you, my first step would be to get the BIOS savior (or just use the pushpin method) http://www.coreboot.org/Developer_Manual Once you can recover from a bad flash, check out the latest coreboot-v2 mkdir src/mainboard/asus/kfn4-d16 svn cp src/mainboard/tyan/s2892/* src/mainboard/asus/kfn4-d16/ mkdir targets/asus/kfn4-d16 svn cp targets/tyan/s2892/Config.lb targets/asus/kfn4-d16/ edit src/mainboard/asus/kfn4-d16/Config.lb Enable devices that are in your lspci, disable any that don't show up. Don't worry about cards that you plug in, they'll be found automatically. Change the SuperIO from chip superio/winbond/w83627hf to superio/winbond/w83627thf and change any settings there that you need to. Change socket_940 to socket_F (When you're ready to switch to fam10) Change amdk8 to amdfam10 everywhere (may need some other small fixups) edit targets/asus/kfn4-d16/Config.lb Change s2892 to kfn4-d16 make sure ROM_SIZE matches the chip you're using. cd targets ./buildtarget asus/kfn4-d16 make a payload (Maybe seabios) cp your_payload targets/asus/kfn4-d16/kfn4-d16/payload.elf make -C asus/kfn4-d16/kfn4-d16 Last step is to send your patches to the list with a Signed-off-by: <your-email> line. Thanks, Myles

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[PATCH] flashrom: VIA VX800 support
by Arjan Koers 17 Jun '09

17 Jun '09

The VIA VX800 chipset works with the VT8237S code after adding an entry for the VX800 PCI ID. Signed-off-by: Arjan Koers <0h3q2rmn2bdb(a)list.nospam.xutrox.com> Index: chipset_enable.c =================================================================== --- chipset_enable.c (revision 589) +++ chipset_enable.c (working copy) @@ -1028,6 +1028,7 @@ {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, In case anyone needs information about the VX800 chipset, the VX800 / VX820 Series System Programming Manual can be downloaded from: http://linux.via.com.tw/support/beginDownload.action?eleid=161&fid=241 The tests below were performed on my Jetway NF77-N1G6-LF board with VIA VX800 chipset and VIA Nano CPU. Information about the board can be found at these locations: http://www.jetwaycomputer.com/NF77.html http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=581 # ./flashrom flashrom v0.9.0-r589 No coreboot table found. Found chipset "VIA VX800", enabling flash write... Mapping VT8237S MMIO registers at 0xfed10000, unaligned size 0x70. OK. Calibrating delay loop... OK. Found chip "Winbond W25x40" (512 KB) at physical address 0xfff80000. No operations were specified. # ./flashrom -r backup-a02.bin flashrom v0.9.0-r589 No coreboot table found. Found chipset "VIA VX800", enabling flash write... Mapping VT8237S MMIO registers at 0xfed10000, unaligned size 0x70. OK. Calibrating delay loop... OK. Found chip "Winbond W25x40" (512 KB) at physical address 0xfff80000. Reading flash... done. # ./flashrom -E flashrom v0.9.0-r589 No coreboot table found. Found chipset "VIA VX800", enabling flash write... Mapping VT8237S MMIO registers at 0xfed10000, unaligned size 0x70. OK. Calibrating delay loop... OK. Found chip "Winbond W25x40" (512 KB) at physical address 0xfff80000. Erasing flash chip... SUCCESS. # ./flashrom -w nf77a03.bin flashrom v0.9.0-r589 No coreboot table found. Found chipset "VIA VX800", enabling flash write... Mapping VT8237S MMIO registers at 0xfed10000, unaligned size 0x70. OK. Calibrating delay loop... OK. Found chip "Winbond W25x40" (512 KB) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: COMPLETE.

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coreboot June 2009