coreboot June 2009

coreboot@coreboot.org

84 participants
500 discussions

Re :Anyone know how to use emulation-qemu-x86.rom
by wangji 25 Jun '09

25 Jun '09

hi, I would just do ln -s your_rom bios.bin && qemu -L . -hda /dev/null --nographic of course ,if you want more stuff to play with, replace /dev/null with your rootfs_qemu_img

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flashrom testing requested by uwe on IRC
by Warren Turkal 25 Jun '09

25 Jun '09

Uwe, Here's the testing you requested o IRC earlier. I am confirming that flashes are consistently successful and that everything appears to be in order. Thanks, wt wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -Ewv ex58ud4p.f8 flashrom v0.9.0-r631 More than one operation specified. Aborting. wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -Ew ex58ud4p.f8 flashrom v0.9.0-r631 More than one operation specified. Aborting. wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -E flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH10R", enabling flash write... OK. Calibrating delay loop... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. Erasing flash chip... SUCCESS. wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -w ex58ud4p.f8 flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH10R", enabling flash write... OK. Calibrating delay loop... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... COMPLETE. Verifying flash... VERIFIED. wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -v ex58ud4p.f8 flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH10R", enabling flash write... OK. Calibrating delay loop... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. wt@mediakitchen:~/test$ sudo ../projects/coreboot/coreboot-v3/util/flashrom/flashrom -v ex58ud4p.f8 flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH10R", enabling flash write... OK. Calibrating delay loop... OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. wt@mediakitchen:~/test$

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Re: [coreboot] Patch RE: coreboot for C3/CN400 (Luke) - Long Lines Fixed
by Uwe Hermann 25 Jun '09

25 Jun '09

On Wed, Jun 24, 2009 at 01:44:30PM +0100, Harrison, Jon (SELEX GALILEO, UK) wrote: > Sorry Long lines were wrapped in last post Please add a Signed-off-by line to every patch you post, see http://www.coreboot.org/Development_Guidelines#Sign-off_Procedure Thanks, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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I've got this message...
by Rick Ant 25 Jun '09

25 Jun '09

I try to run the bios.bin that i've created and getting these message : Is it ok ? I want to try it on my 49LF004 Anyone opinion will be helped... Thanks =================== telebit:~/Project/Kantor/Thin_client/qemu-0.10.5/i386-softmmu # ./qemu -L ~ -hda /root/Project/Kantor/Thin_client/qemu-0.10.5/disk.img -nographic Could not open '/dev/kqemu' - QEMU acceleration layer not activated: No such file or directory coreboot-2.0.0-r-GRUB2 Thu Jun 25 10:03:17 WIT 2009 starting... Uncompressing coreboot to RAM. Jumping to image. Check CBFS header at fffeffd0 magic is 4f524243 Found CBFS header at fffeffd0 Check CBFS: follow chain: fff80000 + 28 + 6ffb8 + align -> fffeffe0 CBFS: Could not find file normal/coreboot_ram Jumping to image. qemu: fatal: Trying to execute code outside RAM or ROM at 0x000a0000 EAX=00000000 EBX=ffff01d7 ECX=000003f8 EDX=03ffffdc ESI=00000000 EDI=ffffffff EBP=00000000 ESP=03ffffd4 EIP=0009ff81 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES =0010 00000000 ffffffff 00cf9300 CS =0008 00000000 ffffffff 00cf9b00 SS =0010 00000000 ffffffff 00cf9300 DS =0010 00000000 ffffffff 00cf9300 FS =0010 00000000 ffffffff 00cf9300 GS =0010 00000000 ffffffff 00cf9300 LDT=0000 00000000 0000ffff 00008200 TR =0000 00000000 0000ffff 00008b00 GDT= ffff0044 00000017 IDT= 00000000 0000ffff CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000 DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000 DR6=ffff0ff0 DR7=00000400 CCS=00000000 CCD=00000001 CCO=ADDB FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80 FPR0=0000000000000000 0000 FPR1=0000000000000000 0000 FPR2=0000000000000000 0000 FPR3=0000000000000000 0000 FPR4=0000000000000000 0000 FPR5=0000000000000000 0000 FPR6=0000000000000000 0000 FPR7=0000000000000000 0000 XMM00=00000000000000000000000000000000 XMM01=00000000000000000000000000000000 XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000 XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000 XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000 Aborted

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LInux kernel in Flash
by Harald Gutmann 25 Jun '09

25 Jun '09

Hello, to get a fast boot time on my mainboard I want to stick a whole kernel-image into my flashchip. The idea I want to realize is to have a kernel image in the Flash which has all drivers for my hardware compiled in. I don't want to have a busybox environment or an X-server in the flash, but just the kernel image. Booting should look as follows: * Coreboot initialization * Payload Kernel Image (64bit) * (sysv)init or upstart from harddrive Advantage: * Fast Disadvantage: * needs to reflash/rebuild the bios every kernel update What do I need except a kernel image which has all drivers compilled in? What needs to be done to get this setup working? Kind regards, Harald

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Fun ugliness
by Myles Watson 25 Jun '09

25 Jun '09

Does this make sense? Since CAR isn't backed by actual RAM, if I do a ram test of any reasonable size it evicts my stack and I can't continue. So, when I'm "comfortable" with my RAM setup I have to go blind. Is there a way around that? Anything I can think of would be very implementation specific. Thanks, Myles

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[PATCH] flashrom: SB600 SPI: Kill unused variable
by Carl-Daniel Hailfinger 25 Jun '09

25 Jun '09

SB600 SPI: Kill unused variable. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-sb600spi_unneeded_struct/sb600spi.c =================================================================== --- flashrom-sb600spi_unneeded_struct/sb600spi.c (Revision 622) +++ flashrom-sb600spi_unneeded_struct/sb600spi.c (Arbeitskopie) @@ -25,6 +25,7 @@ #include "flash.h" #include "spi.h" +/* This struct is unused, but helps visualize the SB600 SPI BAR layout. */ struct sb600_spi_controller { unsigned int spi_cntrl0; /* 00h */ unsigned int restrictedcmd1; /* 04h */ @@ -36,7 +37,6 @@ unsigned int spi_fakeid; /* 1Ch */ }; -struct sb600_spi_controller *spi_bar = NULL; uint8_t *sb600_spibar; int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) @@ -111,8 +111,6 @@ writecnt--; - spi_bar = (struct sb600_spi_controller *) sb600_spibar; - printf_debug("%s, cmd=%x, writecnt=%x, readcnt=%x\n", __func__, cmd, writecnt, readcnt); -- http://www.hailfinger.org/ Index: flashrom-sb600spi_unneeded_struct/sb600spi.c =================================================================== --- flashrom-sb600spi_unneeded_struct/sb600spi.c (Revision 622) +++ flashrom-sb600spi_unneeded_struct/sb600spi.c (Arbeitskopie) @@ -25,6 +25,7 @@ #include "flash.h" #include "spi.h" +/* This struct is unused, but helps visualize the SB600 SPI BAR layout. */ struct sb600_spi_controller { unsigned int spi_cntrl0; /* 00h */ unsigned int restrictedcmd1; /* 04h */ @@ -36,7 +37,6 @@ unsigned int spi_fakeid; /* 1Ch */ }; -struct sb600_spi_controller *spi_bar = NULL; uint8_t *sb600_spibar; int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) @@ -111,8 +111,6 @@ writecnt--; - spi_bar = (struct sb600_spi_controller *) sb600_spibar; - printf_debug("%s, cmd=%x, writecnt=%x, readcnt=%x\n", __func__, cmd, writecnt, readcnt);

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locking...
by Carl-Daniel Hailfinger 24 Jun '09

24 Jun '09

Hi, as we move into the multicore world, messages get harder and harder to read when they are interspersed byte-wise. I propose to add optional locking to printk. However, this locking has to work when some CPUs are in CAR and others are in RAM. And that's the big problem. AFAICS we can't simply use atomic normal memory acceses since the CPUs in CAR won't see that. Atomic register modifications are not possible across processors AFAICS. The only idea I have is abusing some MMIO chipset/CPU space which is usable as scratch space. In theory, that should work. But do CPUs or chipsets have such MMIO areas? Of course, I'm aware that locking (if possible at all) will be highly CPU/chipset dependent, but even if we can make locking work on only a subset of platforms, it is still a lot better than nothing. Ideas? Utter rejection? Tell me. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Failover and Fallback
by Harald Gutmann 24 Jun '09

24 Jun '09

Hello, I know how the coreboot image is scaled with Failover/Fallback/Normal. http://www.coreboot.org/Anatomy_of_a_Failover_coreboot_v2_Image But my question is when does coreboot access Failover or Fallback? I wasn't able to determine that, but it would be good to know. Kind regards, Harald

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Re: [coreboot] Which file should I burn?
by Rick Ant 24 Jun '09

24 Jun '09

I can't find EEPROM chip while running flashrom from the systemrescue LiveCD... it said No EEPROM/Flash device found....is it depend on the motherboard? what is the similar chip to force ? my chip is 49LF004 and chipset is north=intel 82810 and south = intel 82801 Thanks --- On Tue, 6/23/09, ron minnich <rminnich(a)gmail.com> wrote: From: ron minnich <rminnich(a)gmail.com> Subject: Re: [coreboot] Which file should I burn? To: "Rick Ant" <rick_077(a)yahoo.com> Cc: coreboot(a)coreboot.org Date: Tuesday, June 23, 2009, 10:51 PM don't forget the wonderfulness of earlyprintk when booting a linux kernel and you are not sure if it is right. you just append it to the command line. Here is one example. I use 'keep' when I'm really being paranoid. earlyprintk=ttyS0,115200,keep ron

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coreboot June 2009