coreboot January 2009

coreboot@coreboot.org

66 participants
320 discussions

Re: [coreboot] SCALE
by Dan Lykowski 12 Jan '09

12 Jan '09

I would suggest this part: http://www.innodisk.com/flashstorage_specification.jsp?flashid=29 They plug right in to the SATA port. They have a minor quirk where you have to 'force.libata=1:1.5g' to get them to work under Linux but that is the only negative I have run across so far. Dan Lykowski --- On Mon, 1/12/09, Peter Stuge <peter(a)stuge.se> wrote: From: Peter Stuge <peter(a)stuge.se> Subject: Re: [coreboot] SCALE To: coreboot(a)coreboot.org Date: Monday, January 12, 2009, 2:55 PM -----Inline Attachment Follows----- ron minnich wrote: > I'd like to have the 5 second "boot to X" demo at the table. If > somebody can help direct me to getting that set up, I'd appreciate > it. If you don't want to cram everything into a 16Mbit flash chip, which could be tight, you need some ATA flash to store apps on. Since the dbm690 has an LPC PLCC socket you can use the dongle and my adapter plug though, that way you have 32Mbit which is already more roomy. Maybe the dongle occupied for the ALIX already? //Peter -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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r3859 - trunk/util/flashrom
by svn＠coreboot.org 12 Jan '09

12 Jan '09

Author: stuge Date: 2009-01-12 22:31:14 +0100 (Mon, 12 Jan 2009) New Revision: 3859 Modified: trunk/util/flashrom/board_enable.c Log: flashrom: Board enable for GIGABYTE GA-MA78G-DS3H This board has 2x MX25L8005 flash chips behind an IT8718F LPC->SPI bridge. The board uses GIGABYTE's patented BIOS failover technology, and at this point we do not know how to control which of the two chips flashrom actually hits. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Yul Rottmann <yulrottmann(a)bitel.net> Modified: trunk/util/flashrom/board_enable.c =================================================================== --- trunk/util/flashrom/board_enable.c 2009-01-12 21:28:03 UTC (rev 3858) +++ trunk/util/flashrom/board_enable.c 2009-01-12 21:31:14 UTC (rev 3859) @@ -634,6 +634,8 @@ "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash}, + {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, + NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash}, {0x1039, 0x0761, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,

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r3858 - trunk/util/flashrom
by svn＠coreboot.org 12 Jan '09

12 Jan '09

Author: stuge Date: 2009-01-12 22:28:03 +0100 (Mon, 12 Jan 2009) New Revision: 3858 Modified: trunk/util/flashrom/it87spi.c Log: flashrom: IT8718F works just like IT8716F. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Yul Rottmann <yulrottmann(a)bitel.net> Modified: trunk/util/flashrom/it87spi.c =================================================================== --- trunk/util/flashrom/it87spi.c 2009-01-12 21:00:35 UTC (rev 3857) +++ trunk/util/flashrom/it87spi.c 2009-01-12 21:28:03 UTC (rev 3858) @@ -80,7 +80,7 @@ id |= regval(port, CHIP_ID_BYTE2_REG); /* TODO: Handle more IT87xx if they support flash translation */ - if (id == 0x8716) { + if (0x8716 == id || 0x8718 == id) { /* NOLDN, reg 0x24, mask out lowest bit (suspend) */ tmp = regval(port, 0x24) & 0xFE; printf("Serial flash segment 0x%08x-0x%08x %sabled\n",

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r3857 - trunk/util/flashrom
by svn＠coreboot.org 12 Jan '09

12 Jan '09

Author: stuge Date: 2009-01-12 22:00:35 +0100 (Mon, 12 Jan 2009) New Revision: 3857 Modified: trunk/util/flashrom/flashrom.c trunk/util/flashrom/layout.c Log: flashrom: Check return value of fscanf()/fwrite()/fread() Fix build error on distros with warn_unused_result attributes in glibc. Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Yul Rottmann <yulrottmann(a)bitel.net> Modified: trunk/util/flashrom/flashrom.c =================================================================== --- trunk/util/flashrom/flashrom.c 2009-01-12 16:16:08 UTC (rev 3856) +++ trunk/util/flashrom/flashrom.c 2009-01-12 21:00:35 UTC (rev 3857) @@ -296,7 +296,7 @@ int main(int argc, char *argv[]) { uint8_t *buf; - unsigned long size; + unsigned long size, numbytes; uint32_t erasedbytes; FILE *image; /* Probe for up to three flash chips. */ @@ -517,11 +517,11 @@ exclude_end_position - exclude_start_position); - fwrite(buf, sizeof(char), size, image); + numbytes = fwrite(buf, 1, size, image); fclose(image); - printf("done.\n"); + printf("%s.\n", numbytes == size ? "done" : "FAILED"); free(buf); - exit(0); + return numbytes != size; } // FIXME: flash writes stay enabled! exit(1); @@ -615,9 +615,11 @@ memset(buf + exclude_start_position, 0, exclude_end_position - exclude_start_position); - fwrite(buf, sizeof(char), size, image); + numbytes = fwrite(buf, 1, size, image); fclose(image); - printf("done.\n"); + printf("%s.\n", numbytes == size ? "done" : "FAILED"); + if (numbytes != size) + return 1; } else { struct stat image_stat; @@ -634,9 +636,13 @@ exit(1); } - fread(buf, sizeof(char), size, image); + numbytes = fread(buf, 1, size, image); show_id(buf, size, force); fclose(image); + if (numbytes != size) { + fprintf(stderr, "Error: Failed to read file. Got %ld bytes, wanted %ld!\n", numbytes, size); + return 1; + } } /* exclude range stuff. Nice idea, but at the moment it is only Modified: trunk/util/flashrom/layout.c =================================================================== --- trunk/util/flashrom/layout.c 2009-01-12 16:16:08 UTC (rev 3856) +++ trunk/util/flashrom/layout.c 2009-01-12 21:00:35 UTC (rev 3857) @@ -146,8 +146,8 @@ while (!feof(romlayout)) { char *tstr1, *tstr2; - fscanf(romlayout, "%s %s\n", tempstr, - rom_entries[romimages].name); + if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) + continue; #if 0 // fscanf does not like arbitrary comments like that :( later if (tempstr[0] == '#') {

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SCALE
by ron minnich 12 Jan '09

12 Jan '09

OK, this is the first of several calls for help. I'm time-starved right now as I have things I have to get working on BG/P, my day job ;-) I'd like to have the 5 second "boot to X" demo at the table. If somebody can help direct me to getting that set up, I'd appreciate it. I will probably do this on a dmb690t mobo (marc? What kind of 1M flash part do I use?). I want to have a "naked mainboard" for the demo. I'm going to have a v3 demo; artec guys, I think I've asked this but ... what would you like to see. can someone put this in a nice place on the wiki: http://scale7x.socallinuxexpo.org/conference-info/banners-and-promos. For the talk I'm going to show how to use v2, then v3, then seabios, then buildrom. I'm happy to lay out promotional material on the table if you send it to me in time. We've got 5 weeks left. One thing that comes to mind is the AMD Embedded initiative with the pointer to the coreboot page. VIA, do you have any paper for me to hand out? once again, any of you who want to help are most welcome. thanks ron

4 3

Re: [coreboot] DFI LANPARTY NF4 SLI
by Chris Lingard 12 Jan '09

12 Jan '09

lambros galanis wrote: > I think my motherboard has the CK804 chipset These are used by the coreboot project See http://www.coreboot.org/Tyan_S2891#Hardware and http://www.coreboot.org/pipermail/linuxbios/2007-September/024937.html I am not at all experienced with coreboot to give you advice. My DFI motherboard had an identical chip set to a Gigabyte M57SLI, so I just used that code. You could try looking at the Tyan stuff, to see what corresponds I am pretty sure your BIOS chip is a Pm49FL004, is so, that is good, because you can get some SST49LF160 chips, and this gives you a 16M bit chip instead of the standard 4M bit. Perhaps if you identified what chip set it uses, one of the experts might help Chris Lingard

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Re: [coreboot] [patch] Proposed patch for FIDVID question
by Dan Lykowski 12 Jan '09

12 Jan '09

Second attempt with the spaces fixed. Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> Dan Lykowski --- On Thu, 1/8/09, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: From: Bao, Zheng <Zheng.Bao(a)amd.com> Subject: Re: [coreboot] [patch] Proposed patch for FIDVID question To: "Dan Lykowski" <engineerguy3737(a)yahoo.com>, "Marc Jones" <marcj303(a)gmail.com> Cc: "Coreboot" <coreboot(a)coreboot.org> Date: Thursday, January 8, 2009, 9:44 PM It works on dbm690t and pistachio. Please note some indents are spaces instead of tabs. Please correct it. Zheng Acked-by: Zheng Bao <zheng.bao(a)amd.com>

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r3856 - in trunk/coreboot-v2/src/mainboard/amd: dbm690t pistachio serengeti_cheetah
by svn＠coreboot.org 12 Jan '09

12 Jan '09

Author: mjones Date: 2009-01-12 17:16:08 +0100 (Mon, 12 Jan 2009) New Revision: 3856 Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c Log: Check to see if K8 processor is capable of changing FIDVID otherwise it will throw a GP# when reading FIDVID_STATUS Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> Acked-by: Zheng Bao <zheng.bao(a)amd.com> Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c 2009-01-11 03:31:02 UTC (rev 3855) +++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/cache_as_ram_auto.c 2009-01-12 16:16:08 UTC (rev 3856) @@ -161,6 +161,7 @@ int needs_reset = 0; u32 bsp_apicid = 0; msr_t msr; + struct cpuid_result cpuid1; struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); @@ -197,17 +198,27 @@ rs690_early_setup(); sb600_early_setup(); - msr=rdmsr(0xc0010042); - printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + /* Check to see if processor is capable of changing FIDVID */ + /* otherwise it will throw a GP# when reading FIDVID_STATUS */ + cpuid1 = cpuid(0x80000007); + if( (cpuid1.edx & 0x6) == 0x6 ) { - enable_fid_change(); - enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); - init_fidvid_bsp(bsp_apicid); + /* Read FIDVID_STATUS */ + msr=rdmsr(0xc0010042); + printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); - /* show final fid and vid */ - msr=rdmsr(0xc0010042); - printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + enable_fid_change(); + enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); + init_fidvid_bsp(bsp_apicid); + /* show final fid and vid */ + msr=rdmsr(0xc0010042); + printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + + } else { + printk_debug("Changing FIDVID not supported\n"); + } + needs_reset = optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); rs690_htinit(); Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c 2009-01-11 03:31:02 UTC (rev 3855) +++ trunk/coreboot-v2/src/mainboard/amd/pistachio/cache_as_ram_auto.c 2009-01-12 16:16:08 UTC (rev 3856) @@ -155,6 +155,7 @@ int needs_reset = 0; u32 bsp_apicid = 0; msr_t msr; + struct cpuid_result cpuid1; struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); @@ -198,17 +199,27 @@ post_code(0x04); - msr = rdmsr(0xc0010042); - printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + /* Check to see if processor is capable of changing FIDVID */ + /* otherwise it will throw a GP# when reading FIDVID_STATUS */ + cpuid1 = cpuid(0x80000007); + if( (cpuid1.edx & 0x6) == 0x6 ) { - enable_fid_change(); - enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); - init_fidvid_bsp(bsp_apicid); + /* Read FIDVID_STATUS */ + msr=rdmsr(0xc0010042); + printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); - // show final fid and vid - msr = rdmsr(0xc0010042); - printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + enable_fid_change(); + enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); + init_fidvid_bsp(bsp_apicid); + /* show final fid and vid */ + msr=rdmsr(0xc0010042); + printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); + + } else { + printk_debug("Changing FIDVID not supported\n"); + } + post_code(0x05); needs_reset = optimize_link_coherent_ht(); Modified: trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c 2009-01-11 03:31:02 UTC (rev 3855) +++ trunk/coreboot-v2/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c 2009-01-12 16:16:08 UTC (rev 3856) @@ -259,6 +259,7 @@ int needs_reset; int i; unsigned bsp_apicid = 0; + struct cpuid_result cpuid1; if (bist == 0) { bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); @@ -311,8 +312,13 @@ #endif #if K8_SET_FIDVID == 1 + /* Check to see if processor is capable of changing FIDVID */ + /* otherwise it will throw a GP# when reading FIDVID_STATUS */ + cpuid1 = cpuid(0x80000007); + if( (cpuid1.edx & 0x6) == 0x6 ) { { + /* Read FIDVID_STATUS */ msr_t msr; msr=rdmsr(0xc0010042); print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); @@ -332,6 +338,11 @@ print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); } + + } else { + print_debug("Changing FIDVID not supported\n"); + } + #endif #if 1

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[patch] Add missing FID support check in raminit_f.c
by Dan Lykowski 12 Jan '09

12 Jan '09

Added FID check in raminit_f.c. Same problem that was fixed by my last patch just in a different location. Trying to read MSR(0xC0010042) causes a GP fault on a processor that does not support changing FIDVID. I believe that if the FID support check fails the startup FID should be used. It can be read from MSR(0xC0010015). Thanks, Dan Lykowski Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> ---

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Information request
by (Eaglesoldier) Duane Simpson 11 Jan '09

11 Jan '09

Hi, I really am interested in your bios upgrade for linux but am not a programmer, only proficient in pasting into terminal and many times don't fully understand what is taking place, in other words, a complete newbie. For those like me, is there anyone in your database of developers that will make a bios for my specific computer? The reason for the upgrade is when I first turn it on it gives me the message; the system does not meet the cutoff date (year 2000) or something similar and then continues with the loading. Although there are no major problems, I have minor glitches with mouse functions, and some video doesn't play, although I have all the codecs loaded to run them. I would like to know if doing a bios upgrade could fix some of these problems, and the main reason is to break my dependency on proprietary software. I have an older system, purchased in 1998, and my wife's computer was bought in 1999, I know it's not cutting edge, more like ancient, but I would like to keep it running the best I can for as long as possible. It isn't much but it works and it's all I have. As I said, I don't know alot about my computer, but if I can be told where to find the information about the computer motherboard, the bios (amibios) don't know any version, so would need to find that, and complete information about the best way to make the bios change to best serve my system configuration. If I indeed need to build a bios chip for my system, is there service to help walk me through the process step by step if needed, including how to build and use any tools that are required and how to test the finished product. I have looked at some of the tutorials and what may be required and can definitely say that what would stop me at first is fear of the unknown, as it would entail more than I have ever attempted before. I realize this is a long email, but it needed to be due to my limited experience. I am only hoping that someone with knowledge gained will remember how at some point in their learning experience they needed personal help of a similar nature. I thank you for any help that you may provide, and will wait for your reply. Duane L Simpson

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coreboot January 2009