coreboot January 2009

coreboot@coreboot.org

66 participants
320 discussions

Re: [coreboot] EHCI debug port finder
by Yul Rottmann 15 Jan '09

15 Jan '09

Hello, I come from [1] and maybe I can contribute a bit. First to the page itself: "Finding the USB debug port" links to the script at [2], but should actually link to [3] (the updated script). And in "Hardware capability" the command 'lspci -vs' does not work here, the parameter -s seems unknown. Nonetheless I think I can contribute that my controller has a Debug port. I cannot really verify because I don't have a cable to do so nor am I able to run coreboot, but attached is a file that contains the output of some commands. If I can do furthermore anything for you, feel free to ask. Thanks! Yul Rottmann [1] http://www.coreboot.org/EHCI_Debug_Port [2] http://coreboot.org/pipermail/coreboot/2008-September/038615.html [3] http://coreboot.org/pipermail/coreboot/2008-September/038635.html My mainboard is a Gigabyte GA-MA78G-DS3H (rev. 1.0) $ sudo ./attachment.sh The following PCI devices support a USB debug port (says lspci): 0000:00:12.2 0000:00:13.2 The following PCI devices support a USB debug port (says the kernel): 0000:00:12.2 0000:00:13.2 PCI device 0000:00:12.2, USB bus 3, USB physical port 1 PCI device 0000:00:13.2, USB bus 6, USB physical port 1 Currently connected high-speed devices: Bus# 1 `-Dev# 1 Vendor 0x1d6b Product 0x0001 |-Dev# 4 Vendor 0x046d Product 0xc044 `-Dev# 5 Vendor 0x046d Product 0xc30e Bus# 2 `-Dev# 1 Vendor 0x1d6b Product 0x0001 Bus# 3 `-Dev# 1 Vendor 0x1d6b Product 0x0002 Bus# 4 `-Dev# 1 Vendor 0x1d6b Product 0x0001 Bus# 5 `-Dev# 1 Vendor 0x1d6b Product 0x0001 Bus# 6 `-Dev# 1 Vendor 0x1d6b Product 0x0002 Bus# 7 `-Dev# 1 Vendor 0x1d6b Product 0x0001 $ lspci 00:00.0 Host bridge: Advanced Micro Devices [AMD] RS780 Host Bridge 00:01.0 PCI bridge: Advanced Micro Devices [AMD] RS780 PCI to PCI bridge (int gfx) 00:0a.0 PCI bridge: Advanced Micro Devices [AMD] RS780 PCI to PCI bridge (PCIE port 5) 00:11.0 SATA controller: ATI Technologies Inc SB700/SB800 SATA Controller [AHCI mode] 00:12.0 USB Controller: ATI Technologies Inc SB700/SB800 USB OHCI0 Controller 00:12.1 USB Controller: ATI Technologies Inc SB700 USB OHCI1 Controller 00:12.2 USB Controller: ATI Technologies Inc SB700/SB800 USB EHCI Controller 00:13.0 USB Controller: ATI Technologies Inc SB700/SB800 USB OHCI0 Controller 00:13.1 USB Controller: ATI Technologies Inc SB700 USB OHCI1 Controller 00:13.2 USB Controller: ATI Technologies Inc SB700/SB800 USB EHCI Controller [...] $ lspci -n 00:00.0 0600: 1022:9600 00:01.0 0604: 1022:9602 00:0a.0 0604: 1022:9609 00:11.0 0106: 1002:4391 00:12.0 0c03: 1002:4397 00:12.1 0c03: 1002:4398 00:12.2 0c03: 1002:4396 00:13.0 0c03: 1002:4397 00:13.1 0c03: 1002:4398 00:13.2 0c03: 1002:4396 [...] $ sudo lspci -vvnn [...] 00:12.0 USB Controller [0c03]: ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397] (prog-if 10) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at fe02e000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd Kernel modules: ohci-hcd 00:12.1 USB Controller [0c03]: ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398] (prog-if 10) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at fe02d000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd Kernel modules: ohci-hcd 00:12.2 USB Controller [0c03]: ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396] (prog-if 20) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 17 Region 0: Memory at fe02c000 (32-bit, non-prefetchable) [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Bridge: PM- B3+ Capabilities: [e4] Debug port: BAR=1 offset=00e0 Kernel driver in use: ehci_hcd Kernel modules: ehci-hcd 00:13.0 USB Controller [0c03]: ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397] (prog-if 10) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at fe02b000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd Kernel modules: ohci-hcd 00:13.1 USB Controller [0c03]: ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398] (prog-if 10) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 4 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at fe02a000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd Kernel modules: ohci-hcd 00:13.2 USB Controller [0c03]: ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396] (prog-if 20) Subsystem: Giga-byte Technology Device [1458:5004] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 19 Region 0: Memory at fe029000 (32-bit, non-prefetchable) [size=256] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Bridge: PM- B3+ Capabilities: [e4] Debug port: BAR=1 offset=00e0 Kernel driver in use: ehci_hcd Kernel modules: ehci-hcd [...]

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[PATCH] factor SMM code into generic and specific code
by Stefan Reinauer 15 Jan '09

15 Jan '09

See patch... -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[PATCH] fixes ram init when processor doesn't have FID control
by Dan Lykowski 15 Jan '09

15 Jan '09

This patch fixes ram init problems when using the 9W Sempron part. Trying to read the FIDVID register when the processor does not support FIDVID control causes a GP Fault. This patch reads the startup FID from a different MSR. I have verified this patch to work on the dbm690t platform. This patch includes the changes I submitted a few days ago that haven't been acked yet. I now have a working Coreboot system. ( Although SATA needs a little work so I am not booting linux yet. ) But at least FILO comes up. Dan Lykowski Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com>

2 1

Asus M2A-VM
by Carl-Daniel Hailfinger 15 Jan '09

15 Jan '09

Hi all, my Asus M2A-VM (690G/SB600) is working and boots to memtest and FILO. Memtest works fine over serial (well, I only ran memtest until it reached 15%). FILO can load the kernel, but I didn't have time to enable serial output for my kernel. Thanks to Zheng Bao for adding support for my 690G graphics. I'll post a patch soon. Right now, there are a few more bugs to fix. The ncHT fixup is already known, a clean patch will come tomorrow. On a first boot, I get an endless loop of drive detection fail,trying... until I press the reset button. After that, it boots fine. That message is in the SB600 code. I will enable some debugging that was disabled in revision 3785. Another curiosity is that my power button has become ineffective. It simply initiates a reboot instead of switching off the machine after 4 seconds. That happens only with the FILO payload. Regards, Carl-Daniel -- http://www.hailfinger.org/

5 21

[PATCH] flashrom patch easier board_pciid_enables parsing
by Stephan GUILLOUX 15 Jan '09

15 Jan '09

Hello, Similarly to flashchips array, this patch intends to make the table board_pciid_enables more readable. Also in attachment. Stephan. Signed-off-by: Stephan Guilloux <mailto:stephan.guilloux@free.fr> Index: coreboot-v2/util/flashrom/board_enable.c =================================================================== --- coreboot-v2/util/flashrom/board_enable.c (rÃ©vision 3860) +++ coreboot-v2/util/flashrom/board_enable.c (copie de travail) @@ -626,58 +626,369 @@ }; struct board_pciid_enable board_pciid_enables[] = { - {0x1106, 0x0571, 0x1462, 0x7120, 0x0000, 0x0000, 0x0000, 0x0000, - "msi", "kt4v", "MSI KT4V", board_msi_kt4v}, - {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, - NULL, NULL, "ASUS P4B266", ich2_gpio22_raise}, - {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash}, - {0x10de, 0x03e0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash}, - {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, - NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash}, - {0x1039, 0x0761, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, - {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, - {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, - NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, - NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx}, - {0x1106, 0x3227, 0x1106, 0xAA01, 0x1106, 0x0259, 0x1106, 0xAA01, - NULL, NULL, "VIA EPIA SP", board_via_epia_sp}, - {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, 0xAA08, - NULL, NULL, "VIA EPIA-CN", board_via_epia_sp}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, - NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx}, - {0x10B9, 0x1541, 0x0000, 0x0000, 0x10B9, 0x1533, 0x0000, 0x0000, - "asus", "p5a", "ASUS P5A", board_asus_p5a}, - {0x1166, 0x0205, 0x1014, 0x0347, 0x0000, 0x0000, 0x0000, 0x0000, - "ibm", "x3455", "IBM x3455", board_ibm_x3455}, - {0x8086, 0x7110, 0x0000, 0x0000, 0x8086, 0x7190, 0x0000, 0x0000, - "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3}, - {0x8086, 0x1130, 0x0000, 0x0000, 0x105a, 0x0d30, 0x105a, 0x4d33, - "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd}, - {0x1022, 0x2090, 0x0000, 0x0000, 0x1022, 0x2080, 0x0000, 0x0000, - "artecgroup", "dbe61", "Artec Group DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0x0000, 0x0000, 0x1022, 0x2080, 0x0000, 0x0000, - "artecgroup", "dbe62", "Artec Group DBE62", board_artecgroup_dbe6x}, + { + .first_vendor = 0x1106, + .first_device = 0x0571, + .first_card_vendor = 0x1462, + .first_card_device = 0x7120, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "msi", + .lb_part = "kt4v", + .name = "MSI KT4V", + .enable = board_msi_kt4v, + }, + { + .first_vendor = 0x8086, + .first_device = 0x1a30, + .first_card_vendor = 0x1043, + .first_card_device = 0x8070, + .second_vendor = 0x8086, + .second_device = 0x244b, + .second_card_vendor = 0x1043, + .second_card_device = 0x8028, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "ASUS P4B266", + .enable = ich2_gpio22_raise, + }, + { + .first_vendor = 0x10de, + .first_device = 0x0360, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "gigabyte", + .lb_part = "m57sli", + .name = "GIGABYTE GA-M57SLI-S4", + .enable = it87xx_probe_spi_flash, + }, + { + .first_vendor = 0x10de, + .first_device = 0x03e0, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "gigabyte", + .lb_part = "m61p", + .name = "GIGABYTE GA-M61P-S3", + .enable = it87xx_probe_spi_flash, + }, + { + .first_vendor = 0x1002, + .first_device = 0x4398, + .first_card_vendor = 0x1458, + .first_card_device = 0x5004, + .second_vendor = 0x1002, + .second_device = 0x4385, + .second_card_vendor = 0x1458, + .second_card_device = 0x4385, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "GIGABYTE GA-MA78G-DS3H", + .enable = it87xx_probe_spi_flash, + }, + { + .first_vendor = 0x1039, + .first_device = 0x0761, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "gigabyte", + .lb_part = "2761gxdk", + .name = "GIGABYTE GA-2761GXDK", + .enable = it87xx_probe_spi_flash, + }, + { + .first_vendor = 0x1022, + .first_device = 0x7468, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "iwill", + .lb_part = "dk8_htx", + .name = "IWILL DK8-HTX", + .enable = w83627hf_gpio24_raise_2e, + }, + { + .first_vendor = 0x10de, + .first_device = 0x005e, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "msi", + .lb_part = "k8n-neo3", + .name = "MSI K8N Neo3", + .enable = w83627thf_gpio4_4_raise_4e, + }, + { + .first_vendor = 0x1022, + .first_device = 0x746B, + .first_card_vendor = 0x1022, + .first_card_device = 0x36C0, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "AGAMI", + .lb_part = "ARUMA", + .name = "agami Aruma", + .enable = w83627hf_gpio24_raise_2e, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3177, + .first_card_vendor = 0x1106, + .first_card_device = 0xAA01, + .second_vendor = 0x1106, + .second_device = 0x3123, + .second_card_vendor = 0x1106, + .second_card_device = 0xAA01, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "VIA EPIA M/MII/...", + .enable = board_via_epia_m, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3177, + .first_card_vendor = 0x1043, + .first_card_device = 0x80A1, + .second_vendor = 0x1106, + .second_device = 0x3205, + .second_card_vendor = 0x1043, + .second_card_device = 0x8118, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "ASUS A7V8-MX SE", + .enable = board_asus_a7v8x_mx, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3227, + .first_card_vendor = 0x1106, + .first_card_device = 0xAA01, + .second_vendor = 0x1106, + .second_device = 0x0259, + .second_card_vendor = 0x1106, + .second_card_device = 0xAA01, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "VIA EPIA SP", + .enable = board_via_epia_sp, + }, + { + .first_vendor = 0x1106, + .first_device = 0x0314, + .first_card_vendor = 0x1106, + .first_card_device = 0xaa08, + .second_vendor = 0x1106, + .second_device = 0x3227, + .second_card_vendor = 0x1106, + .second_card_device = 0xAA08, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "VIA EPIA-CN", + .enable = board_via_epia_sp, + }, + { + .first_vendor = 0x8086, + .first_device = 0x1076, + .first_card_vendor = 0x8086, + .first_card_device = 0x1176, + .second_vendor = 0x1106, + .second_device = 0x3059, + .second_card_vendor = 0x10f1, + .second_card_device = 0x2498, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "Tyan Tomcat K7M", + .enable = board_asus_a7v8x_mx, + }, + { + .first_vendor = 0x10B9, + .first_device = 0x1541, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x10B9, + .second_device = 0x1533, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "asus", + .lb_part = "p5a", + .name = "ASUS P5A", + .enable = board_asus_p5a, + }, + { + .first_vendor = 0x1166, + .first_device = 0x0205, + .first_card_vendor = 0x1014, + .first_card_device = 0x0347, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "ibm", + .lb_part = "x3455", + .name = "IBM x3455", + .enable = board_ibm_x3455, + }, + { + .first_vendor = 0x8086, + .first_device = 0x7110, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x8086, + .second_device = 0x7190, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "epox", + .lb_part = "ep-bx3", + .name = "EPoX EP-BX3", + .enable = board_epox_ep_bx3, + }, + { + .first_vendor = 0x8086, + .first_device = 0x1130, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x105a, + .second_device = 0x0d30, + .second_card_vendor = 0x105a, + .second_card_device = 0x4d33, + .lb_vendor = "acorp", + .lb_part = "6a815epd", + .name = "Acorp 6A815EPD", + .enable = board_acorp_6a815epd, + }, + { + .first_vendor = 0x1022, + .first_device = 0x2090, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x1022, + .second_device = 0x2080, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "artecgroup", + .lb_part = "dbe61", + .name = "Artec Group DBE61", + .enable = board_artecgroup_dbe6x, + }, + { + .first_vendor = 0x1022, + .first_device = 0x2090, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x1022, + .second_device = 0x2080, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "artecgroup", + .lb_part = "dbe62", + .name = "Artec Group DBE62", + .enable = board_artecgroup_dbe6x, + }, /* Note: There are >= 2 version of the Kontron 986LCD-M/mITX! */ - {0x8086, 0x27b8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, - {0x10ec, 0x8168, 0x10ec, 0x8168, 0x104c, 0x8023, 0x104c, 0x8019, - "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, - NULL, NULL, "BioStar P4M80-M4", board_biostar_p4m80_m4}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, - NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4}, - {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, - NULL, NULL, "MSI K8T Neo2", w83627thf_gpio4_4_raise_2e}, - {0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */ + { + .first_vendor = 0x8086, + .first_device = 0x27b8, + .first_card_vendor = 0x0000, + .first_card_device = 0x0000, + .second_vendor = 0x0000, + .second_device = 0x0000, + .second_card_vendor = 0x0000, + .second_card_device = 0x0000, + .lb_vendor = "kontron", + .lb_part = "986lcd-m", + .name = "Kontron 986LCD-M", + .enable = board_kontron_986lcd_m, + }, + { + .first_vendor = 0x10ec, + .first_device = 0x8168, + .first_card_vendor = 0x10ec, + .first_card_device = 0x8168, + .second_vendor = 0x104c, + .second_device = 0x8023, + .second_card_vendor = 0x104c, + .second_card_device = 0x8019, + .lb_vendor = "kontron", + .lb_part = "986lcd-m", + .name = "Kontron 986LCD-M", + .enable = board_kontron_986lcd_m, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3149, + .first_card_vendor = 0x1565, + .first_card_device = 0x3206, + .second_vendor = 0x1106, + .second_device = 0x3344, + .second_card_vendor = 0x1565, + .second_card_device = 0x1202, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "BioStar P4M80-M4", + .enable = board_biostar_p4m80_m4, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3227, + .first_card_vendor = 0x1458, + .first_card_device = 0x5001, + .second_vendor = 0x10ec, + .second_device = 0x8139, + .second_card_vendor = 0x1458, + .second_card_device = 0xe000, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "GIGABYTE GA-7VT600", + .enable = board_biostar_p4m80_m4, + }, + { + .first_vendor = 0x1106, + .first_device = 0x3149, + .first_card_vendor = 0x1462, + .first_card_device = 0x7094, + .second_vendor = 0x10ec, + .second_device = 0x8167, + .second_card_vendor = 0x1462, + .second_card_device = 0x094c, + .lb_vendor = NULL, + .lb_part = NULL, + .name = "MSI K8T Neo2", + .enable = w83627thf_gpio4_4_raise_2e, + }, + { + .first_vendor = 0, + .first_device = 0, + .first_card_vendor = 0, + .first_card_device = 0, + .second_vendor = 0, + .second_device = 0, + .second_card_vendor = 0, + .second_card_device = 0, + .lb_vendor = NULL, + .lb_part = NULL, + } /* Keep this */ }; void print_supported_boards(void)

6 24

Fwd: [RFC] Here we go... the SLOF biosemu for coreboot-v3
by Pattrick Hueper 15 Jan '09

15 Jan '09

uups... forgot to add coreboot mailing list in this mail.... ---------- Forwarded message ---------- From: Pattrick Hueper <phueper(a)hueper.net> Date: Sat, Dec 13, 2008 at 8:04 PM Subject: Re: [coreboot] [RFC] Here we go... the SLOF biosemu for coreboot-v3 To: ron minnich <rminnich(a)gmail.com> Hi, just one minor thing... ... SLOF is the Slimline Open Firmware developed by IBM for its Cell Blades and the YDL PowerStation... the biosemu is part of SLOF, and it seems soon part of coreboot :-) but i'd rather not call it SLOF since SLOF is a full IEEE1275 compliant OF implementation including Forth, Client Interface, ... I dont really have a good name for it... in my first mail i called it YABEL (Yet another BIOS Emulation Layer) but that was intended as fun... can we call it biosemu? (x86emu is the processor emulation and biosemu the I/O / INT / Mem Emulation that makes the Option ROMs run...) Or does anybody have a better proposal? Pattrick On Sat, Dec 13, 2008 at 5:27 PM, ron minnich <rminnich(a)gmail.com> wrote: > ok, consensus seems to be we stick with SLOF in coreboot itself. Sorry > for confusion. I'm interested in the v3 port to PPC. > > Thanks pattrick for your work. > > ron >

6 26

[PATCH] Adds a retry/faildown to SB600 SATA detection logic
by Dan Lykowski 15 Jan '09

15 Jan '09

Adds a retry/faildown to SB600 SATA detection logic. SATA port status kept returning 0x1: BAR5+po+28h 1h = Device presence detected but Phy communication not established This patch adds logic to force 1.5g if the drive fails to communicate at 3.0g. Thanks Dan Lykowski Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com>

2 1

r3864 - trunk/coreboot-v2/src/southbridge/amd/sb600
by svn＠coreboot.org 15 Jan '09

15 Jan '09

Author: stuge Date: 2009-01-15 03:35:30 +0100 (Thu, 15 Jan 2009) New Revision: 3864 Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c Log: Adds a retry/faildown to SB600 SATA detection logic. SATA port status kept returning 0x1: BAR5+po+28h 1h = Device presence detected but Phy communication not established This patch adds logic to force 1.5g if the drive fails to communicate at 3.0g. Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c 2009-01-15 02:21:27 UTC (rev 3863) +++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sata.c 2009-01-15 02:35:30 UTC (rev 3864) @@ -175,6 +175,35 @@ byte = readb(sata_bar5 + 0x128 + 0x80 * i); printk_spew("SATA port %i status = %x\n", i, byte); byte &= 0xF; + + if( byte == 0x1 ) { + /* If the drive status is 0x1 then we see it but we aren't talking to it. */ + /* Try to do something about it. */ + printk_spew("SATA device detected but not talking. Trying lower speed.\n"); + + /* Read in Port-N Serial ATA Control Register */ + byte = readb(sata_bar5 + 0x12C + 0x80 * i); + + /* Set Reset Bit and 1.5g bit */ + byte |= 0x11; + writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); + + /* Wait 1ms */ + mdelay(1); + + /* Clear Reset Bit */ + byte &= ~0x01; + writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); + + /* Wait 1ms */ + mdelay(1); + + /* Reread status */ + byte = readb(sata_bar5 + 0x128 + 0x80 * i); + printk_spew("SATA port %i status = %x\n", i, byte); + byte &= 0xF; + } + if (byte == 0x3) { for (j = 0; j < 10; j++) { if (!sata_drive_detect(i, ((i / 2) == 0) ? sata_bar0 : sata_bar2))

1 0

SiS 963/964/965/966/968 Flashrom Support
by bari 15 Jan '09

15 Jan '09

Has anyone worked on Flashrom for the SiS 963, 964, 965, 966 or 968 southbridges? The ga 2761gxdk with SiS966 worked on a year ago used SPI FLASH through an IT8716F superIO. -Bari

2 1

Re: [coreboot] [PATCH] fixes ram init when processor doesn't have FID control
by Dan Lykowski 15 Jan '09

15 Jan '09

So now I will remember to attach the patch. Dan Lykowski Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> --- On Wed, 1/14/09, Dan Lykowski <engineerguy3737(a)yahoo.com> wrote: From: Dan Lykowski <engineerguy3737(a)yahoo.com> Subject: [coreboot] [PATCH] fixes ram init when processor doesn't have FID control To: coreboot(a)coreboot.org Date: Wednesday, January 14, 2009, 9:13 PM This patch fixes ram init problems when using the 9W Sempron part. Trying to read the FIDVID register when the processor does not support FIDVID control causes a GP Fault. This patch reads the startup FID from a different MSR. I have verified this patch to work on the dbm690t platform. This patch includes the changes I submitted a few days ago that haven't been acked yet. I now have a working Coreboot system. ( Although SATA needs a little work so I am not booting linux yet. ) But at least FILO comes up. Dan Lykowski Signed-off-by: Dan Lykowski <lykowdk(a)gmail.com> -----Inline Attachment Follows----- -- coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

2 1

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coreboot January 2009