coreboot May 2008

coreboot@coreboot.org

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387 discussions

[RFC] kill unwanted_vpci, use "hidden" property instead
by Carl-Daniel Hailfinger 09 May '08

09 May '08

Hi, since the Geode/CS553x platform emulates PCI headers for chipset/processor devices, we have the ability to switch off that emulation and hide those virtual PCI headers. Right now we do this in a fairly uncoordinated fashion: I counted at least three different open-coded code sequences with the same effect. My current plan is: - encapsulate all those code sequences into calls of one or two functions - switch all calls from hide_vpci(some_value_calculated_by_hand) to hide_vpci_dev(struct device *) - replace the central array of hand-calculated values with a per-PCI-device "hidden" property. This should result in an overall improvement of code readability and a reduction of code size. As a nice side benefit the dts is a lot easier to manipulate. Questions? Comments? Regards, Carl-Daniel -- http://www.hailfinger.org/

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v3 memtest Unexpected Interrupt - Halting
by Peter Stuge 09 May '08

09 May '08

A long v3 memtest was requested. It doesn't take long before Memtest stops, sometimes it is immediate after startup. The serial console looks like this: Memtest-86 v3.4 | Pass 10% ### 498.1MHz | Test 51% ################### L1 Cache: Unknown | Test #4 [Moving inversions, random pattern] L2 Cache: Unknown | Testing: 120K - 248M 247M Memory : 247M | Pattern: 3430d8ec Chipset : WallTime Cached RsvdMem MemMap Cache ECC Test Pass Errors ECC Errs --------- ------ ------- -------- ----- --- ---- ---- ------ -------- 0:06:53 247M 0K LinuxBIOS on off Std 0 0 ----------------------------------------------------------------------------- Unexpected Interrupt - Halting Test Errors Lowest Error Address: 00000fffffc -Stack:.9MB 0 0 Type: Gen_Prot Addreax: 3430d8ec70f -0001b874M00000000 0001b8a4 00000002 0 PC: 00003bb9ror Mebx: 00000000 0001b878 3430d8ec 0001b8a8 0f7dff00 0 CS: 00000010 - Toecx: ffffffff 1 M0001b87cv0000000d 0001b8ac 0f7dff00 0 Eflag: 00010012s Erredx: 037dfefc 0001b880 00000000 0001b8b0 00100000 3 Code: 00000000e Erredi: ffffffff 0001b884 00003bb9 0001b8b4 00000001 0 Errors per Memory Sesi: 0001bab8 0001b888 00000010 0001b8b8 00000000 0 ebp: 00000001 0001b88c 00010012 0001b8bc 000000ec 0 esp: 0001b874 0001b890 0000000a 0001b8c0 0000000a 0 0001b894 00000028 0001b8c4 00000028 0 CS:EIP: 89 07 39 fa 75 f1 83 ef 04 eb 0001b898 00010c27 0001b8c8 00db7fc0 (ESC)exit (c)configuration (SP)scrol0001b89c(037dfefcl_0001b8cc 0001a850 0001b8a0 00000001 0001b8d0 0000001e //Peter

3 4

r679 - coreboot-v3/mainboard/artecgroup/dbe61
by svn＠coreboot.org 09 May '08

09 May '08

Author: mraudsepp Date: 2008-05-09 08:48:15 +0200 (Fri, 09 May 2008) New Revision: 679 Modified: coreboot-v3/mainboard/artecgroup/dbe61/irq_tables.h Log: artecgroup/dbe61: Sync irq_tables with dbe62 code to fix compilation and have a chance of working properly. In theory the routing settings should work fine the same in DBE61 and DBE62. Some of the settings are left as in v2 until testing can be done once RAM setup is fixed. Signed-off-by: Mart Raudsepp <mart.raudsepp(a)artecdesign.ee> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: coreboot-v3/mainboard/artecgroup/dbe61/irq_tables.h =================================================================== --- coreboot-v3/mainboard/artecgroup/dbe61/irq_tables.h 2008-05-08 14:51:40 UTC (rev 678) +++ coreboot-v3/mainboard/artecgroup/dbe61/irq_tables.h 2008-05-09 06:48:15 UTC (rev 679) @@ -1,60 +1,66 @@ -/* This file was generated by getpir.c, do not modify! - (but if you do, please run checkpir on it to verify) - * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up - * - * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +/* +* This file is part of the coreboot project. +* +* Copyright (C) 2007 Advanced Micro Devices, Inc. +* Copyright (C) 2008 Artec Design LLC. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <pirq_routing.h> -#define ID_SLOT_PCI_NET 1 // ThinCan ethernet -#define ID_SLOT_PCI_RSVD1 2 // reserved entry 1 -#define ID_SLOT_PCI_RSVD3 3 // reserved entry 2 -#define ID_SLOT_PCI_RSVD2 4 // reserved entry 3 -#define ID_EMBED_PCI 0xff // onboard PCI device +/* Number of slots and devices in the PIR table */ +#define IRQ_SLOT_COUNT 3 -// CS5535 PCI INT[A-D] Interrupt Routing lines. -#define NO_CONNECT 0 // not used -#define CS_PCI_INTA 1 // PCI INTA -#define CS_PCI_INTB 2 // PCI INTB -#define CS_PCI_INTC 3 // PCI INTC -#define CS_PCI_INTD 4 // PCI INTD +/* Platform IRQs */ +#define PIRQA 11 +#define PIRQB 10 +#define PIRQC 9 +#define PIRQD 5 -// IRQ bitmap reference line FEDCBA9876543210 -// 0000110000100000b -#define PCI_IRQ 0xc20 // PCI allowed IRQs here +/* Map */ +#define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */ +#define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */ +#define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */ +#define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */ -const struct irq_routing_table intel_irq_routing_table = -{ +/* Link */ +#define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */ +#define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */ +#define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */ +#define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */ + +const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32+16*6, /* there can be total 2 devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ + 32 + 16 * IRQ_SLOT_COUNT, /* Max. number of devices on the bus */ + 0x00, /* Where the interrupt router lies (bus) */ + (0x12 << 3) | 0x0, /* Where the interrupt router lies (dev) */ 0x0800, /* IRQs devoted exclusively to PCI usage */ 0x1022, /* Vendor */ 0x208f, /* Device */ - 0x00000000, /* Crap (miniport) */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xdf, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + 0, /* Crap (miniport) */ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */ + 0xf8, /* Checksum */ { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + /* If you change the number of entries, change IRQ_SLOT_COUNT above! */ + /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ // Geode GX3 Host Bridge and VGA Graphics - {0, 0x01<<3, {{CS_PCI_INTA, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}, {NO_CONNECT, PCI_IRQ}}, ID_EMBED_PCI, 0x0}, + {0x00, (0x01 << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, + // Geode CS5535/CS5536 IO Companion: USB controllers, IDE, Audio. + {0x00, (0x0F << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0}, // Realtek RTL8100/8139 Network Controller - {0, 0x0d<<3, {{CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}}, ID_SLOT_PCI_NET, 0x0}, - // Reserved for future extensions - {0, 0x0c<<3, {{CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}}, ID_SLOT_PCI_RSVD1, 0x0}, - // Geode CS5535/CS5536 IO Companion: USB controllers, IDE, Audio. - {0, 0x0f<<3, {{CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}}, ID_EMBED_PCI, 0x0}, - // Reserved for future extensions - {0, 0x0e<<3, {{CS_PCI_INTC, PCI_IRQ}, {CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}}, ID_SLOT_PCI_RSVD2, 0x0}, - // Reserved for future extensions - {0, 0x0b<<3, {{CS_PCI_INTD, PCI_IRQ}, {CS_PCI_INTA, PCI_IRQ}, {CS_PCI_INTB, PCI_IRQ}, {CS_PCI_INTC, PCI_IRQ}}, ID_SLOT_PCI_RSVD3, 0x0} + {0x00, (0x0D << 3) | 0x0, {{L_PIRQB, M_PIRQB}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, } }; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr); -}

1 0

DBE62 status
by Mart Raudsepp 09 May '08

09 May '08

Hello, Now that ethernet works for me and I can ssh in (having no VGA BIOS and no visible access otherwise other than serial console which I didn't bother to get to work on my full USB HDD system for logins), here are some of the remaining issues with DBE62 that I have noticed: * lxfb and Xorg does not work, probably no video memory setup: lxfb 0000:00:01.1: failed to map frame buffer or controller registers lxfb: probe of 0000:00:01.1 failed with error -12 * The two USB ports on the right side don't power up * NAND is set up on the wrong chip select (should be CS1, currently hardcoded to CS0 in southbridge/cs5536/cs5536.c) * PLL initialization should trust bootstraps For the PLL initialization I intend to send a patch soon after some testing and registry comparisons that sets MANUALCONF in raminit.c back to 0 NAND setup needs some refactoring and allowing selection of the chip select(s) in dts. There I am not sure if we should bother supporting multiple NAND flashes or not. Theoretically I believe it to be possible, but I don't know of any such boards and just know that linux 553x_nand mtd driver seems to be capable of handling that scenario. In the case of supporting only one, there could just be an additional variable in dts that tells which chip select is used for NAND (how it is wired up on the board). Otherwise I guess the new dts array support would come into play? I have no ideas about the USB ports at the moment. Will try to find time to compare dmesg logs, registers and such things, maybe also some setup problems. Same about video memory, but that seems easy enough that I might actually succeed. There were some discussions about merging the DBE61 and DBE62 code, and that might be a good course of action going forward. The differences between these boards as I remember are a) different ethernet adapter - not much concerning firmware, might have a slightly different IRQ routing, but perhaps not, no working raminit for DBE61 doesn't allow to easily find out. b) different GeodeLink speed (PCI clock) - DBE61 has 33MHz, DBE62 66MHz c) different memory chips - need different fake SPDs d) LPC vs FWH boot ROM interface e) dedicated serial port pins brought out (at least CTS, RTS, RX, TX) - another UART, allowing always enabled serial console output without sacrificing DDC Given that, does it seem like a good or bad idea to merge them? There isn't all that much code in mainboard folders, but DBE61 code at the moment could probably use a mostly full code pull from DBE62 code, so a good time to decide on that, it seems. Regards, Mart Raudsepp Artec Design LLC

5 18

v3 IRQ table strangeness
by Carl-Daniel Hailfinger 09 May '08

09 May '08

Hi, is it intentional that irq_tables.h in all v3 AMD GeodeLX/CS5536 targets lists the "NatSemi CS5535 ISA Bridge" at 00:0f.0 as interrupt router? By the way, the dbe61 patch Mart sent tonight changes that for dbe61 to the "CS5536 GeodeLink PCI South Bridge" at 00:12.0 as interrupt router. Regards, Carl-Daniel

3 5

Re: [coreboot] legacy bios support and coreboot
by aaron lwe 09 May '08

09 May '08

> Hi, > > Any chance you can update to the latest git and see if the elf file > out/rom.bin.o works? I still need to setup a coreboot test > environment. > I've tested it, the rom.bin.o has no program header thus cannot be loaded. I think you should generate at least one program header of type LOAD for elf loader to work with it(fix me if I'm wrong). you can reference function elfboot in src/boot/elfboot.c t see what the loader expects. once you make the elf file for legacybios, I think the legacybios loader should be unnecessary. -Aaron

1 0

how about this
by ron minnich 08 May '08

08 May '08

break out ide from cs5536. Next we can look at optionally not even compiling it in. not signed off as it is maybe not what you want. ron

3 4

Re: [coreboot] [PATCH] artecgroup/dbe61: Sync irq_tables with dbe62 code to fix compilation and have a chance of working properly.
by Mart Raudsepp 08 May '08

08 May '08

> Hi, > > On 07.05.2008 23:28, Mart Raudsepp wrote: >> Here's a patch that fixes DBE61 target compilation by making >> irq_tables.h >> take the v3 approach. It might actually work on hardware regarding >> interrupt setup, but we need to get the raminit to work properly to >> see... >> so this is in the name of compilation fix and common sense that as all >> the >> IRQ routing is the same in DBE61 and DBE62, that the routing settings in >> dbe62 code should be fine for dbe61 as well. >> > > Well, if the IRQ routing is the same in DBE61 and DBE62, why do the > tables differ after your patch? They differ in the interrupt router and IRQs devoted fields only, as told in the proposed commit message on top of the attachment together with the reason. And the vendor/device are AMD instead of NSC I believe. The interrupt line routing tuples are the same and it makes it compile and not worse. What does "IRQs devoted exclusively to PCI usage" value affect? Mart Raudsepp

3 2

Will coreboot run on ASRock ALiveNF5-eSATA2+ R3.0?
by Manuel Reimer 08 May '08

08 May '08

Hi, I own the mainboard ASRock ALiveNF5-eSATA2+ R3.0. I would like to test/use coreboot on this board. I have a second PC and a nullmodem cable, I have Linux knowledge and I have a *very* basic knowledge of the C programming language. I don't have a second BIOS chip (would buy one if there is a chance to use the board with coreboot) and I don't have a device for flashing BIOS chips (would be nice if it's possible to replace the chip while the system runs to flash the new chip directly on the mainboard). More information about the board: http://www.asrock.com/mb/overview.asp?Model=ALiveNF5-eSATA2%2B%20R3.0 Thanks in advance Manuel Reimer Long output of superiotool and lspci follows superiotool r3254 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0400, id=0x6388 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0x8863, rev=0xf Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Found Winbond W83627EHF/EF/EHG/EG (id=0x88, rev=0x63) at 0x2e Register dump: idx 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val 88 63 ff 00 04 00 00 ff 50 04 00 00 02 41 00 ff def 88 MM ff 00 MM 00 MM RR 50 04 00 RR 00 21 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 8e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 03 3b def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 00 00 00 00 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 82 def 01 00 60 00 64 01 0c 83 LDN 0x06 (Serial flash interface) idx 30 62 63 val 00 ff ff def 00 00 00 LDN 0x07 (GPIO 1, GPIO 6, game port, MIDI port) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 f7 val 00 02 00 00 00 00 ff ff ff ff ff ff ff 00 def 00 02 01 03 30 09 ff 00 00 00 ff 00 00 00 LDN 0x08 (WDTO#, PLED) idx 30 f5 f6 f7 val 00 ff 00 ff def 00 00 00 00 LDN 0x09 (GPIO 2, GPIO 3, GPIO 4, GPIO 5, SUSLED) idx 30 e0 e1 e2 e3 e4 e5 f0 f1 f2 f3 f4 f5 f6 f7 val 06 ff ff ff ff ff ff fe 3a 00 40 f3 ff 00 00 def 00 ff 00 00 ff 00 00 ff 00 00 00 ff 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 f2 f3 f4 f6 f7 val 00 00 01 00 00 01 00 00 0c 00 09 7c 00 00 00 00 def 00 00 01 00 ff 08 00 RR 00 00 RR 7c 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 f1 val 01 02 90 00 c1 3f def 00 00 00 00 c1 00 Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff 00:00.0 RAM memory [0500]: nVidia Corporation MCP65 Memory Controller [10de:0444] (rev a3) Subsystem: ASRock Incorporation Unknown device [1849:0444] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 800MHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [dc] HyperTransport: MSI Mapping 00: de 10 44 04 06 00 b0 00 a3 00 00 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 44 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 00 00 40: 49 18 44 04 08 dc e0 01 22 00 11 11 d0 00 00 00 50: 23 05 7f 00 03 00 00 00 00 00 03 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 06 15 00 00 70: 44 44 44 00 d0 09 00 00 11 00 00 00 11 11 88 00 80: 12 88 88 00 fa 00 64 0d 03 00 00 00 7f 00 00 00 90: 70 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 80 00 0f 0f 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 01 a8 e0: 00 00 e0 fe 00 00 00 00 00 00 80 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 ISA bridge [0601]: nVidia Corporation MCP65 LPC Bridge [10de:0441] (rev a3) Subsystem: ASRock Incorporation Unknown device [1849:0441] Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 0 Region 0: I/O ports at 2f00 [size=256] 00: de 10 41 04 0f 00 a0 20 a3 00 01 06 00 00 80 00 10: 01 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 41 04 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: 49 18 41 04 00 00 00 00 fa 3e ff 00 fa 3e ff 00 50: fa 3e ff 00 00 5a 62 02 00 00 00 05 1f 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 ff ff c1 80 00 00 00 00 45 19 00 c0 60 40 80: 09 20 00 10 0d 80 00 00 f0 00 00 01 ff 00 00 00 90: ff 7f 00 00 00 00 00 00 21 97 0a 68 ed bc 00 00 a0: 01 00 10 81 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 90 02 0f 03 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:01.1 SMBus [0c05]: nVidia Corporation MCP65 SMBus [10de:0446] (rev a1) Subsystem: ASRock Incorporation Unknown device [1849:0446] Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at ac00 [size=64] Region 4: I/O ports at 2d00 [size=64] Region 5: I/O ports at 2e00 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 46 04 01 00 b0 00 a1 00 05 0c 00 00 80 00 10: 01 ac 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 2d 00 00 01 2e 00 00 00 00 00 00 49 18 46 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 00 00 40: 49 18 46 04 01 00 02 c0 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 20 00 00 01 24 00 00 01 28 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 01 2c 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: d4 30 80 00 01 00 00 00 00 00 00 00 00 00 00 00 d0: 40 00 40 01 10 00 00 00 05 00 00 00 00 00 00 00 e0: 80 10 04 00 04 40 00 07 80 16 02 00 41 44 44 11 f0: 02 ff 1e bf 01 00 00 80 10 00 00 00 00 00 00 00 00:01.2 RAM memory [0500]: nVidia Corporation MCP65 Memory Controller [10de:0445] (rev a1) Subsystem: ASRock Incorporation Unknown device [1849:0446] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00: de 10 45 04 00 04 a0 00 a1 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 46 04 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 49 18 45 04 00 00 00 00 10 02 80 10 10 00 10 10 50: 10 10 10 10 00 00 00 00 00 00 00 00 10 42 00 00 60: 69 0c 21 06 43 98 31 0c c7 0c 63 0c 62 00 00 04 70: 20 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 01 00 00 04 42 00 01 00 90: 00 00 01 18 06 00 00 00 00 00 70 00 20 01 00 00 a0: 00 00 00 00 00 00 00 00 40 0c 50 06 40 18 20 0c b0: 00 98 11 00 00 04 00 00 00 00 00 02 00 04 10 00 c0: 01 84 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:02.0 USB Controller [0c03]: nVidia Corporation MCP65 USB Controller [10de:0454] (rev a3) (prog-if 10 [OHCI]) Subsystem: ASRock Incorporation Unknown device [1849:0454] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 18 Region 0: Memory at f95ff000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 54 04 07 00 b0 00 a3 10 03 0c 00 00 80 00 10: 00 f0 5f f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 54 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 49 18 54 04 01 00 02 fe 00 00 00 00 00 00 00 00 50: 00 00 00 00 1d 47 40 00 10 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:02.1 USB Controller [0c03]: nVidia Corporation MCP65 USB Controller [10de:0455] (rev a3) (prog-if 20 [EHCI]) Subsystem: ASRock Incorporation Unknown device [1849:0455] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 17 Region 0: Memory at f95fec00 (32-bit, non-prefetchable) [size=256] Capabilities: [44] Debug port Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 55 04 06 00 b0 00 a3 20 03 0c 00 00 80 00 10: 00 ec 5f f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 55 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 02 03 01 40: 49 18 55 04 0a 80 98 20 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 01 00 00 60 18 85 03 3c 3f 01 00 00 00 00 70: 00 00 08 05 00 10 20 80 89 3d b6 22 77 25 34 00 80: 01 00 02 fe 00 00 00 00 00 00 00 00 15 16 00 00 90: 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 80 00 00 00 00 00 00 00 00 b0: 00 11 22 33 44 00 00 00 ff 03 00 00 00 00 00 00 c0: 10 10 2d 0d 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:07.0 Audio device [0403]: nVidia Corporation MCP65 High Definition Audio [10de:044a] (rev a1) Subsystem: ASRock Incorporation Unknown device [1849:0888] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (500ns min, 1250ns max) Interrupt: pin B routed to IRQ 19 Region 0: Memory at f95f8000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Masking: 00000000 Pending: 00000000 Capabilities: [6c] HyperTransport: MSI Mapping 00: de 10 4a 04 06 00 b0 00 a1 00 03 04 00 00 80 00 10: 00 80 5f f9 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 88 08 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 02 02 05 40: 49 18 88 08 01 50 02 c0 00 00 00 00 01 01 0f 00 50: 05 6c 80 01 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 02 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 47 00 29 00 00 00 00 00 00 00:08.0 PCI bridge [0604]: nVidia Corporation MCP65 PCI bridge [10de:0449] (rev a1) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=32 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: f9700000-f97fffff Prefetchable memory behind bridge: fff00000-000fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [b8] Subsystem: ASRock Incorporation Unknown device [1849:0449] Capabilities: [8c] HyperTransport: MSI Mapping 00: de 10 49 04 07 00 b0 00 a1 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 20 c0 c0 80 22 20: 70 f9 70 f9 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 00 00 02 02 40: 00 00 73 07 01 00 02 00 07 00 00 00 00 00 48 00 50: 00 00 00 00 00 00 00 00 ff 1f ff 1f 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 0a 00 00 3c 00 80 00 00 00 00 00 08 00 00 a8 90: 00 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 a0: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 ff ff 00 00 0d 8c 00 00 49 18 49 04 c0: 49 18 49 04 07 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:09.0 IDE interface [0101]: nVidia Corporation MCP65 IDE [10de:0448] (rev a1) (prog-if 8a [Master SecP PriP]) Subsystem: ASRock Incorporation Unknown device [1849:0448] Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1] Region 4: I/O ports at ffa0 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 48 04 05 00 b0 00 a1 8a 01 01 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: a1 ff 00 00 00 00 00 00 00 00 00 00 49 18 48 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01 40: 49 18 48 04 01 00 02 00 00 00 00 00 00 00 00 00 50: 02 f0 01 00 00 00 00 00 a8 a8 a8 a8 ff 00 ff ff 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 01 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0a.0 IDE interface [0101]: nVidia Corporation MCP65 SATA Controller [10de:045d] (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: ASRock Incorporation Unknown device [1849:045d] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 16 Region 0: I/O ports at 0e00 [size=8] Region 1: I/O ports at 0e20 [size=4] Region 2: I/O ports at 0e40 [size=8] Region 3: I/O ports at 0e60 [size=4] Region 4: I/O ports at 9800 [size=16] Region 5: Memory at f95fc000 (32-bit, non-prefetchable) [size=8K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] Message Signalled Interrupts: Mask- 64bit+ Queue=0/3 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [cc] HyperTransport: MSI Mapping 00: de 10 5d 04 07 00 b0 00 a3 85 01 01 00 00 80 00 10: 01 0e 00 00 21 0e 00 00 41 0e 00 00 61 0e 00 00 20: 01 98 00 00 00 c0 5f f9 00 00 00 00 49 18 5d 04 30: 00 00 00 00 44 00 00 00 00 00 00 00 0f 01 03 01 40: 49 18 5d 04 01 b0 02 00 00 00 00 00 00 00 00 00 50: 0f 68 38 60 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 60 ac 00 0f 00 0f 06 42 00 00 00 00 70: 2c 78 c4 40 00 00 00 00 07 a0 18 40 20 00 20 78 80: 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 5d 04 01 01 a0: 6e 5a 00 3f 00 00 00 00 00 00 00 00 33 31 00 02 b0: 05 cc 86 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 d0: 00 00 00 00 00 00 00 00 00 00 40 00 00 00 00 00 e0: 00 00 00 00 00 00 3f 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 01 1e 00 00 00 00 00 00:0b.0 PCI bridge [0604]: nVidia Corporation Unknown device [10de:045b] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: f9600000-f96fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Subsystem: ASRock Incorporation Unknown device [1849:045b] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 256 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <64ns, L1 <1us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x2, ASPM L0s L1, Port 3 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 0, PowerLimit 0.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00: de 10 5b 04 07 00 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 b1 b1 00 00 20: 60 f9 60 f9 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00 40: 0d 48 00 00 49 18 5b 04 01 50 02 f8 00 00 00 00 50: 05 60 82 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 01 80 00 00 1f 28 00 00 21 3c 11 03 90: 00 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0c.0 PCI bridge [0604]: nVidia Corporation MCP65 PCI Express bridge [10de:045a] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=04, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: f9800000-f9ffffff Prefetchable memory behind bridge: 00000000ce000000-00000000cfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Subsystem: ASRock Incorporation Unknown device [1849:045a] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 256 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <64ns, L1 <1us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s L1, Port 2 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x2 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 0, PowerLimit 0.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq+ Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00: de 10 5a 04 07 00 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 03 04 00 d1 d1 00 00 20: 80 f9 f0 f9 01 ce f1 cf 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00 40: 0d 48 00 00 49 18 5a 04 01 50 02 f8 00 00 00 00 50: 05 60 82 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 01 80 00 00 1f 28 00 00 11 3c 11 02 90: 00 00 21 10 00 00 00 00 e0 11 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0d.0 PCI bridge [0604]: nVidia Corporation MCP65 PCI Express bridge [10de:0458] (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=05, subordinate=05, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fa000000-febfffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- Capabilities: [40] Subsystem: ASRock Incorporation Unknown device [1849:0458] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 256 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <64ns, L1 <1us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x16, ASPM L0s L1, Port 0 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x16 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 0, PowerLimit 0.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00: de 10 58 04 07 00 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 05 05 00 e1 e1 00 00 20: 00 fa b0 fe 01 d0 f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 1a 00 40: 0d 48 00 00 49 18 58 04 01 50 02 f8 00 00 00 00 50: 05 60 82 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 01 80 00 00 1f 28 00 00 01 3d 11 00 90: 00 00 01 31 00 00 00 00 c0 01 48 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0e.0 PCI bridge [0604]: nVidia Corporation MCP65 PCI Express bridge [10de:0459] (rev a1) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=06, subordinate=06, sec-latency=0 I/O behind bridge: 0000f000-00000fff Memory behind bridge: fff00000-000fffff Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Subsystem: ASRock Incorporation Unknown device [1849:0459] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 256 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <64ns, L1 <1us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s L1, Port 1 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x8 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 0, PowerLimit 0.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00: de 10 59 04 04 00 10 00 a1 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 06 06 00 f1 01 00 00 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00 40: 0d 48 00 00 49 18 59 04 01 50 02 f8 00 00 00 00 50: 05 60 82 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 01 80 00 00 1f 28 00 00 11 3c 11 01 90: 00 00 81 10 00 00 00 00 c0 01 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.0 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 50: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 60: 00 00 01 00 e4 00 00 00 20 c8 2e 0f 0c 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 08 00 01 21 20 00 11 11 22 05 75 80 02 00 00 00 90: 69 01 61 01 00 00 07 00 07 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 00 00 7f 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 03 00 e0 00 80 ff ef 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 03 0a 00 00 00 0b 00 00 03 00 80 00 00 0b fe 00 c0: 13 10 00 00 00 f0 ff 00 00 00 00 00 00 00 00 00 d0: 03 20 00 00 00 20 00 00 00 00 00 00 00 00 00 00 e0: 03 00 00 07 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 00 00 00 01 01 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: e0 3e 78 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 80: 05 00 00 00 00 00 00 00 24 f2 7d 5d 20 13 22 00 90: 10 00 01 00 6b 80 10 74 39 00 00 80 00 00 00 00 a0: eb 02 00 ff 00 00 00 00 00 00 00 00 00 00 00 00 b0: 51 00 a0 fe 96 00 00 00 0e cc 37 98 90 0d 00 00 c0: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 81 15 3e 71 8e 22 21 0d f0 a5 93 11 00 34 1f 52 e0: e0 19 fe 22 0e 43 10 2a f0 42 8e 19 00 58 c3 2a f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010] 00: 22 10 03 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 40: ff 3b 04 00 40 00 10 0a 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 75 c2 f1 60: fd 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 11 01 02 51 22 30 00 50 00 1b 00 08 2e 22 00 00 80: 00 00 07 23 13 21 13 21 00 00 00 00 00 00 00 00 90: 00 00 00 00 51 7c 00 00 a0 ff 1d 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 01 a7 0d 00 00 00 60 04 25 20 20 00 e0: 00 00 00 00 3e 60 3a 00 19 17 00 00 00 00 00 00 f0: 0f 00 10 00 00 00 00 00 00 00 00 00 b2 0f 06 00 01:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 01) Subsystem: ASRock Incorporation Unknown device [1849:8168] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 21 Region 0: I/O ports at b800 [size=256] Region 2: Memory at f96ff000 (64-bit, non-prefetchable) [size=4K] Expansion ROM at f96c0000 [disabled] [size=128K] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Vital Product Data Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [60] Express Endpoint IRQ 0 Device: Supported: MaxPayload 1024 bytes, PhantFunc 0, ExtTag+ Device: Latency L0s <128ns, L1 unlimited Device: AtnBtn+ AtnInd+ PwrInd+ Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported- Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 0 Link: Latency L0s unlimited, L1 unlimited Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 Capabilities: [84] Vendor Specific Information 00: ec 10 68 81 07 01 10 40 01 00 00 02 10 00 00 00 10: 01 b8 00 00 00 00 00 00 04 f0 6f f9 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 68 81 30: 00 00 6c f9 40 00 00 00 00 00 00 00 05 01 00 00 40: 01 48 c2 f7 00 00 00 00 03 50 00 00 00 00 00 00 50: 05 60 82 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 84 01 00 63 7e 00 00 10 28 1a 00 11 f4 03 00 70: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 09 00 4c 01 01 1c 02 00 fb ff ff 11 90: 08 30 00 00 92 11 01 00 ab 60 00 00 cb 00 00 00 a0: 02 28 ff 01 00 00 00 00 00 08 00 00 03 00 03 00 b0: 00 00 00 00 ff 3f ff 3f ff ff 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02:07.0 FireWire (IEEE 1394) [0c00]: VIA Technologies, Inc. IEEE 1394 Host Controller [1106:3044] (rev c0) (prog-if 10 [OHCI]) Subsystem: ASRock Incorporation Unknown device [1849:3044] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (8000ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 20 Region 0: Memory at f97ff800 (32-bit, non-prefetchable) [size=2K] Region 1: I/O ports at cc00 [size=128] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2+ AuxCurrent=0mA PME(D0-,D1-,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: 06 11 44 30 17 01 10 02 c0 10 00 0c 10 20 00 00 10: 00 f8 7f f9 01 cc 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 44 30 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 00 20 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 02 e4 00 00 00 00 00 00 00 00 49 18 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 05:00.0 VGA compatible controller [0300]: nVidia Corporation Unknown device [10de:0402] (rev a1) (prog-if 00 [VGA]) Subsystem: Giga-byte Technology Unknown device [1458:3452] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Interrupt: pin A routed to IRQ 22 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at fa000000 (64-bit, non-prefetchable) [size=32M] Region 5: I/O ports at ec00 [size=128] Expansion ROM at febe0000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [78] Express Endpoint IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag+ Device: Latency L0s <512ns, L1 <4us Device: AtnBtn- AtnInd- PwrInd- Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported- Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x16, ASPM L0s, Port 0 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 128 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x16 00: de 10 02 04 07 01 10 00 a1 00 00 03 00 00 00 00 10: 00 00 00 fd 0c 00 00 d0 00 00 00 00 04 00 00 fa 20: 00 00 00 00 01 ec 00 00 00 00 00 00 58 14 52 34 30: 00 00 be fe 60 00 00 00 00 00 00 00 0a 01 00 00 40: 58 14 52 34 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 02 00 00 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 01 00 e0 84 00 00 80: 10 28 00 00 01 35 01 00 08 00 01 11 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- Ist Ihr Browser Vista-kompatibel? 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2 1

Re: [coreboot] Buildrom
by Marc Karasek 08 May '08

08 May '08

Jordan, I thnk I may have found a possible answer to this issue. In digging further I noticed that the file produced under buildrom is not a real file (it is only 496 bytes). So it is the linking that is the problem. Buildrom uses uClibc 0.9.29 (correct?). I also noticed that you were using -nostdlib option to link with the uClibc libraries. In doing some investigating, it looks like this is no longer supported. Since 0.9.22 uclibc has pulled the toolchain wrapper that made this possible. They now want you to produce a full uclibc toolchain if you want to use uclibc libs. So the questions are: 1) Do we need to add to buildrom so it will produce the toolchain and then compile busybox? 2) Go back to an earlier version of uclibc 0.9.22? 3) Or just use glibc? For reference: What happened to the old toolchain wrapper? It is possible in some limited cases to re-use an existing glibc toolchain and subvert it into building uClibc binaries by using gcc commands such as "-nostdlib" and "-nostdinc". In fact, this used to be the recommended method for compiling programs with uClibc, and we made this easy to do by providing a uClibc toolchain wrapper, which attempted to automagically subvert an existing glibc toolchain. This toolchain wrapper was removed from uClibc 0.9.22, and it will not be coming back. This is because it proved impossible to completely subvert an existing toolchain in many cases, and therefore proved to be a real maintainence burder. As uClibc became more capable, the many problems with re-using an existing glibc toolchain led us to conclude that the only safe and sane way to build uClibc binaries was to use a uClibc toolchain. Some discussion on the reasoning behind this decision can be found here: http://www.uclibc.org/lists/uclibc/2003-October/007315.html in the uClibc mailing list archives. ********************* Marc Karasek MTS Sun Microsystems mailto:marc.karasek@sun.com ph:770.360.6415 ********************* Jordan Crouse wrote: > On 07/05/08 15:27 -0400, Marc Karasek wrote: > >> Jordan, >> >> It gets even wierder.. If I compile BB in the work dir it comes out >> dynamic, if I use buildrom it comes out static... >> > > Hmm - you might be dealing with some strange kconfig issues here. Copy > packages/busybox/conf/defconfig to work/busybox/busybox-1.10.1/.config and > run 'make oldconfig' to make sure your config is up to date. Then check > the resulting .config to make sure that CONFIG_STATIC isn't set. > > Jordan > > >> Jordan Crouse wrote: >> >>> On 07/05/08 12:36 -0400, Marc Karasek wrote: >>> >>> >>>> Jordan, >>>> >>>> I need some help on an error message. >>>> >>>> I am trying to move to busybox 1.10.1 to see if this fixes the SimNOW >>>> problem with linuxrc. (All I did to change it to 1.10.1 was to modify >>>> the busybox.mk file to point to the new tar.bz2 file and removed the >>>> patches. Busybox builds fine but it errors out right after. I also >>>> added a check in scripts/Makefile.lab for the initrd-rootfs dir. It >>>> seems that if the dir is not there, then the cp from the skeleton to this >>>> dir fails. It creates the dir if it is not there, and does nothing if it >>>> is there. >>>> >>>> When it gets to the point after compiling busybox and is creating the >>>> initrd-rootfs. It errors out from the python mklibs.py with >>>> E: Dynamic Linker not found, aborting message. I am not a python >>>> expert, I have looked at the mklibs.py file and tried to see what it was >>>> doing. It looks like it is trying to get a list of execs from the >>>> staging directory. >>>> >>>> >>> mklibs.py strips out all the unused symbols from shared libraries, which >>> is useful for LAB since you can get the benefit of a shared library >>> without >>> carrying around symbols you don't need. >>> >>> The code tries to figure out the link interpreter automatically by >>> running readelf --program-headers on each binary and looking for >>> "Requesting program interpeter". If it doesn't find it, then it >>> freaks out. I am assuming that its not finding it in your case because >>> the newer busybox binary is constructed differently. I would have to >>> look at the binary in more detail to figure out why. In the meantime, >>> you can disable that line in buildrom at the expense of more bytes in >>> your shared libraries. >>> >>> Jordan >>> >>> >>> > >

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