coreboot May 2008

coreboot@coreboot.org

79 participants
387 discussions

Re: [coreboot] r3322 build service
by Joseph Smith 16 May '08

16 May '08

On Thu, 15 May 2008 22:07:00 +0200, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> wrote: > On 15.05.2008 21:22, Joseph Smith wrote: >> Anyone notice buildrom is crapping out on every board??? >> > > Seems the lzma binary on the coreboot build host changed and that kills > compilation. > > Not good! Stephan, Ron?? -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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r3322 build service
by coreboot information 15 May '08

15 May '08

3 2

elite C7VCM?
by Thomas Vilhar 15 May '08

15 May '08

Hi, Im new to the list and I read some about coreboot and im impressed. I would like to make my elite C7VCM VIA CN700 & VT8237R Plus Chipsets C7 CPU Onboard (http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetailPhoto.aspx?DetailID…) boot with first lilo and then later on etherboot. I got the version 1.2 with 12v supply. This board is really cheap under 80 dollar and it is for a kiosk project. Since the orignal bios award bios 6.0 do not work with usbboot (in this fork ofcourse) which I need I hope I can use coreboot So what do I need to do? As I understand the CN700 & VT8237R Plus are supported as well as usbboot with lilo. To add a board as I can see I need to adapt the config.lb in target and add and adapt the board in coreboot*/src/mainboard/. Is it something else I need to change/adapt/add in coreboot? I might get a problem with VT8237R Plus since its VT8237R in the source, whats the difference? The bios chip is a sst49LF040B and I can not hot flash it on this board so I ordered a "enhanced willem pcb5.5c universal programmer". Is there a linux software I can use with this burner? Here are the lspci and lspci-vvvxxx and all help is appreciated ys/ thomas # lspci 00:00.0 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00:00.1 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00:00.2 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00:00.3 Host bridge: VIA Technologies, Inc. PT890 Host Bridge 00:00.4 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00:00.7 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00:01.0 PCI bridge: VIA Technologies, Inc. VT8237 PCI Bridge 00:0d.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 00:0f.0 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 06) 00:10.0 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00:10.1 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00:10.2 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00:10.3 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00:10.4 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 86) 00:11.0 ISA bridge: VIA Technologies, Inc. VT8237 ISA bridge [KT600/K8T800/K8T890 South] 00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT8233/A/8235/8237 AC97 Audio Controller (rev 60) 01:00.0 VGA compatible controller: VIA Technologies, Inc. UniChrome Pro IGP (rev 01) # lspci -vvvxxx 00:00.0 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge Subsystem: Elitegroup Computer Systems Unknown device aa2d Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium>TAbort- SERR- Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: 06 11 14 03 06 00 30 22 00 00 00 06 00 08 80 00 10: 08 00 00 e8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 19 10 2d aa 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: c7 db 10 db 24 00 00 00 00 00 1f c4 00 04 00 01 50: 01 00 02 00 00 00 00 00 08 00 01 80 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 02 50 35 00 0b 02 00 07 00 00 00 00 00 00 00 00 90: 80 01 00 00 20 0f 01 00 00 00 86 0a 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 03 00 00 00 00 00 00 21 d2 00 8c c0: 02 02 80 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium>TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- Reset- FastB2B- Capabilities: [70] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: 06 11 98 b1 07 00 30 02 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 e0 e0 20 e2 20: 00 fb f0 fc 00 f4 f0 f7 00 00 00 00 00 00 00 00 30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 08 00 40: 83 43 62 44 34 72 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 80: 0e 00 35 00 07 02 00 07 00 00 00 00 00 00 00 00 90: 80 00 00 00 00 0f 01 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 80 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0d.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) Subsystem: Elitegroup Computer Systems Unknown device 8139 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium>TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- 00: 06 11 44 33 07 00 30 02 01 00 00 03 00 00 00 00 10: 08 00 00 f4 00 00 00 fb 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 19 10 2d aa 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 02 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 70 22 06 00 00 00 00 00 00 00 00 00 00 00 00 70: 02 00 30 00 0b 1e 00 ff 00 02 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 _________________________________________________________________ News, entertainment and everything you care about at Live.com. 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#96: Make default device and lookup path for grub.cfg configurable
by coreboot 15 May '08

15 May '08

#96: Make default device and lookup path for grub.cfg configurable ---------------------------------+------------------------------------------ Reporter: oxygene | Owner: oxygene Type: enhancement | Status: new Priority: minor | Milestone: Port GRUB2 to coreboot Component: grub2 | Version: v2 Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ By default, cbgrub2 looks for (memdisk)/grub.cfg. other defaults might be sensible, eg. (ata0,1)/boot/grub/grub.cfg. It should be possible to define this at build time, eg. configure flag -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/96> coreboot <http://www.coreboot.org/>

1 1

Geode LX: SDRAM initialization with no DIMMs
by llandre 15 May '08

15 May '08

Hi all, I'm porting coreboot to custom hardware (Geode LX-based). The system is equipped with on-board DDR chips (no DIMMs). Since OLPC platform has similar SDRAM configuration, I was thinking about using the mainboard/olpc/btest/auto.c file as a starting point. However this file includes GX2 stuff #include "northbridge/amd/gx2/raminit.c" so it seems it refers to old version of hardware. Which LX-based platform do you suggest to use as starting point instead? TIA, llandre DAVE Electronics System House - R&D Department web: http://www.dave.eu email: r&d2(a)dave-tech.it

3 2

r195 - buildrom-devel/config/payloads
by svn＠coreboot.org 15 May '08

15 May '08

Author: myles Date: 2008-05-15 18:16:27 +0200 (Thu, 15 May 2008) New Revision: 195 Modified: buildrom-devel/config/payloads/payloads.conf Log: This is a trivial patch to stop the Makefile from including a .mk file for a custom (pre-built ELF) payload. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: buildrom-devel/config/payloads/payloads.conf =================================================================== --- buildrom-devel/config/payloads/payloads.conf 2008-05-13 21:31:20 UTC (rev 194) +++ buildrom-devel/config/payloads/payloads.conf 2008-05-15 16:16:27 UTC (rev 195) @@ -24,7 +24,7 @@ PAYLOAD-$(CONFIG_PAYLOAD_OPENBIOS) = openbios PAYLOAD-$(CONFIG_PAYLOAD_MEMTEST) = memtest PAYLOAD-$(CONFIG_PAYLOAD_KERNEL) = kernel -PAYLOAD-$(CONFIG_PAYLOAD_CUSTOM) = custom +PAYLOAD-$(CONFIG_PAYLOAD_CUSTOM) = PAYLOAD-$(CONFIG_PAYLOAD_COREINFO) = coreinfo PAYLOAD-$(CONFIG_PAYLOAD_TINT) = tint PAYLOAD-$(CONFIG_PAYLOAD_GRUB2) = grub2

1 0

Trac reminder: list of new ticket(s)
by coreboot tracker 15 May '08

15 May '08

1 0

v2[PATCH]RCA RM4100 reboot patch
by Joseph Smith 15 May '08

15 May '08

This patch allows the RCA RM4100 to reboot. Upon rebooting in auto.c it detects if the memory is already initialized, if so it issues a hard reset through the southbridge. It works pretty slick. Signed-off-by: Joseph Smith <joe(a)settoplinux.org> -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

2 6

Re: [coreboot] Flashrom error:iwill board:SST49LF004A/B
by Viswesh S 15 May '08

15 May '08

Hi, Is the SST49lf04 an "A" or "B"? [Viswesh] Actually I have both.When I tried with SST49LF004B, the above error is seen. When I later tried with 4A, it was able to detect it, but the erasing failed as I suppose the Write Lock has been enabled.The read was successful. Is this the flash device that came with the mainboard? [Viswesh] No, These are new ones which we are trying on the iwill board. If not, what flash device did the board come with from the factory? [Viswesh] Need to remove the label and check,not sure right now. Are you running flashrom with the factory BIOS? [Viswesh]No.The board came up with the factory bios and then we removed it and then put our new SST flash and trying out. I'm trying to get some feedback here to see about adding some debug and/or flash enables to flashrom and debug ideas to the flashrom wiki. ----- Original Message ---- From: bari <bari(a)onelabs.com> To: Viswesh S <viswesh_vichu(a)yahoo.com> Cc: coreboot(a)coreboot.org Sent: Thursday, April 10, 2008 5:36:03 AM Subject: Re: [coreboot] Flashrom error:iwill board:SST49LF004A/B Viswesh S wrote: > Hi, > > I am trying to flash Linux bios into my iwill dk8_htx board. > > My bios flash is SST49Lf004A/B. > > I am getting the following error. > > ERROR: %s: W83627HF: *Wrong ID*:0xFF. > > Is the SST 49lf004B supported by flashrom?When I checked the coreboot > site,I could see "?" in the respective column. > > I get the above error when I read or write the bios. > Is the SST49lf04 an "A" or "B"? Is this the flash device that came with the mainboard? If not, what flash device did the board come with from the factory? Are you running flashrom with the factory BIOS? I'm trying to get some feedback here to see about adding some debug and/or flash enables to flashrom and debug ideas to the flashrom wiki. -Bari __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com

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Re: [coreboot] v2[PATCH]RCA RM4100 reboot patch
by Joseph Smith 15 May '08

15 May '08

On Thu, 15 May 2008 12:13:21 +0200, Stefan Reinauer <stepan(a)coresystems.de> wrote: > Joseph Smith wrote: >>>> Well, at first I just tried a cpu reset: >>>> asm volatile ("jmp __cpu_reset"); >>>> >>>> and that seemed to skip memory initialization, but it hangs on trying > to >>>> re-initialize devices that are already initialized. >>>> > Do you remember which devices those were? I'm no sure if it is a particular device or just the act of the process. You can check the bootlog I posted here: http://www.coreboot.org/pipermail/coreboot/2008-May/034814.html >>> I just tried the soft_reset and it does the same thing as asm volatile >>> ("jmp __cpu_reset"); >>> Just resets the cpu and not the pci devices, so for now the hard_reset > is >>> the way to go. >>> >>> >> So, can I get an ACK? >> >> > Acked-by: Stefan Reinauer <stepan(a)coresystems.de> r3322 -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

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coreboot May 2008