coreboot October 2008

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608 discussions

[PATCH] coreboot: Don't loop forever waiting for HDA codecs
by Jordan Crouse 07 Oct '08

07 Oct '08

One of the good things about SimNow is that it does a good job of simulating "bad hardware" and can flush out bad infinite loops, such as the one fixed in this patch. Jordan -- Jordan Crouse Systems Software Development Engineer Advanced Micro Devices, Inc.

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Re: [coreboot] Intel Menlow platform again - is anybody working on this?
by Piotr Kempa 07 Oct '08

07 Oct '08

This is what I would like to do, ideally. However, there are two points to note here: 1. I hear rumors that Intel is generally against coreboot (maybe somebody could prove me wrong here?) because they're betting on their own (U)EFI system, which is more or less 'closed'. Which is why I doubt any Intel guys would really help us. But if you (Intel guys) are out there and reading this and willing to help, please prove me wrong! 2. Because of 1 above, even if we get necessary documentation on chipset and CPU, I fear Intel can legally forbid us from using this documentation to contribute to coreboot (with NDA or something), so we would not be able to use their documents to write open source code. This is a legal problem and I'm far from being a lawyer so this might be much more complicated (or simple) than I'm imagining. Taking both into account if we get docs and a green light from Intel to work on coreboot using those docs, I'll be more than happy on sharing all our developments and if they are working well, maybe they can even be included in the main project trunk, who knows? Piotr Karl-Heinz Nirschl wrote: > hi, > > this would be a very interessting platform! maybe you could put your > ideas on the moblin mailing list - there should be some intel guys > around that may be able to help you. > > would be great to hear about the progress. > > > cheers, > > khn > > > 2008/10/6 Piotr Kempa <piotr.kempa(a)sigarden.com>: >> Hi, >> >> Yes, it has to be Atom, we're too far down that road to turn back. >> We're working on getting docs, but haven't got them yet. If we can't get >> them, reverse engineering is probably out of the question - too much >> effort vs not very good reliability probably. >> >> Piotr >> >> ron minnich wrote: >>> does it have to be an atom? Not a Via or AMD part? >>> >>> can you get docs? >>> >>> ron >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> http://www.coreboot.org/mailman/listinfo/coreboot >>> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot >> >

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r3639 build service
by coreboot information 07 Oct '08

07 Oct '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "uwe" checked in revision 3639 to the coreboot source repository and caused the following changes: Change Log: Support for AM29F002(N)B[BT]. Fully tested on AM29F002NBT. Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3639&device=j7f24&vendor=j… Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3639&device=epia-cn&vendor… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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flashrom: [PATCH] Support for AM29F002(N)B[BT]
by Mats Erik Andersson 07 Oct '08

07 Oct '08

Support for AM29F002(N)B[BT]. Fully tested on AM29F002NBT. Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> --- Index: flashrom/flash.h =================================================================== --- flashrom/flash.h (revision 3624) +++ flashrom/flash.h (arbetskopia) @@ -112,6 +112,8 @@ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define AMD_ID 0x01 /* AMD */ +#define AM_29F002BT 0xB0 +#define AM_29F002BB 0x34 #define AM_29F040B 0xA4 #define AM_29LV040B 0x4F #define AM_29F016D 0xAD Index: flashrom/flashchips.c =================================================================== --- flashrom/flashchips.c (revision 3624) +++ flashrom/flashchips.c (arbetskopia) @@ -32,6 +32,8 @@ /**********************************************************************************************************************************************************************************************************************/ /* Vendor Chip Vendor ID Chip ID TODO TODO Test status Probe function Erase function Write function Read function */ /**********************************************************************************************************************************************************************************************************************/ + {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a}, + {"AMD", "Am29F002(N)BT", AMD_ID, AM_29F002BT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_en29f002a}, {"AMD", "Am29F016D", AMD_ID, AM_29F016D, 2048, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b}, {"AMD", "Am29F040B", AMD_ID, AM_29F040B, 512, 64 * 1024, TEST_OK_PREW, probe_29f040b, erase_29f040b, write_29f040b}, {"AMD", "Am29LV040B", AMD_ID, AM_29LV040B, 512, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b},

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r3639 - trunk/util/flashrom
by svn＠coreboot.org 07 Oct '08

07 Oct '08

Author: uwe Date: 2008-10-07 14:21:12 +0200 (Tue, 07 Oct 2008) New Revision: 3639 Modified: trunk/util/flashrom/flash.h trunk/util/flashrom/flashchips.c Log: Support for AM29F002(N)B[BT]. Fully tested on AM29F002NBT. Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Signed-off-by: Mats Erik Andersson <mats.andersson(a)gisladisker.se> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2008-10-06 21:00:46 UTC (rev 3638) +++ trunk/util/flashrom/flash.h 2008-10-07 12:21:12 UTC (rev 3639) @@ -112,6 +112,8 @@ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define AMD_ID 0x01 /* AMD */ +#define AM_29F002BT 0xB0 +#define AM_29F002BB 0x34 #define AM_29F040B 0xA4 #define AM_29LV040B 0x4F #define AM_29F016D 0xAD Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-10-06 21:00:46 UTC (rev 3638) +++ trunk/util/flashrom/flashchips.c 2008-10-07 12:21:12 UTC (rev 3639) @@ -32,6 +32,8 @@ /**********************************************************************************************************************************************************************************************************************/ /* Vendor Chip Vendor ID Chip ID TODO TODO Test status Probe function Erase function Write function Read function */ /**********************************************************************************************************************************************************************************************************************/ + {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a}, + {"AMD", "Am29F002(N)BT", AMD_ID, AM_29F002BT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_en29f002a}, {"AMD", "Am29F016D", AMD_ID, AM_29F016D, 2048, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b}, {"AMD", "Am29F040B", AMD_ID, AM_29F040B, 512, 64 * 1024, TEST_OK_PREW, probe_29f040b, erase_29f040b, write_29f040b}, {"AMD", "Am29LV040B", AMD_ID, AM_29LV040B, 512, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b}, @@ -40,7 +42,7 @@ {"Atmel", "AT29C040A", ATMEL_ID, AT_29C040A, 512, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, {"Atmel", "AT49F002(N)", ATMEL_ID, AT_49F002N, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, {"Atmel", "AT49F002(N)T", ATMEL_ID, AT_49F002NT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002}, - {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, + {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"AMIC", "A25L40P", AMIC_ID, AMIC_A25L40P, 512, 256, TEST_OK_PREW, probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"AMIC", "A29002B", AMIC_ID_NOPREFIX, AMIC_A29002B, 256, 64 * 1024, TEST_UNTESTED, probe_29f002, erase_29f002, write_29f002}, {"AMIC", "A29002T", AMIC_ID_NOPREFIX, AMIC_A29002T, 256, 64 * 1024, TEST_OK_PREW, probe_29f002, erase_29f002, write_29f002},

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Re: [coreboot] Modular BIOS Interface
by Jackie Pan 07 Oct '08

07 Oct '08

2008/10/7 Joseph Smith <joe(a)settoplinux.org> > > > > On Tue, 7 Oct 2008 11:02:01 +0800, "Jackie Pan" <jackiepan93(a)gmail.com> > wrote: > > 2008/9/18 Joseph Smith <joe(a)settoplinux.org> > > > >> > >> Hello, > >> Has anyone heard of the Modular BIOS Interface (MBI) Specification and > >> where I can find it??? > >> I would like it for some research, and to find out more of what it is > > and > >> does. > >> > > > > Intel's Modular BIOS interface? I think it's still Intel confidential, > you > > should contact your Intel representative. > > Yeh, I found that out. Unfortunatly If I told an Intel rep that I would > like to develop MBI for coreboot, I think they would laugh at me. I think I > need this to get my tv-out chip working. I already had a hell of a time > trying to get Intel's "Bios Modification Program" (BMP Utility) to build a > new vga bios for the i830m. They did not help me at all. Oh, well I will > get there one way or another. > > -- > Thanks, > Joseph Smith > Set-Top-Linux > www.settoplinux.org > > I'll be doing similar work in next few months, my goal is to get displayfrom coreboot-like environment, and I'm not planning to use intel's vbios, my experience tells me vbios is not an absolute necessecity, so the BMP or MBI stuff won't be bothered either. The idea is not verified, but I think it's worth a try.

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Re: [coreboot] r3638 - in trunk/coreboot-v2/src/mainboard: nvidia/l1_2pvv tyan/s2912 tyan/s2912_fam10
by Uwe Hermann 07 Oct '08

07 Oct '08

Hi Myles, On Mon, Oct 06, 2008 at 11:00:46PM +0200, svn(a)coreboot.org wrote: > Whitespace fixes. Thanks for the cleanups! What are you using to fixup the code? Some scripts or do you do it manually? I've noticed that you only fix whitespace issues, and sometimes that's also fixed inconsistently. Please consider basing the cleanups on the standard 'indent' options as per http://www.coreboot.org/Development_Guidelines#Coding_Style. That will also fix many other issues not related to indentation while we're at it. indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch] (will only work for C code, not Config.lb files, of course) But note that you should probably _not_ blindly commit 'indent'ed code, it sometimes gets stuff wrong (which needs some manual fixing), and some of the transformations (while correct) look a lot uglier afterwards -- which I personally also fixup after running indent. HTH, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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Re: [coreboot] r903 - coreboot-v3/mainboard/amd/dbm690t
by Uwe Hermann 07 Oct '08

07 Oct '08

On Tue, Oct 07, 2008 at 01:31:18AM +0200, svn(a)coreboot.org wrote: > +struct device_operations dbm690t = { > + .id = {.type = DEVICE_ID_PCI, > + {.pci = {.vendor = PCI_VENDOR_ID_AMD, > + .device = 1}}}, ^ this doesn't look correct, shouldn't it be a PCI ID? > + .constructor = default_device_constructor, > + .phase3_enable_scan = dbm690t_enable, > +}; Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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patch: allow kscope support for mainboard source code browsing.
by ron minnich 07 Oct '08

07 Oct '08

attached. ron

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r904 - coreboot-v3/southbridge/amd/sb600
by svn＠coreboot.org 07 Oct '08

07 Oct '08

Author: rminnich Date: 2008-10-07 02:29:36 +0200 (Tue, 07 Oct 2008) New Revision: 904 Modified: coreboot-v3/southbridge/amd/sb600/hda.c Log: We shouldn't assume the presence of a working HDA codec, so put in a reasonable timeout of 50usecs (timeout value borrowed from the kernel). This makes SimNow work, since apparently though the codec is present in Simnow, it is non functional. Signed-off-by: Jordan Crouse <jordan.crouse(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: coreboot-v3/southbridge/amd/sb600/hda.c =================================================================== --- coreboot-v3/southbridge/amd/sb600/hda.c 2008-10-06 23:31:18 UTC (rev 903) +++ coreboot-v3/southbridge/amd/sb600/hda.c 2008-10-07 00:29:36 UTC (rev 904) @@ -162,6 +162,32 @@ return sizeof(cim_verb_data) / sizeof(u32); } +static int wait_for_ready(u8 *base) +{ + int timeout = 50; + while(timeout--) { + u32 dword=readl(base + 0x68); + if (!(dword & 1)) + return 0; + udelay(1); + } + + return -1; +} + +static int wait_for_valid(u8 *base) +{ + int timeout = 50; + while(timeout--) { + u32 dword = readl(base + 0x68); + if ((dword & 3) == 2) + return 0; + udelay(1); + } + + return 1; +} + static void codec_init(u8 * base, int addr) { u32 dword; @@ -170,16 +196,14 @@ int i; /* 1 */ - do { - dword = readl(base + 0x68); - } while (dword & 1); + if (wait_for_ready(base) == -1) + return; dword = (addr << 28) | 0x000f0000; writel(dword, base + 0x60); - do { - dword = readl(base + 0x68); - } while ((dword & 3) != 2); + if (wait_for_valid(base) == -1) + return; dword = readl(base + 0x64); @@ -195,15 +219,13 @@ printk(BIOS_DEBUG, "verb_size: %d\n", verb_size); /* 3 */ for (i = 0; i < verb_size; i++) { - do { - dword = readl(base + 0x68); - } while (dword & 1); + if (wait_for_ready(base) == -1) + return; writel(verb[i], base + 0x60); - do { - dword = readl(base + 0x68); - } while ((dword & 3) != 2); + if (wait_for_valid(base) == -1) + return; } printk(BIOS_DEBUG, "verb loaded!\n"); }

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coreboot October 2008