coreboot October 2008

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608 discussions

Re: [coreboot] alix.2c3 stops at mainboard_pre_payload: done
by Roman Yeryomin 10 Oct '08

10 Oct '08

On Friday 10 October 2008 15:47:22 Ward Vandewege wrote: > On Fri, Oct 10, 2008 at 10:04:45AM +0300, Roman Yeryomin wrote: > > On Thu, Oct 9, 2008 at 11:23 PM, Ward Vandewege <ward(a)gnu.org> wrote: > > > On Thu, Oct 09, 2008 at 10:20:29PM +0200, Peter Stuge wrote: > > >> Roman Yeryomin wrote: > > >> > >> what could be the problem? > > >> > > > > >> > > My 1c has the serial port on a superio chip. I recognize this > > >> > > problem from other boards. I also have a 3c3 where I saw this > > >> > > before I fried the 5536 ATA driver. > > >> > > > >> > Sorry didn't understand what you actually mean here... that I have > > >> > fried my hardware? > > >> > > >> Sorry! No not at all! > > >> > > >> The serial port on alix1c is on the Winbond superio chip. The alix2 > > >> and 3 boards do not have this superio chip and their serial port is > > >> connected directly to the 5536 - and this is probably the reason that > > >> serial doesn't work anymore. > > > > > > I don't understand - serial works fine for me on the 2c3. Getting > > > serial to work was in fact the 'hardest' part of doing the 2c3 port > > > based on the .1c code, because of the absense of the winbond superio > > > chip. It required all of changing a few lines of code :) > > > > that image you gave me.. serial works with it for you, right? (I didn't > > check) > > Yes, it does work for me. At 115200n8 of course. Note that the alix ships > with tinybios set to a (much) lower speed. yes, I know, it's 38400, but I use 115200 for your image -- it's hard not to notice this :) > > also what kind of linux distribution you have? does it work with busybox > > also? > > I use voyage linux (http://linux.voyage.hk), which is basically Debian + > some specifics for embedded systems. It specifically supports alix, and it > really easy to install onto a CF card from your pc. hmm... will look at it I suppose it uses busybox too, right? Can you post your `cat /proc/cmdline` and /etc/inittab (if it's set to use one)? Roman

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r249 - buildrom-devel/bin
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: ward Date: 2008-10-10 23:43:25 +0200 (Fri, 10 Oct 2008) New Revision: 249 Modified: buildrom-devel/bin/construct-rom.sh Log: Remove unnecessary bash-ism. This is a trivial patch. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: buildrom-devel/bin/construct-rom.sh =================================================================== --- buildrom-devel/bin/construct-rom.sh 2008-10-10 21:38:45 UTC (rev 248) +++ buildrom-devel/bin/construct-rom.sh 2008-10-10 21:43:25 UTC (rev 249) @@ -3,7 +3,7 @@ DOPAD=0 -if [ "$1" == "-p" ]; then +if [ "$1" = "-p" ]; then DOPAD=1 shift fi

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r248 - buildrom-devel/packages/coreboot-v2
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: ward Date: 2008-10-10 23:38:45 +0200 (Fri, 10 Oct 2008) New Revision: 248 Modified: buildrom-devel/packages/coreboot-v2/coreboot.inc Log: Remove debug code that was accidentally committed in r247. This is a trivial patch. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: buildrom-devel/packages/coreboot-v2/coreboot.inc =================================================================== --- buildrom-devel/packages/coreboot-v2/coreboot.inc 2008-10-10 21:28:58 UTC (rev 247) +++ buildrom-devel/packages/coreboot-v2/coreboot.inc 2008-10-10 21:38:45 UTC (rev 248) @@ -153,7 +153,6 @@ $(OUTPUT_DIR)/$(TARGET_ROM): $(CBV2_COMPONENTS) @ mkdir -p $(OUTPUT_DIR) - @ echo $(BIN_DIR)/construct-rom.sh $(PLATFORM_DOPAD) $(CBV2_COMPONENTS) @ $(BIN_DIR)/construct-rom.sh $(PLATFORM_DOPAD) $(CBV2_COMPONENTS) > $@ generic-coreboot: $(OUTPUT_DIR)/$(TARGET_ROM)

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[PATCH] [buildrom] fix vga for tyan s2881 in lab configuration
by Ward Vandewege 10 Oct '08

10 Oct '08

-- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior Systems Administrator

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r247 - in buildrom-devel: config/platforms packages/coreboot-v2 packages/coreboot-v2/patches
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: ward Date: 2008-10-10 23:28:58 +0200 (Fri, 10 Oct 2008) New Revision: 247 Added: buildrom-devel/packages/coreboot-v2/patches/s2881-lab-vga-fix.patch Modified: buildrom-devel/config/platforms/tyan-s2881.conf buildrom-devel/packages/coreboot-v2/coreboot.inc Log: The Tyan s2881 ships with a 512KB rom chip. For LAB we require an 1MB chip, but the VGA rom address is hardcoded assuming the 512KB chip. This patch a) bumps up the v2 revision to 3646 which actually enables vga on the s2881 b) conditionally patches the v2 tree for a 1MB chip when the s2881 is being built with the LAB config file. Tested on real hardware. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Modified: buildrom-devel/config/platforms/tyan-s2881.conf =================================================================== --- buildrom-devel/config/platforms/tyan-s2881.conf 2008-10-10 19:54:41 UTC (rev 246) +++ buildrom-devel/config/platforms/tyan-s2881.conf 2008-10-10 21:28:58 UTC (rev 247) @@ -30,4 +30,4 @@ COREBOOT_VENDOR=tyan COREBOOT_BOARD=s2881 CBV2_TDIR=s2881 -CBV2_TAG=3131 +CBV2_TAG=3646 Modified: buildrom-devel/packages/coreboot-v2/coreboot.inc =================================================================== --- buildrom-devel/packages/coreboot-v2/coreboot.inc 2008-10-10 19:54:41 UTC (rev 246) +++ buildrom-devel/packages/coreboot-v2/coreboot.inc 2008-10-10 21:28:58 UTC (rev 247) @@ -3,6 +3,9 @@ ifeq ($(CONFIG_USE_LZMA),y) CBV2_CONFIG=Config-lab.lb CBV2_PAYLOAD_FILE_EXT=elf.lzma +ifeq ($(COREBOOT_BOARD),s2881) + CBV2_PATCHES += $(PACKAGE_DIR)/coreboot-v2/patches/s2881-lab-vga-fix.patch +endif else CBV2_CONFIG=Config.lb CBV2_PAYLOAD_FILE_EXT=elf @@ -150,6 +153,7 @@ $(OUTPUT_DIR)/$(TARGET_ROM): $(CBV2_COMPONENTS) @ mkdir -p $(OUTPUT_DIR) + @ echo $(BIN_DIR)/construct-rom.sh $(PLATFORM_DOPAD) $(CBV2_COMPONENTS) @ $(BIN_DIR)/construct-rom.sh $(PLATFORM_DOPAD) $(CBV2_COMPONENTS) > $@ generic-coreboot: $(OUTPUT_DIR)/$(TARGET_ROM) Added: buildrom-devel/packages/coreboot-v2/patches/s2881-lab-vga-fix.patch =================================================================== --- buildrom-devel/packages/coreboot-v2/patches/s2881-lab-vga-fix.patch (rev 0) +++ buildrom-devel/packages/coreboot-v2/patches/s2881-lab-vga-fix.patch 2008-10-10 21:28:58 UTC (rev 247) @@ -0,0 +1,14 @@ +Index: src/mainboard/tyan/s2881/Config.lb +=================================================================== +--- a/src/mainboard/tyan/s2881/Config.lb (revision 3646) ++++ a/src/mainboard/tyan/s2881/Config.lb (working copy) +@@ -231,7 +231,8 @@ + end + chip drivers/pci/onboard + device pci 6.0 on end +- register "rom_address" = "0xfff80000" ++ #register "rom_address" = "0xfff80000" #for 512K ++ register "rom_address" = "0xfff00000" #for 1M + end + end + device pci 1.0 on

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[PATCH] flashrom: add ICH10 support
by Carl-Daniel Hailfinger 10 Oct '08

10 Oct '08

Add ICH10 support to flashrom. The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash interfaces, so this just adds the required PCI IDs. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Index: flashrom-ich10/chipset_enable.c =================================================================== --- flashrom-ich10/chipset_enable.c (Revision 3646) +++ flashrom-ich10/chipset_enable.c (Arbeitskopie) @@ -274,6 +274,7 @@ spibar_offset = 0x3020; break; case 9: + case 10: default: /* Future version might behave the same */ flashbus = BUS_TYPE_ICH9_SPI; spibar_offset = 0x3800; @@ -357,6 +358,11 @@ return enable_flash_ich_dc_spi(dev, name, 9); } +static int enable_flash_ich10(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 10); +} + static int enable_flash_vt823x(struct pci_dev *dev, const char *name) { uint8_t val; @@ -723,6 +729,10 @@ {0x8086, 0x2917, "Intel ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, "Intel ICH9", enable_flash_ich9}, {0x8086, 0x2919, "Intel ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, "Intel ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, "Intel ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, "Intel ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, "Intel ICH10D", enable_flash_ich10}, {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, -- http://www.hailfinger.org/

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r3648 - trunk/util/flashrom
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: hailfinger Date: 2008-10-10 22:54:41 +0200 (Fri, 10 Oct 2008) New Revision: 3648 Modified: trunk/util/flashrom/chipset_enable.c Log: Add ICH10 support to flashrom. The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash interfaces, so this just adds the required PCI IDs. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/chipset_enable.c =================================================================== --- trunk/util/flashrom/chipset_enable.c 2008-10-10 20:43:17 UTC (rev 3647) +++ trunk/util/flashrom/chipset_enable.c 2008-10-10 20:54:41 UTC (rev 3648) @@ -274,6 +274,7 @@ spibar_offset = 0x3020; break; case 9: + case 10: default: /* Future version might behave the same */ flashbus = BUS_TYPE_ICH9_SPI; spibar_offset = 0x3800; @@ -357,6 +358,11 @@ return enable_flash_ich_dc_spi(dev, name, 9); } +static int enable_flash_ich10(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, 10); +} + static int enable_flash_vt823x(struct pci_dev *dev, const char *name) { uint8_t val; @@ -723,6 +729,10 @@ {0x8086, 0x2917, "Intel ICH9M-E", enable_flash_ich9}, {0x8086, 0x2918, "Intel ICH9", enable_flash_ich9}, {0x8086, 0x2919, "Intel ICH9M", enable_flash_ich9}, + {0x8086, 0x3a14, "Intel ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, "Intel ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, "Intel ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, "Intel ICH10D", enable_flash_ich10}, {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x},

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r3647 - trunk/util/flashrom
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: stuge Date: 2008-10-10 22:43:17 +0200 (Fri, 10 Oct 2008) New Revision: 3647 Modified: trunk/util/flashrom/flashrom.c Log: flashrom: Check that a filename was specified also when using force read Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashrom.c =================================================================== --- trunk/util/flashrom/flashrom.c 2008-10-10 18:06:56 UTC (rev 3646) +++ trunk/util/flashrom/flashrom.c 2008-10-10 20:43:17 UTC (rev 3647) @@ -449,6 +449,10 @@ printf("Run flashrom -L to view the hardware supported in this flashrom version.\n"); exit(1); } + if (!filename) { + printf("Error: No filename specified.\n"); + exit(1); + } size = flashes[0]->total_size * 1024; buf = (uint8_t *) calloc(size, sizeof(char));

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r914 - coreboot-v3/superio/fintek/f71805f
by svn＠coreboot.org 10 Oct '08

10 Oct '08

Author: cozzie Date: 2008-10-10 22:37:02 +0200 (Fri, 10 Oct 2008) New Revision: 914 Modified: coreboot-v3/superio/fintek/f71805f/f71805f.h coreboot-v3/superio/fintek/f71805f/superio.c Log: Fix (read: hide) some warning on F71805F until the port gets completed (trivial). Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: coreboot-v3/superio/fintek/f71805f/f71805f.h =================================================================== --- coreboot-v3/superio/fintek/f71805f/f71805f.h 2008-10-09 22:19:53 UTC (rev 913) +++ coreboot-v3/superio/fintek/f71805f/f71805f.h 2008-10-10 20:37:02 UTC (rev 914) @@ -26,6 +26,8 @@ * - Revision: V0.25P */ +void f71805f_enable_serial(u8, u8, u16); + /* Logical Device Numbers (LDN). */ #define F71805F_FDC 0x00 /* Floppy */ #define F71805F_SP1 0x01 /* UART1 */ Modified: coreboot-v3/superio/fintek/f71805f/superio.c =================================================================== --- coreboot-v3/superio/fintek/f71805f/superio.c 2008-10-09 22:19:53 UTC (rev 913) +++ coreboot-v3/superio/fintek/f71805f/superio.c 2008-10-10 20:37:02 UTC (rev 914) @@ -29,7 +29,6 @@ #include <statictree.h> #include "f71805f.h" -static void enable_dev(struct device *dev); void f71805f_pnp_set_resources(struct device *dev); void f71805f_pnp_set_resources(struct device *dev); void f71805f_pnp_enable_resources(struct device *dev); @@ -73,7 +72,7 @@ static void f71805f_init(struct device *dev) { - struct superio_fintek_f71805f_config *conf = dev->device_configuration; + //struct superio_fintek_f71805f_config *conf = dev->device_configuration; struct resource *res0, *res1; if (!dev->enabled)

1 0

r3646 build service
by coreboot information 10 Oct '08

10 Oct '08

Dear coreboot readers! This is the automated build check service of coreboot. The developer "ward" checked in revision 3646 to the coreboot source repository and caused the following changes: Change Log: Enable vga bios by default on Tyan s2881. The board has an onboard ati rage XL. This is a trivial patch. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Build Log: Compilation of eaglelion:5bcm has been fixed Compilation of jetway:j7f24 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3646&device=j7f24&vendor=j… Compilation of tyan:s4882 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3646&device=s4882&vendor=t… Compilation of via:epia-cn is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3646&device=epia-cn&vendor… If something broke during this checkin please be a pain in ward's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot October 2008