coreboot October 2008

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608 discussions

AMD RS690 / SB600 candidate boards with socketed ROM
by Tiago Marques 13 Oct '08

13 Oct '08

I really like the Gigabyte GA-MA770-DS3, at least hardware wise, all works well in linux. Well, aside from the IEEE1394 port, I haven't tried that. http://www.gigabyte.com.tw/Products/Motherboard/Products_Spec.aspx?ClassVal… It also has internal headers for serial and parallel port. BIOS chips are SPI but rev 2.0 comes with two chips, which is very nice for development, right? As for the chipset, it's mainly an evolution from what the 690 is, without the graphics and with HyperTransport 3.0 support. But that Marc or Jordan can tell you better. This is, IMHO, a great chipset to work with since it's widespread and, if ported, would allow an easy(or easier) port for the 790FX, 790GX and 780G, which will be Phenom's palls till the middle of next year (if I'm not mistaken) when they will be replaced by the RS880. Best regards, Tiago Marques On Tue, Oct 7, 2008 at 7:14 PM, bari <bari(a)onelabs.com> wrote: > Jimmy.Jazz(a)gmx.net wrote: > >> If I remember well Abit AX78 has a socketed flash. It is an atx AM2+ >> motherboard with an AMD 770 chipset on board and could be a good >> candidate... >> >> >> > The problem is that this board uses the AMD 770 vs the 690 chipset. The 690 > is currently supported, the 770 is not. > > -Bari > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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[PATCH] v3: VIA C7 CAR
by Carl-Daniel Hailfinger 13 Oct '08

13 Oct '08

Add support for Cache-as-RAM on VIA C7 processors in v3. Finally. Thanks to Jason Zhao we got a skeleton CAR code for VIA C7 based on older v2 code. I cleaned it up, modified the v3 stage0 code in lots of places as preparation for this and believe this is mostly merge-ready. Thanks to Bari Ari for getting the code to me for rewrite/review. Thanks to Corey Osgood who kept me going with helpful early tests and motivation. Thanks to everybody who reviewed my code. CONFIG_CARTEST shall not be enabled (breaks the build). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Jason Zhao <jasonzhao(a)viatech.com.cn> The v2 version was Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Index: corebootv3-via_car/arch/x86/via/stage0.S =================================================================== --- corebootv3-via_car/arch/x86/via/stage0.S (Revision 0) +++ corebootv3-via_car/arch/x86/via/stage0.S (Revision 0) @@ -0,0 +1,207 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich(a)gmail.com> + * Copyright (C) 2005 Eswar Nallusamy, LANL + * Copyright (C) 2005 Tyan + * (Written by Yinghai Lu <yhlu(a)tyan.com> for Tyan) + * Copyright (C) 2007 coresystems GmbH + * (Written by Stefan Reinauer <stepan(a)coresystems.de> for coresystems GmbH) + * Copyright (C) 2007,2008 Carl-Daniel Hailfinger + * Copyright (C) 2008 VIA Technologies, Inc. + * (Written by Jason Zhao <jasonzhao(a)viatech.com.cn> for VIA) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Init code - Switch CPU to protected mode and enable Cache-as-Ram (CAR). */ + +#include <macros.h> + +#define ROM_CODE_SEG 0x08 +#define ROM_DATA_SEG 0x10 + +#define CACHE_RAM_CODE_SEG 0x18 +#define CACHE_RAM_DATA_SEG 0x20 + + .align 4 + .globl protected_stage0 +protected_stage0: + /* This code was used by v2. TODO. */ + lgdt %cs:gdtptr + ljmp $ROM_CODE_SEG, $__protected_stage0 + +.globl __protected_stage0 +__protected_stage0: + /* Save the BIST result. */ + movl %eax, %ebp + + port80_post(0x01) + + movw $ROM_DATA_SEG, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + + /* Restore the BIST value to %eax. */ + movl %ebp, %eax + +.align 4 + +#define CacheSize CONFIG_CARSIZE +#define CacheBase CONFIG_CARBASE + +#define ASSEMBLY +#include <mtrr.h> + + /* Save the BIST result */ + movl %eax, %ebp + +CacheAsRam: + + /* disable cache */ + movl %cr0, %eax + orl $(0x1<<30),%eax + movl %eax,%cr0 + invd + + /* Set the default memory type and enable fixed and variable MTRRs */ + movl $MTRRdefType_MSR, %ecx + xorl %edx, %edx + /* Enable Variable and Fixed MTRRs */ + movl $0x00000c00, %eax + wrmsr + + /* Clear all MTRRs */ + xorl %edx, %edx + movl $fixed_mtrr_msr, %esi + +clear_fixed_var_mtrr: + lodsl (%esi), %eax + testl %eax, %eax + jz clear_fixed_var_mtrr_out + + movl %eax, %ecx + xorl %eax, %eax + wrmsr + + jmp clear_fixed_var_mtrr +clear_fixed_var_mtrr_out: + /* MTRRPhysBase */ + movl $0x200, %ecx + xorl %edx, %edx + movl $(CacheBase|MTRR_TYPE_WRBACK),%eax + wrmsr + + /* MTRRPhysMask */ + movl $0x201, %ecx + /* This assumes we never access addresses above 2^36 in CAR. */ + movl $0x0000000f,%edx + movl $(~(CacheSize-1)|0x800),%eax + wrmsr + +#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) + /* enable write base caching so we can do execute in place + * on the flash rom. + */ + /* MTRRPhysBase */ + movl $0x202, %ecx + xorl %edx, %edx + movl $(XIP_ROM_BASE|MTRR_TYPE_WRBACK),%eax + wrmsr + + /* MTRRPhysMask */ + movl $0x203, %ecx + movl $0x0000000f,%edx + movl $(~(XIP_ROM_SIZE - 1) | 0x800), %eax + wrmsr +#endif /* XIP_ROM_SIZE && XIP_ROM_BASE */ + + movl $MTRRdefType_MSR, %ecx + xorl %edx, %edx + /* Enable Variable and Fixed MTRRs */ + movl $0x00000800, %eax + wrmsr + + /* enable cache */ + movl %cr0, %eax + andl $0x9fffffff,%eax + movl %eax, %cr0 + + /* Read the range with lodsl */ + movl $CacheBase, %esi + cld + movl $(CacheSize >> 2), %ecx + rep lodsl + + /* Clear the range */ + movl $CacheBase, %edi + movl $(CacheSize >> 2), %ecx + xorl %eax, %eax + rep stosl + +#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) + /* Read the XIP area */ + movl XIP_ROM_BASE, %esi + movl $(XIP_ROM_SIZE>>2), %ecx + rep lodsl +#endif /* XIP_ROM_SIZE && XIP_ROM_BASE */ + + /* The key point of this CAR code is C7 cache does not turn into + * "no fill" mode, which is not compatible with general CAR code. + */ + + /* set up the stack pointer */ + movl $(CacheBase + CacheSize - 4), %eax + movl %eax, %esp + + /* Load a different set of data segments */ + movw $CACHE_RAM_DATA_SEG, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + +lout: + /* Store zero for the pointer to the global variables. */ + pushl $0 + + /* Restore the BIST result. */ + movl %ebp, %eax + + /* We need to set ebp? No need. */ + movl %esp, %ebp + + /* Second parameter: init_detected */ + /* Store zero for the unused init_detected parameter. */ + pushl $0 + /* First parameter: bist */ + pushl %eax + call stage1_main + /* We will not go back. */ + +fixed_mtrr_msr: + .long 0x250, 0x258, 0x259 + .long 0x268, 0x269, 0x26A + .long 0x26B, 0x26C, 0x26D + .long 0x26E, 0x26F +var_mtrr_msr: + .long 0x200, 0x201, 0x202, 0x203 + .long 0x204, 0x205, 0x206, 0x207 + .long 0x208, 0x209, 0x20A, 0x20B + .long 0x20C, 0x20D, 0x20E, 0x20F + .long 0x000 /* NULL, end of table */ + +#include "../stage0_common.S" Index: corebootv3-via_car/arch/x86/Kconfig =================================================================== --- corebootv3-via_car/arch/x86/Kconfig (Revision 913) +++ corebootv3-via_car/arch/x86/Kconfig (Arbeitskopie) @@ -56,6 +56,15 @@ arch/x86/Makefile for more hints on possible values. It is usually set in mainboard/*/Kconfig. +config CPU_VIA_C7 + boolean + help + CPU type. At the moment this option selects the reset vector and + Cache-as-RAM (CAR) implementation for a mainboard. See + arch/x86/Makefile for more hints on possible values. + It is usually set in mainboard/*/Kconfig. + + config CONFIG_HPET boolean depends CPU_AMD_K8 @@ -159,6 +168,7 @@ default 0x8f000 if CPU_I586 default 0x80000 if CPU_AMD_GEODELX default 0xc8000 if CPU_AMD_K8 + default 0xffef0000 if CPU_VIA_C7 help This option sets the base address of the area used for CAR. @@ -167,6 +177,7 @@ default 0x1000 if CPU_I586 default 0x8000 if CPU_AMD_GEODELX default 0x8000 if CPU_AMD_K8 + default 0x8000 if CPU_VIA_C7 help This option sets the size of the area used for CAR. @@ -175,6 +186,7 @@ default 0x1000 if CPU_I586 default 0x1000 if CPU_AMD_GEODELX default 0x2000 if CPU_AMD_K8 + default 0x1000 if CPU_VIA_C7 help This option sets the top of the memory area, in KiB, used for coreboot. Index: corebootv3-via_car/arch/x86/Makefile =================================================================== --- corebootv3-via_car/arch/x86/Makefile (Revision 913) +++ corebootv3-via_car/arch/x86/Makefile (Arbeitskopie) @@ -122,9 +122,13 @@ ifeq ($(CONFIG_CPU_AMD_K8),y) STAGE0_CAR_OBJ = amd/stage0.o STAGE0_ARCH_X86_SRC += amd/k8/stage1.c +else +ifeq ($(CONFIG_CPU_VIA_C7),y) + STAGE0_CAR_OBJ = via/stage0.o endif endif endif +endif ifeq ($(CONFIG_PAYLOAD_NO_PREPARSE_ELF), y) PARSEELF = -- http://www.hailfinger.org/

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[PATCH] v2: Drop unused reset.c files
by Uwe Hermann 13 Oct '08

13 Oct '08

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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r3654 - in trunk/coreboot-v2/src/mainboard: agami/aruma amd/rumba arima/hdama artecgroup/dbe61 digitallogic/adl855pc digitallogic/msm586seg digitallogic/msm800sev eaglelion/5bcm ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x lippert/frontrunner newisys/khepri olpc/btest olpc/rev_a technologic/ts5300 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s4880 tyan/s4882
by svn＠coreboot.org 13 Oct '08

13 Oct '08

Author: uwe Date: 2008-10-13 15:08:38 +0200 (Mon, 13 Oct 2008) New Revision: 3654 Removed: trunk/coreboot-v2/src/mainboard/agami/aruma/reset.c trunk/coreboot-v2/src/mainboard/amd/rumba/reset.c trunk/coreboot-v2/src/mainboard/arima/hdama/reset.c trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/reset.c trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/reset.c trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/reset.c trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/reset.c trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/reset.c trunk/coreboot-v2/src/mainboard/ibm/e325/reset.c trunk/coreboot-v2/src/mainboard/ibm/e326/reset.c trunk/coreboot-v2/src/mainboard/iwill/dk8s2/reset.c trunk/coreboot-v2/src/mainboard/iwill/dk8x/reset.c trunk/coreboot-v2/src/mainboard/lippert/frontrunner/reset.c trunk/coreboot-v2/src/mainboard/newisys/khepri/reset.c trunk/coreboot-v2/src/mainboard/olpc/btest/reset.c trunk/coreboot-v2/src/mainboard/olpc/rev_a/reset.c trunk/coreboot-v2/src/mainboard/technologic/ts5300/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2850/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2875/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2880/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2881/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2882/reset.c trunk/coreboot-v2/src/mainboard/tyan/s2885/reset.c trunk/coreboot-v2/src/mainboard/tyan/s4880/reset.c trunk/coreboot-v2/src/mainboard/tyan/s4882/reset.c Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb Log: Drop unused (or commented / #if 0) reset.c files. This is abuild-tested by me. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Peter Stuge <peter(a)stuge.se> Deleted: trunk/coreboot-v2/src/mainboard/agami/aruma/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/agami/aruma/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/agami/aruma/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 1); -} Deleted: trunk/coreboot-v2/src/mainboard/amd/rumba/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/arima/hdama/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/arima/hdama/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/arima/hdama/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - // pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Config.lb 2008-10-13 13:08:38 UTC (rev 3654) @@ -46,7 +46,7 @@ driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o +# object reset.o ## ## Romcc output Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/Options.lb 2008-10-13 13:08:38 UTC (rev 3654) @@ -72,7 +72,7 @@ ## ## Build code to reset the motherboard from coreboot ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## Build code to export a programmable irq routing table Deleted: trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm586seg/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,41 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} -#endif -void hard_reset(void) -{ - //set_bios_reset(); - // pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} - Deleted: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/ibm/e325/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e325/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/ibm/e325/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 1); -} Deleted: trunk/coreboot-v2/src/mainboard/ibm/e326/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/ibm/e326/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/ibm/e326/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 1); -} Deleted: trunk/coreboot-v2/src/mainboard/iwill/dk8s2/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8s2/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8s2/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/iwill/dk8x/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/iwill/dk8x/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/iwill/dk8x/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/newisys/khepri/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/newisys/khepri/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/newisys/khepri/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 2); -} Deleted: trunk/coreboot-v2/src/mainboard/olpc/btest/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/olpc/rev_a/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/Config.lb 2008-10-13 13:08:38 UTC (rev 3654) @@ -46,7 +46,7 @@ driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end -object reset.o +# object reset.o ## ## Romcc output Modified: trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/Options.lb 2008-10-13 13:08:38 UTC (rev 3654) @@ -88,7 +88,7 @@ ## ## Build code to reset the motherboard from coreboot ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## Build code to export a programmable irq routing table Deleted: trunk/coreboot-v2/src/mainboard/technologic/ts5300/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/technologic/ts5300/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/technologic/ts5300/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,41 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} -#endif -void hard_reset(void) -{ - //set_bios_reset(); - //pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} - Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2850/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2850/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2850/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2875/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2875/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2875/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2880/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2880/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2880/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2881/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2881/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2881/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 2); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2882/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2882/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2882/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 0); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s2885/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s2885/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s2885/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 2); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s4880/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4880/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s4880/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 2); -} Deleted: trunk/coreboot-v2/src/mainboard/tyan/s4882/reset.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s4882/reset.c 2008-10-12 22:34:08 UTC (rev 3653) +++ trunk/coreboot-v2/src/mainboard/tyan/s4882/reset.c 2008-10-13 13:08:38 UTC (rev 3654) @@ -1,6 +0,0 @@ -#include "../../../southbridge/amd/amd8111/amd8111_reset.c" - -void hard_reset(void) -{ - amd8111_hard_reset(0, 1); -}

1 0

[PATCH] superiotool: fix wrong IT8718F keyboard value
by Josh 13 Oct '08

13 Oct '08

According to IT8718F_V0 3_(for C version).pdf, it looks like 0xf0 should be 0x08. Signed-off-by: Josh Profitt <zorn169(a)gmail.com>

4 6

Re: [coreboot] alix.2c3 stops at mainboard_pre_payload: done
by Roman Yeryomin 13 Oct '08

13 Oct '08

On Monday 13 October 2008 03:01:35 Peter Stuge wrote: > Hi Roman, > > Roman Yeryomin wrote: > > >>> on system with native bios (tinybios): > > >>> cat /proc/tty/driver/serial > > >>> serinfo:1.0 driver revision: > > >>> 0: uart:16550A port:000003F8 irq:4 tx:945 rx:15 RTS|CTS|DTR|DSR|CD > > >>> 1: uart:16550A port:000002F8 irq:3 tx:0 rx:0 CTS|DSR|CD > > >>> > > >>> but on system with coreboot: > > >>> cat /proc/tty/driver/serial > > >>> serinfo:1.0 driver revision: > > >>> 0: uart:NS16550A port:000003F8 irq:4 tx:0 rx:0 RTS|DTR > > >>> 1: uart:unknown port:000002F8 irq:3 > > Did I overlook this message on the the list? If it wasn't sent to the > list, please keep in mind that it's nicer both for you and for others > after you to keep discussion on the list, for you because you may get > quicker replies and for others because the solutions are archived. I understand... didn't look at the TO: address when sending email > What I find most interesting about the output above is how uart 1 is > identified differently when starting with coreboot. It would be good > to find out why. yes, that's the main question I think > > >> OK, this is kind of the problem I remember. If you have time go into > > >> the kernel, IIRC, there is a test for some modem signal and the device > > >> is not available otherwise. I am sorry to be so fuzzy but this was > > >> seven years ago. It was a weird problem. > > > > > > you think this is kernel problem? > > I don't think serial control signals is the source of your problems. > Even if they are, the problem is not in the kernel but in the > application. Unless your kernel has a bad bug in the UART layer it > will not withhold data based on control signals. > > It is much more likely that the hardware is not configured correctly. agree > > >> It seems whatever you have on that port is not asserting DTR, > > >> which is also odd. > > Please comment on this. What do you have connected to the serial > port? I'm trying to get serial console on it -- I connect to alix from my desktop with null modem cable > Does DTR on the Geode go high when your terminal software is > running? m? > > > I've asked Pascal Dornier (pcengines) how he sets up uart in his > > > bios but didn't receive an answer yet. > > Please don't ever bother Pascal Dornier with coreboot issues. That is > what this mailing list and the #coreboot IRC channel is meant for. I just asked how he sets up uart in his tinyBIOS, that's it. I think this is normal question to hw manufacturer. > > > I still think the problem is in coreboot (or libpayload)... > > > > Pascal answered me: > > > > After init -> changes to Linux driver, or does it still use Int 10 > > + Int 16 ? > > My BIOS does a redirect of these BIOS interrupts to the serial > > console. > > You can safely assume that no Linux kernel driver requires real mode > interrupts. This is an almost universal truth. > > In particular: no, the Linux serial driver does not use BIOS > interrupt services. maybe coreboot could try to use similar behavior? just to see what it gives? Roman

1 0

it8712f com1
by ron minnich 12 Oct '08

12 Oct '08

there is an it8712f com1 on this board I have. superiotool says this: LDN 0x01 (COM1) idx 30 60 61 70 f0 f1 f2 f3 val 01 03 f8 04 00 50 00 7f def 00 03 f8 04 00 50 00 7f linux says this: serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A setserial says this: sudo setserial /dev/ttyS0 [sudo] password for rminnich: /dev/ttyS0, UART: 16550A, Port: 0x03f8, IRQ: 4 minicom is happy. I just can't talk to it. I figure I ought to be able to short pins 2,3 and at least get loopback. No good. Connection is to a 10 pin header on the board. I've got nice clips shorting things together on that header and ... no good. My mental toolbox is running empty. Any ideas? Is this chip so benighted that it actually demands modem control signals (null modem is somewhere else but I guess I can start twisting wires together). Anybody got a handy dandy 'short wires logically' program lying around? I am running out of time .... ron

2 3

[PATCH] v2: Drop useless/duplicated debug.c files.
by Uwe Hermann 12 Oct '08

12 Oct '08

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 2

r3653 - in trunk/coreboot-v2/src: lib mainboard/a-trend/atc-6220 mainboard/a-trend/atc-6240 mainboard/abit/be6-ii_v2_0 mainboard/amd/rumba mainboard/artecgroup/dbe61 mainboard/asus/mew-am mainboard/asus/mew-vm mainboard/asus/p2b mainboard/asus/p2b-f mainboard/asus/p3b-f mainboard/azza/pt-6ibd mainboard/biostar/m6tba mainboard/compaq/deskpro_en_sff_p600 mainboard/digitallogic/adl855pc mainboard/digitallogic/msm800sev mainboard/eaglelion/5bcm mainboard/emulation/qemu-x86 mainboard/gigabyte/ga-6bxc
by svn＠coreboot.org 12 Oct '08

12 Oct '08

Author: uwe Date: 2008-10-13 00:34:08 +0200 (Mon, 13 Oct 2008) New Revision: 3653 Added: trunk/coreboot-v2/src/lib/debug.c Removed: trunk/coreboot-v2/src/mainboard/amd/rumba/debug.c trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/debug.c trunk/coreboot-v2/src/mainboard/asus/mew-vm/debug.c trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/debug.c trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/debug.c trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/debug.c trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/debug.c trunk/coreboot-v2/src/mainboard/lippert/frontrunner/debug.c trunk/coreboot-v2/src/mainboard/olpc/btest/debug.c trunk/coreboot-v2/src/mainboard/olpc/rev_a/debug.c trunk/coreboot-v2/src/mainboard/via/epia-m/debug.c trunk/coreboot-v2/src/mainboard/via/epia/debug.c trunk/coreboot-v2/src/northbridge/intel/i82830/debug.c Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/auto.c trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/auto.c trunk/coreboot-v2/src/mainboard/asus/mew-am/auto.c trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/auto.c trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c trunk/coreboot-v2/src/mainboard/msi/ms6119/auto.c trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c trunk/coreboot-v2/src/mainboard/via/epia/auto.c trunk/coreboot-v2/src/northbridge/intel/i82830/raminit.c Log: Drop tons of duplicated debug.c files, move common file to lib/debug.c and use that one. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Peter Stuge <peter(a)stuge.se> Copied: trunk/coreboot-v2/src/lib/debug.c (from rev 3651, trunk/coreboot-v2/src/mainboard/asus/mew-vm/debug.c) =================================================================== --- trunk/coreboot-v2/src/lib/debug.c (rev 0) +++ trunk/coreboot-v2/src/lib/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -0,0 +1,66 @@ + +static void print_debug_pci_dev(unsigned dev) +{ + print_debug("PCI: "); + print_debug_hex8((dev >> 16) & 0xff); + print_debug_char(':'); + print_debug_hex8((dev >> 11) & 0x1f); + print_debug_char('.'); + print_debug_hex8((dev >> 8) & 7); +} + +static void print_pci_devices(void) +{ + device_t dev; + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); + dev += PCI_DEV(0,0,1)) { + uint32_t id; + id = pci_read_config32(dev, PCI_VENDOR_ID); + if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { + continue; + } + print_debug_pci_dev(dev); + print_debug("\r\n"); + } +} + +static void dump_pci_device(unsigned dev) +{ + int i; + print_debug_pci_dev(dev); + print_debug("\r\n"); + + for(i = 0; i <= 255; i++) { + unsigned char val; + if ((i & 0x0f) == 0) { + print_debug_hex8(i); + print_debug_char(':'); + } + val = pci_read_config8(dev, i); + print_debug_char(' '); + print_debug_hex8(val); + if ((i & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } +} + +static void dump_pci_devices(void) +{ + device_t dev; + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); + dev += PCI_DEV(0,0,1)) { + uint32_t id; + id = pci_read_config32(dev, PCI_VENDOR_ID); + if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { + continue; + } + dump_pci_device(dev); + } +} Property changes on: trunk/coreboot-v2/src/lib/debug.c ___________________________________________________________________ Added: svn:mergeinfo + Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6220/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/a-trend/atc-6240/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/abit/be6-ii_v2_0/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Deleted: trunk/coreboot-v2/src/mainboard/amd/rumba/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/amd/rumba/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/amd/rumba/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Deleted: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/asus/mew-am/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-am/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/mew-am/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82801xx/i82801xx_early_smbus.c" #include "northbridge/intel/i82810/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -47,7 +47,7 @@ outb(i&0xff, 0x80); } -#include "debug.c" +#include "lib/debug.c" #include "lib/delay.c" #include "northbridge/intel/i82810/raminit.c" Deleted: trunk/coreboot-v2/src/mainboard/asus/mew-vm/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/mew-vm/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/mew-vm/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/p2b/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/p2b-f/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/asus/p3b-f/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/azza/pt-6ibd/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/biostar/m6tba/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/compaq/deskpro_en_sff_p600/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Deleted: trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/digitallogic/adl855pc/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,128 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\r\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - } -} -#endif Deleted: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -17,7 +17,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) -//#include "debug.c" //#include "lib/delay.c" #include "northbridge/amd/gx1/raminit.c" Deleted: trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/eaglelion/5bcm/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -23,7 +23,6 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" -#include "debug.c" static void main(void) { Deleted: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,128 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\r\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - } -} -#endif Modified: trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/gigabyte/ga-6bxc/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Deleted: trunk/coreboot-v2/src/mainboard/lippert/frontrunner/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/lippert/frontrunner/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/lippert/frontrunner/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/msi/ms6119/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/msi/ms6119/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/msi/ms6119/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Deleted: trunk/coreboot-v2/src/mainboard/olpc/btest/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/btest/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/olpc/btest/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Deleted: trunk/coreboot-v2/src/mainboard/olpc/rev_a/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/olpc/rev_a/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/olpc/rev_a/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/tyan/s1846/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -32,7 +32,7 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c" #include "northbridge/intel/i440bx/raminit.h" -#include "mainboard/asus/mew-vm/debug.c" /* FIXME */ +#include "lib/debug.c" #include "pc80/udelay_io.c" #include "lib/delay.c" #include "cpu/x86/mtrr/earlymtrr.c" Modified: trunk/coreboot-v2/src/mainboard/via/epia/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/via/epia/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -25,7 +25,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" -#include "debug.c" +#include "lib/debug.c" #include "southbridge/via/vt8231/vt8231_early_smbus.c" #include "southbridge/via/vt8231/vt8231_early_serial.c" Deleted: trunk/coreboot-v2/src/mainboard/via/epia/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/via/epia/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,128 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\r\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - } -} -#endif Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/auto.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -29,7 +29,7 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" -#include "debug.c" +#include "lib/debug.c" #include "southbridge/via/vt8235/vt8235_early_smbus.c" Deleted: trunk/coreboot-v2/src/mainboard/via/epia-m/debug.c =================================================================== --- trunk/coreboot-v2/src/mainboard/via/epia-m/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/mainboard/via/epia-m/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,128 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\r\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - } -} -#endif Deleted: trunk/coreboot-v2/src/northbridge/intel/i82830/debug.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i82830/debug.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/northbridge/intel/i82830/debug.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -1,66 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} Modified: trunk/coreboot-v2/src/northbridge/intel/i82830/raminit.c =================================================================== --- trunk/coreboot-v2/src/northbridge/intel/i82830/raminit.c 2008-10-12 20:35:58 UTC (rev 3652) +++ trunk/coreboot-v2/src/northbridge/intel/i82830/raminit.c 2008-10-12 22:34:08 UTC (rev 3653) @@ -22,7 +22,7 @@ #include <spd.h> #include <sdram_mode.h> #include <delay.h> -#include "debug.c" +#include "lib/debug.c" #include "i82830.h" /*-----------------------------------------------------------------------------

1 0

r3652 - trunk/coreboot-v2/src/southbridge/via/vt8237r
by svn＠coreboot.org 12 Oct '08

12 Oct '08

Author: cozzie Date: 2008-10-12 22:35:58 +0200 (Sun, 12 Oct 2008) New Revision: 3652 Modified: trunk/coreboot-v2/src/southbridge/via/vt8237r/vt8237r_lpc.c Log: Remove an extra bracket left by the vt8237r cleanup patch (trivial) Signed-off-by: Corey Osgood <corey.osgood(a)gmail.com> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/coreboot-v2/src/southbridge/via/vt8237r/vt8237r_lpc.c =================================================================== --- trunk/coreboot-v2/src/southbridge/via/vt8237r/vt8237r_lpc.c 2008-10-12 14:40:23 UTC (rev 3651) +++ trunk/coreboot-v2/src/southbridge/via/vt8237r/vt8237r_lpc.c 2008-10-12 20:35:58 UTC (rev 3652) @@ -55,7 +55,7 @@ /* IO-APIC virtual wire mode configuration. */ /* mask, trigger, polarity, destination, delivery, vector */ {0, ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | - ExtINT, NONE}, { + ExtINT, NONE}, {1, DISABLED, NONE}, {2, DISABLED, NONE}, {3, DISABLED, NONE},

1 0

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coreboot October 2008