coreboot October 2008

coreboot@coreboot.org

84 participants
608 discussions

r3694 - trunk/util/flashrom
by svn＠coreboot.org 26 Oct '08

26 Oct '08

Author: uwe Date: 2008-10-26 19:40:42 +0100 (Sun, 26 Oct 2008) New Revision: 3694 Modified: trunk/util/flashrom/chipset_enable.c Log: Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges. Tested on PIIX3 hardware. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood(a)gmail.com> Modified: trunk/util/flashrom/chipset_enable.c =================================================================== --- trunk/util/flashrom/chipset_enable.c 2008-10-25 18:03:50 UTC (rev 3693) +++ trunk/util/flashrom/chipset_enable.c 2008-10-26 18:40:42 UTC (rev 3694) @@ -125,6 +125,7 @@ /* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to * FFF00000-FFF7FFFF are forwarded to ISA). + * Note: This bit is reserved on PIIX/PIIX3. * Set bit 7: Extended BIOS Enable (PCI master accesses to * FFF80000-FFFDFFFF are forwarded to ISA). * Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to @@ -134,7 +135,10 @@ * Note: Accesses to FFFF0000-FFFFFFFF are always forwarded to ISA. * Set bit 2: BIOSCS# Write Enable (1=enable, 0=disable). */ - new = old | 0x02c4; + if (dev->device_id == 0x122e || dev->device_id == 0x7000) + new = old | 0x00c4; /* Bit 9 is reserved on PIIX/PIIX3. */ + else + new = old | 0x02c4; if (new == old) return 0; @@ -745,6 +749,8 @@ static const FLASH_ENABLE enables[] = { {0x1039, 0x0630, "SiS630", enable_flash_sis630}, + {0x8086, 0x122e, "Intel PIIX", enable_flash_piix4}, + {0x8086, 0x7000, "Intel PIIX3", enable_flash_piix4}, {0x8086, 0x7110, "Intel PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x7198, "Intel 440MX", enable_flash_piix4}, {0x8086, 0x2410, "Intel ICH", enable_flash_ich_4e},

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[inteltool]GM965 temperature detector
by lu zhihe 26 Oct '08

26 Oct '08

Dear all: I had download a old version inteltool to add GM965 IGP Thermal Sensor supported. It seems work. And the process of "calibrated current temperature" transfer to "degree Centigrade" need improve. It may split form inteltool, if just support gpu temperature report. Hope you like it. Thank you for your orignal work, Stefan Reinauer. -- Thx Lu Zhihe

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DFI Infinity NF570-M2/G motherboard
by Chris Lingard 26 Oct '08

26 Oct '08

I have been following this list for a while, and noted down the names of socketed motherboards. When I went to purchase one, they were all obsolete/unobtainable in the United Kingdom. The local computer shop is Linux friendly, so I asked them to find a motherboard with a socketed chip, and they suggested the above. At last I can try coreboot without soldering and switches. The board comes with a ITE IT8716F 4MB chip; but that is compatible with SST49LF040A chips. I already have these and some SST49LF080A chips; just wish there were 160 or 320MB The motherboard is electrically very similar to the Gigabyte M57SLI having a NVidea 570 SLI MCP(MCP55) chip set. I have only had the machine 6 hours, have loaded Linux, and had a go at building and booting coreboot; must get more fall back chips before proceeding. My coreboot got as far as filo; but that could not find the disks; possibly because it is SATA. (Because the machine is so similar to a M57SLI, I just duplicate the directories using the names dfi for gigabyte and nf570sli for m57sli; copied the files, and did some minor editing for the name couplets). I am going to add an IDE drive tomorrow, and start setting up systems properly. If anyone is interested in DFI machines, I can get more chips. Money is not a problem, so let me know if you need any of the above chips, and I can put in a bulk order and get discount. Chris Lingard

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More v3 quesions
by Corey Osgood 26 Oct '08

26 Oct '08

I've got a few more questions that I could probably figure out answers to by testing, but hopefully it's easier just to ask: * If a device is defined in the dts, but disabled during phase4_enable_disable which renders the device hidden, what will/should v3 do? * If another device appears where the disabled device should have been (in this case, the ide controller is now where sata used to be), what should happen? Will the ide controller's config (that was intended for another location) be used? In this case, it's D10F0 and F1. * phase4_enable_disable passes the actual device it's enabling/disabling, right? * What's the format of devfn (as in dev->path.pci.devfn)? dev << 4 | function? Thanks! Corey

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[PATCH] flashrom: Add support for VIA VT82C586A/B, improve docs
by Uwe Hermann 25 Oct '08

25 Oct '08

See patch. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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r3693 - trunk/util/flashrom
by svn＠coreboot.org 25 Oct '08

25 Oct '08

Author: uwe Date: 2008-10-25 20:03:50 +0200 (Sat, 25 Oct 2008) New Revision: 3693 Modified: trunk/util/flashrom/chipset_enable.c Log: Add support for the VIA VT82C586A/B chipset, improve documentation. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/util/flashrom/chipset_enable.c =================================================================== --- trunk/util/flashrom/chipset_enable.c 2008-10-23 23:33:18 UTC (rev 3692) +++ trunk/util/flashrom/chipset_enable.c 2008-10-25 18:03:50 UTC (rev 3693) @@ -570,6 +570,7 @@ return 0; } +/* Works for AMD-8111, VIA VT82C586A/B, VIA VT82C686A/B. */ static int enable_flash_amd8111(struct pci_dev *dev, const char *name) { uint8_t old, new; @@ -584,6 +585,7 @@ } } + /* Enable 'ROM write' bit. */ old = pci_read_byte(dev, 0x40); new = old | 0x01; if (new == old) @@ -782,7 +784,8 @@ {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, {0x1106, 0x3372, "VIA VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8324, "VIA CX700", enable_flash_vt823x}, - {0x1106, 0x0686, "VIA VT82C686", enable_flash_amd8111}, + {0x1106, 0x0586, "VIA VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0686, "VIA VT82C686A/B", enable_flash_amd8111}, {0x1078, 0x0100, "AMD CS5530(A)", enable_flash_cs5530}, {0x100b, 0x0510, "AMD SC1100", enable_flash_sc1100}, {0x1039, 0x0008, "SiS5595", enable_flash_sis5595},

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Lanparty UT NF4 Ultra-D support status
by razor1394 25 Oct '08

25 Oct '08

Hello I'm really interested in putting Coreboot on my firmware chip but I'm not entirely sure it will work. My motherboard is on the desktop candidates list which is good news I presume. I've attached output of some hardware info commands. Super I/O is ITE IT8712F. The bios chip is removable and I have 5 spare. It says: SST 49LF004B 0446053-C Some questions... Can you have bluetooth compiled inside the kernel of Coreboot? I was thinking of using bluetooth keyboards to access firmware settings. This is something that BIOS does not let me. Only thing that works on my computer is PS/2 and USB. Thanks. -- RaZoR1394

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[inteltool]Add support for GM965 NorthBridge dump
by lu zhihe 25 Oct '08

25 Oct '08

Dear all: I had made inteltool work on my Laptop's GM965. Hope it can help you. -- Thx Lu Zhihe

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Re: [coreboot] Providing an identifier to a virtualization guest via SMBIOS
by Bryan McLellan 25 Oct '08

25 Oct '08

I was digging around KVM trunk before leaving the office and it looked like the old vmport code (couldn't see anyone having used this with open-vm-tools though) has been scratched for some kind of qemu fw_cfg framework. Trunk does have a --uuid option, and it looks like with libvirt integration this at least will put the uuid of the guest somewhere on the guest where you can get to it. If there's no decent way to interact with the vmport code that is there now (to mimic vmware's setguestinfo), I'll wait for the next release of KVM. Bryan -----Original Message----- From: Kevin O'Connor <kevin(a)koconnor.net> Sent: Friday, October 24, 2008 5:49 PM To: Bryan McLellan <btm(a)loftninjas.org> Subject: Re: [coreboot] Providing an identifier to a virtualization guest via SMBIOS Hi Bryan, On Fri, Oct 24, 2008 at 03:33:02PM -0700, Bryan McLellan wrote: > Ultimately I want a KVM/libvirt guest booting using the > Coreboot/LinuxBIOS code to be able to figure out something unique > about it's host (like hostname) to script inventory management type > stuff (like iClassify). Yes - the latest QEMU supports setting a UUID for the guest. However, it doesn't use the code currently found in the bochs bios. The new code (using something called vmport) just got checked into qemu. I suspect it's also in the tip of kvm (or about to added). You probably want to ask on the qemu or kvm mailing lists. -Kevin

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Providing an identifier to a virtualization guest via SMBIOS
by Bryan McLellan 24 Oct '08

24 Oct '08

Ultimately I want a KVM/libvirt guest booting using the Coreboot/LinuxBIOS code to be able to figure out something unique about it's host (like hostname) to script inventory management type stuff (like iClassify). I was perusing the rombios32.c [1] in the kvm-72+dfsg/bios folder of the Ubuntu kvm package source to see if any data was gleaned off the host and saw the lone bios_uud variable getting set by the uuid_probe function. Having no idea what any of that assembly does, my hopes are sparked by the "check if backdoor port exists" comment. What is this magic, can I poke it in some way to make it useful? Bryan [1] // $Id: rombios32.c,v 1.11 2007/08/03 13:56:13 vruppert Exp $

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coreboot October 2008