coreboot July 2007

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[LinuxBIOS] MP table
by George V. Adamov 23 Jul '07

23 Jul '07

How to create MP table? /*mptable.c*/ is there any docs about it ?

2 1

Re: [LinuxBIOS] r462 - in LinuxBIOSv3: include lib util/x86emu
by Uwe Hermann 23 Jul '07

23 Jul '07

On Sat, Jul 21, 2007 at 09:22:40PM +0200, svn(a)openbios.org wrote: > fix somw printk calls and print warnings for those that still need to be fixed. > (trivial) > > Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> > Acked-by: Stefan Reinauer <stepan(a)coresystems.de> > > > > Modified: LinuxBIOSv3/include/console.h > =================================================================== > --- LinuxBIOSv3/include/console.h 2007-07-21 14:33:54 UTC (rev 461) > +++ LinuxBIOSv3/include/console.h 2007-07-21 19:22:40 UTC (rev 462) > @@ -46,6 +46,7 @@ > }; > > // > -int printk(int msg_level, const char *fmt, ...); > +int printk(int msg_level, const char *fmt, ...) > + __attribute__((format (printf, 2, 3))); This is causing quite a bunch of additional warnings, see below: CP build/config.h GEN build/build.h BUILD DUMMY VPD CC build/lib/uart8250.o CC build/lib/mem.o CC build/lib/elfboot.o /tmp/v3_fresh/lib/elfboot.c: In function ‘load_elf_segments’: /tmp/v3_fresh/lib/elfboot.c:105: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘Elf32_Addr’ /tmp/v3_fresh/lib/elfboot.c:105: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘Elf32_Word’ /tmp/v3_fresh/lib/elfboot.c:105: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 5 has type ‘Elf32_Off’ /tmp/v3_fresh/lib/elfboot.c:105: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 6 has type ‘Elf32_Word’ /tmp/v3_fresh/lib/elfboot.c:112: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 3 has type ‘Elf32_Addr’ /tmp/v3_fresh/lib/elfboot.c:112: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘int’ /tmp/v3_fresh/lib/elfboot.c:112: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 5 has type ‘Elf32_Off’ /tmp/v3_fresh/lib/elfboot.c: In function ‘elfload’: /tmp/v3_fresh/lib/elfboot.c:153: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘void *’ CC build/lib/lar.o CC build/lib/delay.o CC build/lib/vtxprintf.o CC build/lib/vsprintf.o CC build/lib/console.o CC build/lib/lzma.o CC build/arch/x86/stage1.o CC build/arch/x86/serial.o CC build/arch/x86/archelfboot.o CC build/arch/x86/speaker.o CC build/arch/x86/udelay_io.o CC build/arch/x86/mc146818rtc.o CC build/arch/x86/stage0_i586.o AS build/arch/x86/stage0_i586.o CC build/mainboard/emulation/qemu-x86/stage1.o CC build/stage0.init OBJCOPY build/stage0.init TEST build/stage0.init BUILD build/linuxbios.bootblock BUILD LAR BUILD LZMA HOSTCC build/util/lar/lar.o HOSTCC build/util/lar/create.o HOSTCC build/util/lar/extract.o HOSTCC build/util/lar/list.o HOSTCC build/util/lar/lib.o HOSTCC build/util/lar/bootblock.o HOSTCXX build/util/lzma/LZMAEncoder.o HOSTCXX build/util/lzma/LZInWindow.o HOSTCXX build/util/lzma/RangeCoderBit.o HOSTCXX build/util/lzma/StreamUtils.o HOSTCXX build/util/lzma/OutBuffer.o HOSTCXX build/util/lzma/Alloc.o HOSTCXX build/util/lzma/CRC.o HOSTCXX build/util/lar/lar HOSTCXX build/util/lzma/minilzma.o CC build/mainboard/emulation/qemu-x86/initram.o LD build/linuxbios.initram OBJCOPY build/linuxbios.initram CC build/lib/stage2.o CC build/lib/clog2.o CC build/lib/tables.o CC build/lib/compute_ip_checksum.o CC build/arch/x86/archtables.o /tmp/v3_fresh/arch/x86/archtables.c:43:2: warning: #warning enable disabled code in archtables.c /tmp/v3_fresh/arch/x86/archtables.c:133:2: warning: #warning GDT should be placed in a reserved position from the beginning on. CC build/arch/x86/linuxbios_table.o /tmp/v3_fresh/arch/x86/linuxbios_table.c: In function ‘lb_memory_range’: /tmp/v3_fresh/arch/x86/linuxbios_table.c:181: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘unsigned int’ /tmp/v3_fresh/arch/x86/linuxbios_table.c:181: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 5 has type ‘unsigned int’ /tmp/v3_fresh/arch/x86/linuxbios_table.c: In function ‘lb_table_fini’: /tmp/v3_fresh/arch/x86/linuxbios_table.c:235: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 5 has type ‘u32’ CC build/arch/x86/pci_ops_auto.o CC build/arch/x86/pci_ops_conf1.o CC build/arch/x86/pci_ops_conf2.o CC build/arch/x86/keyboard.o CC build/arch/x86/i8259.o CC build/arch/x86/isa-dma.o CC build/device/device.o /tmp/v3_fresh/device/device.c: In function ‘find_constructor’: /tmp/v3_fresh/device/device.c:134: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘struct constructor *’ /tmp/v3_fresh/device/device.c:137: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘struct constructor *’ /tmp/v3_fresh/device/device.c: In function ‘constructor’: /tmp/v3_fresh/device/device.c:167: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 4 has type ‘struct constructor *’ /tmp/v3_fresh/device/device.c: In function ‘compute_allocate_resource’: /tmp/v3_fresh/device/device.c:496: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/device.c:514:2: warning: #warning Modify allocate_vga_resource so it is less PCI centric. CC build/device/device_util.o /tmp/v3_fresh/device/device_util.c: In function ‘report_resource_stored’: /tmp/v3_fresh/device/device_util.c:608: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/device_util.c: In function ‘search_global_resources’: /tmp/v3_fresh/device/device_util.c:646: warning: format ‘%x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/device_util.c:646: warning: format ‘%x’ expects type ‘unsigned int’, but argument 5 has type ‘long unsigned int’ /tmp/v3_fresh/device/device_util.c:661: warning: format ‘%x’ expects type ‘unsigned int’, but argument 6 has type ‘long unsigned int’ /tmp/v3_fresh/device/device_util.c:661: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 7 has type ‘unsigned int’ /tmp/v3_fresh/device/device_util.c:661: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 8 has type ‘unsigned int’ CC build/device/root_device.o CC build/device/pci_device.o /tmp/v3_fresh/device/pci_device.c: In function ‘pci_get_resource’: /tmp/v3_fresh/device/pci_device.c:214: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_device.c:214: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 5 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_device.c: In function ‘pci_get_rom_resource’: /tmp/v3_fresh/device/pci_device.c:313: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_device.c:313: warning: format ‘%08x’ expects type ‘unsigned int’, but argument 5 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_device.c: In function ‘pci_set_resource’: /tmp/v3_fresh/device/pci_device.c:461: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_device.c:541: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ CC build/device/pci_ops.o CC build/device/pci_rom.o /tmp/v3_fresh/device/pci_rom.c: In function ‘pci_rom_probe’: /tmp/v3_fresh/device/pci_rom.c:51: warning: format ‘%x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/pci_rom.c: In function ‘pci_rom_load’: /tmp/v3_fresh/device/pci_rom.c:135: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘struct rom_header *’ /tmp/v3_fresh/device/pci_rom.c:143: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘struct rom_header *’ /tmp/v3_fresh/device/pci_rom.c:143: warning: format ‘%x’ expects type ‘unsigned int’, but argument 4 has type ‘void *’ CC build/device/pnp_device.o /tmp/v3_fresh/device/pnp_device.c: In function ‘pnp_set_resource’: /tmp/v3_fresh/device/pnp_device.c:92: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/device/pnp_device.c:105: warning: format ‘%02x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ CC build/device/pnp_raw.o CC build/mainboard/emulation/qemu-x86/vga.o HOSTCC build/util/dtc/dtc.o HOSTCC build/util/dtc/livetree.o HOSTCC build/util/dtc/flattree.o HOSTCC build/util/dtc/data.o HOSTCC build/util/dtc/treesource.o HOSTCC build/util/dtc/fstree.o BISON build/util/dtc/dtc-parser.tab.c HOSTCC build/util/dtc/dtc-parser.tab.o HOSTCC build/util/dtc/dtc DTC build/statictree.h DTC mainboard/emulation/qemu-x86/dts (dts->lbh) DTC build/mainboard/emulation/qemu-x86/statictree.c DTC mainboard/emulation/qemu-x86/dts (dts->lb) CC build/mainboard/emulation/qemu-x86/statictree.o CC build/northbridge/intel/i440bxemulation/i440bx.o /tmp/v3_fresh/northbridge/intel/i440bxemulation/i440bx.c: In function ‘ram_resource’: /tmp/v3_fresh/northbridge/intel/i440bxemulation/i440bx.c:83: warning: format ‘%d’ expects type ‘int’, but argument 4 has type ‘resource_t’ CC build/southbridge/intel/i82371eb/i82371eb.o CC build/superio/winbond/w83627hf/superio.o /tmp/v3_fresh/superio/winbond/w83627hf/superio.c:73:2: warning: #warning Fix CMOS handling /tmp/v3_fresh/superio/winbond/w83627hf/superio.c: In function ‘init_hwm’: /tmp/v3_fresh/superio/winbond/w83627hf/superio.c:110: warning: format ‘%04x’ expects type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ /tmp/v3_fresh/superio/winbond/w83627hf/superio.c:134:2: warning: #warning init_uart8250 /tmp/v3_fresh/superio/winbond/w83627hf/superio.c:139:2: warning: #warning init_uart8250 CC build/util/x86emu/vm86.o /tmp/v3_fresh/util/x86emu/vm86.c:334:2: warning: #warning fix rom address /tmp/v3_fresh/util/x86emu/vm86.c:343:2: warning: #warning Implement write_protect_vgabios() /tmp/v3_fresh/util/x86emu/vm86.c: In function ‘biosint’: /tmp/v3_fresh/util/x86emu/vm86.c:547: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ /tmp/v3_fresh/util/x86emu/vm86.c:547: warning: format ‘%x’ expects type ‘unsigned int’, but argument 4 has type ‘long unsigned int’ /tmp/v3_fresh/util/x86emu/vm86.c:547: warning: format ‘%x’ expects type ‘unsigned int’, but argument 5 has type ‘long unsigned int’ /tmp/v3_fresh/util/x86emu/vm86.c:553: warning: format ‘%u’ expects type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ /tmp/v3_fresh/util/x86emu/vm86.c:582: warning: format ‘%x’ expects type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ AR build/util/x86emu/libx86emu.a LD build/linuxbios.stage2 OBJCOPY build/linuxbios.stage2 HOSTCC build/util/options/build_opt_tbl.o HOSTCC build/util/options/build_opt_tbl OPTIONS build/mainboard/emulation/qemu-x86/option_table.c CC build/mainboard/emulation/qemu-x86/option_table.o OBJCOPY build/option_table PAYLOAD none (as specified by user) LAR build/linuxbios.rom CP build/bios.bin DONE Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

2 1

[LinuxBIOS] [v3][PATCH] POST_CODE macro
by Marc Jones 23 Jul '07

23 Jul '07

Not much to say. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Add a POST_CODE marco to post_code.h and change all post_code() function calls to POST_CODE macros. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: LinuxBIOSv3/arch/x86/archtables.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/archtables.c 2007-07-20 13:52:11.000000000 -0600 +++ LinuxBIOSv3/arch/x86/archtables.c 2007-07-20 13:57:36.000000000 -0600 @@ -25,6 +25,7 @@ #include <console.h> #include <string.h> #include <tables.h> +#include <post_code.h> //#include <cpu/cpu.h> //#include <pirq_routing.h> //#include <smp/mpspec.h> @@ -77,7 +78,7 @@ low_table_start = 0; low_table_end = 16; - post_code(0x9a); + POST_CODE(0x9a); /* This table must be betweeen 0xf0000 & 0x100000 */ // rom_table_end = write_pirq_routing_table(rom_table_end); @@ -92,7 +93,7 @@ // rom_table_end = (rom_table_end+1023) & ~1023; /* copy the smp block to address 0 */ - post_code(0x96); + POST_CODE(0x96); /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */ // new_low_table_end = write_smp_table(low_table_end); Index: LinuxBIOSv3/arch/x86/geodelx/geodelx.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/geodelx/geodelx.c 2007-07-20 13:42:44.000000000 -0600 +++ LinuxBIOSv3/arch/x86/geodelx/geodelx.c 2007-07-20 13:43:56.000000000 -0600 @@ -29,6 +29,7 @@ #include <amd_geodelx.h> #include <spd.h> #include <legacy.h> +#include <post_code.h> /* All these functions used to be in a lot of fiddly little files. To make it * easier to find functions, we are merging them here. This file is our first @@ -155,12 +156,12 @@ printk(BIOS_DEBUG, "_MSR GLCP_SYS_RSTPLL (%08x) value is: %08x:%08x\n", msr_glcp_sys_pll.hi, msr_glcp_sys_pll.lo); - post_code(POST_PLL_INIT); + POST_CODE(POST_PLL_INIT); if (!(msr_glcp_sys_pll.lo & (1 << RSTPLL_LOWER_SWFLAGS_SHIFT))) { printk(BIOS_DEBUG, "Configuring PLL\n"); if (manualconf) { - post_code(POST_PLL_MANUAL); + POST_CODE(POST_PLL_MANUAL); /* CPU and GLIU mult/div (GLMC_CLK = GLIU_CLK / 2) */ msr_glcp_sys_pll.hi = pll_hi; @@ -168,7 +169,7 @@ msr_glcp_sys_pll.lo = pll_lo; } else { /* Automatic configuration (straps) */ - post_code(POST_PLL_STRAP); + POST_CODE(POST_PLL_STRAP); /* Hold 0xDE * 16 clocks during reset. AMD recomended * value for PLL reset from silicon validation. @@ -193,7 +194,7 @@ /* You should never get here... the chip has reset. */ printk(BIOS_EMERG, "CONFIGURING PLL FAILURE -- HALT\n"); - post_code(POST_PLL_RESET_FAIL); + POST_CODE(POST_PLL_RESET_FAIL); hlt(); } Index: LinuxBIOSv3/arch/x86/keyboard.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/keyboard.c 2007-07-20 13:53:38.000000000 -0600 +++ LinuxBIOSv3/arch/x86/keyboard.c 2007-07-20 13:56:29.000000000 -0600 @@ -2,12 +2,13 @@ #include <keyboard.h> #include <device/device.h> #include <io.h> +#include <post_code.h> static int kbd_empty_input_buffer(void) { unsigned long timeout; for(timeout = 1000000; timeout && (inb(0x64) & 0x02); timeout--) { - post_code(0); + POST_CODE(0); } return !!timeout; } @@ -16,7 +17,7 @@ { unsigned long timeout; for(timeout = 1000000; timeout && ((inb(0x64) & 0x01) == 0); timeout--) { - post_code(0); + POST_CODE(0); } return !!timeout; } Index: LinuxBIOSv3/arch/x86/pci_ops_auto.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/pci_ops_auto.c 2007-07-20 14:00:39.000000000 -0600 +++ LinuxBIOSv3/arch/x86/pci_ops_auto.c 2007-07-20 14:02:08.000000000 -0600 @@ -6,6 +6,7 @@ #include <device/pci_ops.h> #include <types.h> #include <io.h> +#include <post_code.h> /* * Before we decide to use direct hardware access mechanisms, we try to do some @@ -88,5 +89,5 @@ { printk(BIOS_INFO, "Finding PCI configuration type.\n"); dev->ops->ops_pci_bus = pci_check_direct(); - post_code(0x5f); + POST_CODE(0x5f); } Index: LinuxBIOSv3/arch/x86/stage1.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/stage1.c 2007-07-20 13:30:57.000000000 -0600 +++ LinuxBIOSv3/arch/x86/stage1.c 2007-07-20 13:32:22.000000000 -0600 @@ -25,6 +25,7 @@ #include <tables.h> #include <lib.h> #include <mc146818rtc.h> +#include <post_code.h> #define UNCOMPRESS_AREA 0x60000 @@ -35,21 +36,16 @@ void hardware_stage1(void); void disable_car(void); -void post_code(u8 value) -{ - outb(value, 0x80); -} - static void stop_ap(void) { // nothing yet - post_code(0xf0); + POST_CODE(0xf0); } static void enable_rom(void) { // nothing here yet - post_code(0xf2); + POST_CODE(0xf2); } /* @@ -74,7 +70,7 @@ mem->map[0].type = LB_MEM_RAM; - post_code(0x02); + POST_CODE(0x02); // before we do anything, we want to stop if we dont run // on the bootstrap processor. Index: LinuxBIOSv3/device/device.c =================================================================== --- LinuxBIOSv3.orig/device/device.c 2007-07-20 13:48:18.000000000 -0600 +++ LinuxBIOSv3/device/device.c 2007-07-20 13:50:13.000000000 -0600 @@ -37,6 +37,7 @@ #include <string.h> #include <lib.h> #include <spinlock.h> +#include <post_code.h> /** Linked list of all devices. */ struct device *all_devices = &dev_root; @@ -689,15 +690,15 @@ { struct device *dev; - post_code(0x31); + POST_CODE(0x31); for (dev = all_devices; dev; dev = dev->next) { if (dev->ops && dev->ops->phase1_set_device_operations) { dev->ops->phase1_set_device_operations(dev); } } - post_code(0x3e); + POST_CODE(0x3e); printk(BIOS_DEBUG, "Phase 1: done\n"); - post_code(0x3f); + POST_CODE(0x3f); } /** @@ -711,7 +712,7 @@ { struct device *dev; - post_code(0x41); + POST_CODE(0x41); printk(BIOS_DEBUG, "Phase 2: Early setup...\n"); for (dev = all_devices; dev; dev = dev->next) { printk(BIOS_SPEW, "%s: dev %s: ", __FUNCTION__, dev->dtsname); @@ -724,9 +725,9 @@ printk(BIOS_SPEW, "\n"); } - post_code(0x4e); + POST_CODE(0x4e); printk(BIOS_DEBUG, "Phase 2: Done.\n"); - post_code(0x4f); + POST_CODE(0x4f); } /** @@ -744,7 +745,7 @@ { unsigned int new_max; int do_phase3; - post_code(0x42); + POST_CODE(0x42); if (!busdevice || !busdevice->enabled || !busdevice->ops || !busdevice->ops->phase3_scan) { printk(BIOS_INFO, "%s: %s: busdevice %p enabled %d ops %p\n", @@ -776,7 +777,7 @@ } } } - post_code(0x4e); + POST_CODE(0x4e); printk(BIOS_INFO, "%s: returning %d\n", __FUNCTION__, max); return new_max; } @@ -815,7 +816,7 @@ if (root->ops && root->ops->phase3_enable_scan) { root->ops->phase3_enable_scan(root); } - post_code(0x41); + POST_CODE(0x41); if (!root->ops) { printk(BIOS_ERR, "dev_root_phase3 missing 'ops' initialization\nPhase 3: Failed.\n"); Index: LinuxBIOSv3/device/pci_device.c =================================================================== --- LinuxBIOSv3.orig/device/pci_device.c 2007-07-20 13:50:33.000000000 -0600 +++ LinuxBIOSv3/device/pci_device.c 2007-07-20 13:51:30.000000000 -0600 @@ -30,6 +30,8 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <post_code.h> + #define CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT 0 #define CONFIG_PCIX_PLUGIN_SUPPORT 0 #define CONFIG_PCIE_PLUGIN_SUPPORT 0 @@ -1042,7 +1044,7 @@ __func__, old_devices, bus->dev, bus->dev->dtsname); bus->children = 0; - post_code(0x24); + POST_CODE(0x24); printk(BIOS_SPEW, "PCI: scan devfn 0x%x to 0x%x\n", min_devfn, max_devfn); /* Probe all devices/functions on this bus with some optimization for @@ -1075,7 +1077,7 @@ } } printk(BIOS_SPEW, "PCI: Done for loop\n"); - post_code(0x25); + POST_CODE(0x25); /* Die if any leftover static devices are are found. * There's probably a problem in the Config.lb. @@ -1101,7 +1103,7 @@ * Return how far we've got finding sub-buses. */ printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max); - post_code(0x55); + POST_CODE(0x55); return max; } Index: LinuxBIOSv3/include/post_code.h =================================================================== --- LinuxBIOSv3.orig/include/post_code.h 2007-07-20 13:26:32.000000000 -0600 +++ LinuxBIOSv3/include/post_code.h 2007-07-20 13:38:27.000000000 -0600 @@ -17,6 +17,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <io.h> +#define POST_CODE(x) outb(x, 0x80) #define POST_START_OF_MAIN 0x01 Index: LinuxBIOSv3/lib/elfboot.c =================================================================== --- LinuxBIOSv3.orig/lib/elfboot.c 2007-07-20 13:34:35.000000000 -0600 +++ LinuxBIOSv3/lib/elfboot.c 2007-07-20 13:35:54.000000000 -0600 @@ -34,6 +34,7 @@ #include <tables.h> #include <elf.h> #include <elf_boot.h> +#include <post_code.h> static int valid_area(struct lb_memory *mem, unsigned long start, unsigned long len) @@ -151,7 +152,7 @@ //boot_successful(); printk(BIOS_DEBUG, "Jumping to boot code at 0x%x\n", entry); - post_code(0xfe); + POST_CODE(0xfe); /* Jump to kernel */ /* most of the time, jmp_to_elf_entry is just a call. But this hook gives us @@ -174,7 +175,7 @@ result = 0; printk(BIOS_INFO, "ELF loader started.\n"); - post_code(0xf8); + POST_CODE(0xf8); /* Scan for an elf header */ header_offset = -1; @@ -214,7 +215,7 @@ printk(BIOS_ERR, "Cannot load ELF image\n"); - post_code(0xff); + POST_CODE(0xff); } return 0; } Index: LinuxBIOSv3/lib/stage2.c =================================================================== --- LinuxBIOSv3.orig/lib/stage2.c 2007-07-20 13:45:42.000000000 -0600 +++ LinuxBIOSv3/lib/stage2.c 2007-07-20 13:47:52.000000000 -0600 @@ -27,6 +27,7 @@ #include <console.h> #include <device/device.h> #include <tables.h> +#include <post_code.h> /** * Main function of the DRAM part of LinuxBIOS. @@ -51,7 +52,7 @@ LINUXBIOS_BUILD " booting...\n"; - post_code(0x20); + POST_CODE(0x20); printk(BIOS_NOTICE, console_test); @@ -60,7 +61,7 @@ /* Console init, also ANYTHING that has to be done * before printk can be used. */ - post_code(0x30); + POST_CODE(0x30); dev_phase1(); show_all_devs(); @@ -68,34 +69,34 @@ * done. This is for ANYTHING that might have to happen before * device enumeration but that needs a printk. */ - post_code(0x40); + POST_CODE(0x40); dev_phase2(); show_all_devs(); /* Walk physical devices and add any dynamic devices to the * device tree. */ - post_code(0x30); + POST_CODE(0x30); dev_root_phase3(); show_all_devs(); /* Compute and assign the bus resources. */ - post_code(0x40); + POST_CODE(0x40); dev_phase4(); show_all_devs(); /* Now actually enable devices on the bus. */ - post_code(0x50); + POST_CODE(0x50); dev_root_phase5(); show_all_devs(); /* Initialize devices on the bus. */ - post_code(0x60); + POST_CODE(0x60); dev_phase6(); show_all_devs(); /* TODO: Add comment. */ - post_code(0x70); + POST_CODE(0x70); write_tables(); show_all_devs(); Index: LinuxBIOSv3/mainboard/amd/norwich/initram.c =================================================================== --- LinuxBIOSv3.orig/mainboard/amd/norwich/initram.c 2007-07-20 13:44:14.000000000 -0600 +++ LinuxBIOSv3/mainboard/amd/norwich/initram.c 2007-07-20 13:44:38.000000000 -0600 @@ -60,7 +60,7 @@ DIMM0, DIMM1 }; - post_code(POST_START_OF_MAIN); + POST_CODE(POST_START_OF_MAIN); system_preinit(); Index: LinuxBIOSv3/mainboard/amd/norwich/stage1.c =================================================================== --- LinuxBIOSv3.orig/mainboard/amd/norwich/stage1.c 2007-07-20 13:33:08.000000000 -0600 +++ LinuxBIOSv3/mainboard/amd/norwich/stage1.c 2007-07-20 13:33:46.000000000 -0600 @@ -32,7 +32,7 @@ void hardware_stage1(void) { - post_code(POST_START_OF_MAIN); + POST_CODE(POST_START_OF_MAIN); geodelx_msr_init(); cs5536_stage1(); Index: LinuxBIOSv3/northbridge/amd/geodelx/geodelxinit.c =================================================================== --- LinuxBIOSv3.orig/northbridge/amd/geodelx/geodelxinit.c 2007-07-20 14:02:30.000000000 -0600 +++ LinuxBIOSv3/northbridge/amd/geodelx/geodelxinit.c 2007-07-20 14:02:55.000000000 -0600 @@ -674,7 +674,7 @@ } } if (gl == 0) { - post_code(POST_RCONFInitError); + POST_CODE(POST_RCONFInitError); while (1); /* TODO: Should be hlt()? */ } Index: LinuxBIOSv3/northbridge/amd/geodelx/raminit.c =================================================================== --- LinuxBIOSv3.orig/northbridge/amd/geodelx/raminit.c 2007-07-20 13:38:57.000000000 -0600 +++ LinuxBIOSv3/northbridge/amd/geodelx/raminit.c 2007-07-20 13:42:23.000000000 -0600 @@ -58,7 +58,7 @@ spd_byte = smbus_read_byte(dimm, SPD_NUM_DIMM_BANKS); if ((MIN_MOD_BANKS > spd_byte) && (spd_byte > MAX_MOD_BANKS)) { printk(BIOS_EMERG, "Number of module banks not compatible\n"); - post_code(ERROR_BANK_SET); + POST_CODE(ERROR_BANK_SET); hlt(); } dimm_setting |= (spd_byte >> 1) << CF07_UPPER_D0_MB_SHIFT; @@ -66,7 +66,7 @@ spd_byte = smbus_read_byte(dimm, SPD_NUM_BANKS_PER_SDRAM); if ((MIN_DEV_BANKS > spd_byte) && (spd_byte > MAX_DEV_BANKS)) { printk(BIOS_EMERG, "Number of device banks not compatible\n"); - post_code(ERROR_BANK_SET); + POST_CODE(ERROR_BANK_SET); hlt(); } dimm_setting |= (spd_byte >> 2) << CF07_UPPER_D0_CB_SHIFT; @@ -74,7 +74,7 @@ if ((smbus_read_byte(dimm, SPD_NUM_ROWS) & 0xF0) || (smbus_read_byte(dimm, SPD_NUM_COLUMNS) & 0xF0)) { printk(BIOS_EMERG, "Asymmetric DIMM not compatible\n"); - post_code(ERROR_UNSUPPORTED_DIMM); + POST_CODE(ERROR_UNSUPPORTED_DIMM); hlt(); } @@ -94,7 +94,7 @@ dimm_size = __builtin_ctz(dimm_size); if (dimm_size > 8) { /* 8 is 1 GB only support 1 GB per DIMM */ printk(BIOS_EMERG, "Only support up to 1 GB per DIMM\n"); - post_code(ERROR_DENSITY_DIMM); + POST_CODE(ERROR_DENSITY_DIMM); hlt(); } dimm_setting |= dimm_size << CF07_UPPER_D0_SZ_SHIFT; @@ -127,7 +127,7 @@ spd_byte = num_col_addr[smbus_read_byte(dimm, SPD_NUM_COLUMNS) & 0xF]; if (spd_byte > MAX_COL_ADDR) { printk(BIOS_EMERG, "DIMM page size not compatible\n"); - post_code(ERROR_SET_PAGE); + POST_CODE(ERROR_SET_PAGE); hlt(); } spd_byte -= 7; @@ -175,7 +175,7 @@ #if 0 if (spd_byte0 < 0xA0 || spd_byte0 < 0xA0) { printk(BIOS_EMERG, "DIMM overclocked. Check GeodeLink speed\n"); - post_code(POST_PLL_MEM_FAIL); + POST_CODE(POST_PLL_MEM_FAIL); hlt(); } #endif @@ -191,7 +191,7 @@ /* Current speed > max speed? */ if (geode_link_speed() > speed) { printk(BIOS_EMERG, "DIMM overclocked. Check GeodeLink speed\n"); - post_code(POST_PLL_MEM_FAIL); + POST_CODE(POST_PLL_MEM_FAIL); hlt(); } } @@ -349,7 +349,7 @@ spd_byte = CASDDR[__builtin_ctz((u32) casmap0)]; } else { printk(BIOS_EMERG, "DIMM CAS latencies not compatible\n"); - post_code(ERROR_DIFF_DIMMS); + POST_CODE(ERROR_DIFF_DIMMS); hlt(); } @@ -569,24 +569,24 @@ { u8 spd_byte; - post_code(POST_MEM_SETUP); + POST_CODE(POST_MEM_SETUP); spd_byte = smbus_read_byte(dimm0, SPD_MODULE_ATTRIBUTES); /* Check DIMM is not Registered and not Buffered DIMMs. */ if ((spd_byte != 0xFF) && (spd_byte & 3)) { printk(BIOS_EMERG, "DIMM 0 NOT COMPATIBLE!\n"); - post_code(ERROR_UNSUPPORTED_DIMM); + POST_CODE(ERROR_UNSUPPORTED_DIMM); hlt(); } spd_byte = smbus_read_byte(dimm1, SPD_MODULE_ATTRIBUTES); if ((spd_byte != 0xFF) && (spd_byte & 3)) { printk(BIOS_EMERG, "DIMM 1 NOT COMPATIBLE!\n"); - post_code(ERROR_UNSUPPORTED_DIMM); + POST_CODE(ERROR_UNSUPPORTED_DIMM); hlt(); } - post_code(POST_MEM_SETUP2); + POST_CODE(POST_MEM_SETUP2); /* Check that the memory is not overclocked. */ check_ddr_max(dimm0, dimm1); @@ -595,13 +595,13 @@ * This is gross. It is an artifact of our move to parametes instead of * #defines. FIXME! The fix is trivial but I want to see it work first. */ - post_code(POST_MEM_SETUP3); + POST_CODE(POST_MEM_SETUP3); auto_size_dimm(dimm0, dimm0, dimm1); - post_code(POST_MEM_SETUP4); + POST_CODE(POST_MEM_SETUP4); auto_size_dimm(dimm1, dimm0, dimm1); /* Set CAS latency. */ - post_code(POST_MEM_SETUP5); + POST_CODE(POST_MEM_SETUP5); set_cas(dimm0, dimm1); /* Set all the other latencies here (tRAS, tRP...). */ @@ -639,7 +639,7 @@ u32 i, msrnum; struct msr msr; - post_code(POST_MEM_ENABLE); + POST_CODE(POST_MEM_ENABLE); /* Only enable MTest for TLA memory debug. */ /* EnableMTest(); */ @@ -653,7 +653,7 @@ ((7 << CF07_UPPER_D1_PSZ_SHIFT) | (7 << CF07_UPPER_D0_PSZ_SHIFT))) { printk(BIOS_EMERG, "No memory in the system\n"); - post_code(ERROR_NO_DIMMS); + POST_CODE(ERROR_NO_DIMMS); hlt(); } @@ -768,7 +768,7 @@ wrmsr(msrnum, msr); printk(BIOS_DEBUG, "DRAM controller init done.\n"); - post_code(POST_MEM_SETUP_GOOD); + POST_CODE(POST_MEM_SETUP_GOOD); /* Make sure there is nothing stale in the cache. */ /* CAR stack is in the cache __asm__ __volatile__("wbinvd\n"); */ Index: LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c =================================================================== --- LinuxBIOSv3.orig/southbridge/amd/cs5536/cs5536.c 2007-07-20 14:03:19.000000000 -0600 +++ LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c 2007-07-20 14:03:46.000000000 -0600 @@ -506,7 +506,7 @@ struct southbridge_amd_cs5536_config *sb; struct msrinit *csi; - post_code(P80_CHIPSET_INIT); + POST_CODE(P80_CHIPSET_INIT); dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, 0); if (!dev) {

4 3

[LinuxBIOS] [PATCH][v3] Intel 82371FB/SB/AB/EB/MB southbridge support
by Uwe Hermann 23 Jul '07

23 Jul '07

See patch. I used the name stage2.c for the code (not i82371xx.c) for now. Shall we do that for all our chipsets and devices? A stage1.c file for early init stuff, and stage2.c for the "normal" code? Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

5 10

[LinuxBIOS] Epia ide patch (from a while ago)
by Corey Osgood 22 Jul '07

22 Jul '07

Just looking over the current code, and there's a bit of an error in vt8235_ide.c: @line 54: // Use memory read multiple pci_write_config8(dev, 0x45, 0x1c); @line 97: pci_write_config8(dev, 0x3c, 0xff); writing a 1 to bit 4 of reg 0x45 write protects reg 0x3c. hope this helps someone! -Corey

1 0

[LinuxBIOS] r462 - in LinuxBIOSv3: include lib util/x86emu
by svn＠openbios.org 21 Jul '07

21 Jul '07

Author: stepan Date: 2007-07-21 21:22:40 +0200 (Sat, 21 Jul 2007) New Revision: 462 Modified: LinuxBIOSv3/include/console.h LinuxBIOSv3/lib/elfboot.c LinuxBIOSv3/lib/lar.c LinuxBIOSv3/lib/vtxprintf.c LinuxBIOSv3/util/x86emu/vm86.c Log: fix somw printk calls and print warnings for those that still need to be fixed. (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: LinuxBIOSv3/include/console.h =================================================================== --- LinuxBIOSv3/include/console.h 2007-07-21 14:33:54 UTC (rev 461) +++ LinuxBIOSv3/include/console.h 2007-07-21 19:22:40 UTC (rev 462) @@ -46,6 +46,7 @@ }; // -int printk(int msg_level, const char *fmt, ...); +int printk(int msg_level, const char *fmt, ...) + __attribute__((format (printf, 2, 3))); #endif /* CONSOLE_H */ Modified: LinuxBIOSv3/lib/elfboot.c =================================================================== --- LinuxBIOSv3/lib/elfboot.c 2007-07-21 14:33:54 UTC (rev 461) +++ LinuxBIOSv3/lib/elfboot.c 2007-07-21 19:22:40 UTC (rev 462) @@ -88,7 +88,7 @@ ehdr = (Elf_ehdr *)header; phdr = (Elf_phdr *)(&header[ehdr->e_phoff]); - printk(BIOS_DEBUG, "%s: header %p #headers %d\n", header, headers); + printk(BIOS_DEBUG, "%s: header %p #headers %d\n", __FUNCTION__, header, headers); int i; int size; for(i = 0; i < headers; i++) { Modified: LinuxBIOSv3/lib/lar.c =================================================================== --- LinuxBIOSv3/lib/lar.c 2007-07-21 14:33:54 UTC (rev 461) +++ LinuxBIOSv3/lib/lar.c 2007-07-21 19:22:40 UTC (rev 462) @@ -37,7 +37,7 @@ struct lar_header *header; printk(BIOS_INFO, "LAR: Attempting to open '%s'.\n", filename); - printk(BIOS_SPEW, "LAR: Start 0x%x len 0x%x\n", archive->start, + printk(BIOS_SPEW, "LAR: Start %p len 0x%x\n", archive->start, archive->len); for (walk = archive->start; Modified: LinuxBIOSv3/lib/vtxprintf.c =================================================================== --- LinuxBIOSv3/lib/vtxprintf.c 2007-07-21 14:33:54 UTC (rev 461) +++ LinuxBIOSv3/lib/vtxprintf.c 2007-07-21 19:22:40 UTC (rev 462) @@ -211,6 +211,8 @@ field_width = 2*sizeof(void *); flags |= ZEROPAD; } + tx_byte('0', arg), count++; + tx_byte('x', arg), count++; count += number(tx_byte, arg, (unsigned long) va_arg(args, void *), 16, field_width, precision, flags); Modified: LinuxBIOSv3/util/x86emu/vm86.c =================================================================== --- LinuxBIOSv3/util/x86emu/vm86.c 2007-07-21 14:33:54 UTC (rev 461) +++ LinuxBIOSv3/util/x86emu/vm86.c 2007-07-21 19:22:40 UTC (rev 462) @@ -310,8 +310,8 @@ void do_vgabios(void) { struct device *dev; - unsigned long busdevfn; - unsigned int rom = 0; + unsigned int busdevfn; + unsigned long rom = 0; unsigned char *buf; unsigned int size = 64*1024; int i; @@ -334,7 +334,7 @@ #warning fix rom address rom = 0xc0000; pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); - printk(BIOS_DEBUG, "rom base, size: %x\n", rom); + printk(BIOS_DEBUG, "rom base, size: %p\n", (void *)rom); buf = (unsigned char *) rom; if ((buf[0] == 0x55) && (buf[1] == 0xaa)) {

1 0

[LinuxBIOS] r461 - in LinuxBIOSv3: . util/lar
by svn＠openbios.org 21 Jul '07

21 Jul '07

Author: stepan Date: 2007-07-21 16:33:54 +0200 (Sat, 21 Jul 2007) New Revision: 461 Modified: LinuxBIOSv3/Makefile LinuxBIOSv3/util/lar/lib.c Log: - adds missing include - test(1) doesn't understand == on Solaris, but = seems to be equivalent Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: LinuxBIOSv3/Makefile =================================================================== --- LinuxBIOSv3/Makefile 2007-07-20 14:03:39 UTC (rev 460) +++ LinuxBIOSv3/Makefile 2007-07-21 14:33:54 UTC (rev 461) @@ -146,7 +146,7 @@ $(Q)printf "#define LINUXBIOS_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.h $(Q)printf "#define LINUXBIOS_COMPILE_BY \"$(shell PATH=$$PATH:/usr/ucb whoami)\"\n" >> $(obj)/build.h $(Q)printf "#define LINUXBIOS_COMPILE_HOST \"$(shell hostname)\"\n" >> $(obj)/build.h - $(Q)printf "#define LINUXBIOS_COMPILE_DOMAIN \"$(shell test `uname -s` == "Linux" && dnsdomainname || domainname)\"\n" >> $(obj)/build.h + $(Q)printf "#define LINUXBIOS_COMPILE_DOMAIN \"$(shell test `uname -s` = "Linux" && dnsdomainname || domainname)\"\n" >> $(obj)/build.h clean: $(Q)printf " CLEAN $(subst $(shell pwd)/,,$(obj))\n" Modified: LinuxBIOSv3/util/lar/lib.c =================================================================== --- LinuxBIOSv3/util/lar/lib.c 2007-07-20 14:03:39 UTC (rev 460) +++ LinuxBIOSv3/util/lar/lib.c 2007-07-21 14:33:54 UTC (rev 461) @@ -25,6 +25,7 @@ #include <unistd.h> #include <dirent.h> #include <errno.h> +#include <limits.h> #include <sys/stat.h> #include <sys/types.h>

1 0

Re: [LinuxBIOS] [v3][PATCH] have a static initram improvements.
by Stefan Reinauer 21 Jul '07

21 Jul '07

This is a simple example how to statically link printk into initram. It grows initram by incredible 2000 bytes here. So yes, this is a solution for now. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Index: mainboard/emulation/qemu-x86/Makefile =================================================================== --- mainboard/emulation/qemu-x86/Makefile (revision 459) +++ mainboard/emulation/qemu-x86/Makefile (working copy) @@ -39,11 +39,14 @@ # INITRAM_OBJ = $(obj)/mainboard/$(MAINBOARDDIR)/initram.o +INITRAM_OBJ := $(INITRAM_OBJ) $(obj)/lib/console.o +INITRAM_OBJ := $(INITRAM_OBJ) $(obj)/lib/vtxprintf.o +INITRAM_OBJ := $(INITRAM_OBJ) $(obj)/lib/uart8250.o $(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(INITRAM_OBJ) $(Q)# initram links against stage0 $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(LD) -R $(obj)/stage0.o -Ttext 0x80000 $(INITRAM_OBJ) \ + $(Q)$(LD) -Ttext 0x80000 $(INITRAM_OBJ) \ --entry=main -o $(obj)/linuxbios.initram.o $(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n" $(Q)$(OBJCOPY) -O binary $(obj)/linuxbios.initram.o \ -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/

5 8

[LinuxBIOS] missing header
by Marc Jones 20 Jul '07

20 Jul '07

FYI, I just found that arch/x86/keyboards.c is missing a header. I will let the header/history gurus handle it. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors

1 1

[LinuxBIOS] [v3][PATCH] stage0 and stage1 cleanup and improvements.
by Marc Jones 20 Jul '07

20 Jul '07

This patch gets Geode LX into initram. It also cleans up some of the generic stage0 and stage1 code for getting through CAR and initram. At this point I need some help. We get into initram but I think that there is a link problem where the first function call to post_code() is past the beginning of the ROM. I see the following: lar finds normal/initram at 0xFFFC4B20 The call to 0xFFFC4B20 works and we are executing initram. The call to post_code() is to 0xFFF427d4 <--- BAD! Also, There aren't any map files being generated. I think that they would be helpful in debugging stuff like this. Any volunteers better at makefiles than I am? Marc -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Stage0 and Stage1 improvements. Gets Geode LX into initram. Use LAR XIP. Add disable_CAR(). Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: LinuxBIOSv3/arch/x86/geodelx/stage0.S =================================================================== --- LinuxBIOSv3.orig/arch/x86/geodelx/stage0.S 2007-07-18 13:13:59.000000000 -0600 +++ LinuxBIOSv3/arch/x86/geodelx/stage0.S 2007-07-18 13:27:39.000000000 -0600 @@ -205,7 +205,7 @@ /* In LX DCDIS is set after POR which disables the cache..., clear * this bit. */ - movl CPU_DM_CONFIG0,%ecx + movl $CPU_DM_CONFIG0,%ecx rdmsr /* TODO: Make consistent with i$ init, either whole reg = 0, or just @@ -368,16 +368,6 @@ jmp DCacheSetupBad DCacheSetupGood: - /* If you wanted to maintain the stack in memory you would need to - * set the tags as dirty so the wbinvd would push out the old stack - * contents to memory. - */ - /* Clear the cache, the following code from crt0.S.lb will setup - * a new stack. - * TODO: There is no crt0.S.lb (anymore?). - */ - wbinvd - /* At this point, CAR should be working. */ movl $(LX_STACK_END), %eax movl %eax, %esp @@ -395,21 +385,9 @@ /* We need to set ebp? No need. */ movl %esp, %ebp pushl %eax /* BIST */ - call stage1_main + jmp stage1_main /* We will not go back. */ -fixed_mtrr_msr: - .long 0x250, 0x258, 0x259 - .long 0x268, 0x269, 0x26A - .long 0x26B, 0x26C, 0x26D - .long 0x26E, 0x26F -var_mtrr_msr: - .long 0x200, 0x201, 0x202, 0x203 - .long 0x204, 0x205, 0x206, 0x207 - .long 0x208, 0x209, 0x20A, 0x20B - .long 0x20C, 0x20D, 0x20E, 0x20F - .long 0x000 /* NULL, end of table */ - /* Reset vector. */ /* Index: LinuxBIOSv3/arch/x86/geodelx/stage1.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/geodelx/stage1.c 2007-07-18 13:13:59.000000000 -0600 +++ LinuxBIOSv3/arch/x86/geodelx/stage1.c 2007-07-18 13:27:39.000000000 -0600 @@ -27,29 +27,39 @@ u32 msrnum; struct msr msr; } msr_table[] = { - /* Setup access to the cache for under 1MB. */ + /* Setup access to cache under 1MB. */ {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, // 0x00000-0xA0000 {CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xA0000-0xBFFFF {CPU_RCONF_C0_DF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xC0000-0xDFFFF {CPU_RCONF_E0_FF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xE0000-0xFFFFF - /* Setup access to the cache for under 640KB. */ + /* Setup access to memory under 1MB. Note: VGA hole at 0xA0000-0xBFFFF */ {MSR_GLIU0_BASE1, {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF {MSR_GLIU0_BASE2, {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF + {MSR_GLIU0_SHADOW, {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF {MSR_GLIU1_BASE1, {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF {MSR_GLIU1_BASE2, {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF + {MSR_GLIU1_SHADOW, {.hi = 0x2000FFFF,.lo = 0xFFFF0003}}, // 0xC0000-0xFFFFF }; /** - * Set up Geode LX registers for sane behaviour. - * - * Set all low memory (under 1MB) to write-back cacheable. Do some setup for - * Cache-as-RAM (CAR) as well. Note: The memory controller is not set up, yet. - */ + * Set up Geode LX registers for sane behaviour. + */ void geodelx_msr_init(void) { +} + +/** + * Disable Cache As RAM(CAR) after memory is setup. + * Geode can write back the cache contents to RAM and continue on. + * Assumes that anything in the cache was under 1MB. + */ +void disable_car(void) +{ int i; for (i = 0; i < ARRAY_SIZE(msr_table); i++) wrmsr(msr_table[i].msrnum, msr_table[i].msr); + + __asm__("wbinvd\n"); } Index: LinuxBIOSv3/arch/x86/mc146818rtc.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/mc146818rtc.c 2007-07-18 13:26:38.000000000 -0600 +++ LinuxBIOSv3/arch/x86/mc146818rtc.c 2007-07-18 13:27:39.000000000 -0600 @@ -280,7 +280,7 @@ * Check CMOS for normal or fallback boot mode. * Use lxbios to set normal mode once the system is operational. */ -int do_normal_boot(void) +int check_normal_boot_flag(void) { u8 byte; @@ -321,7 +321,7 @@ /* Save the boot byte */ CMOS_WRITE(byte, RTC_BOOT_BYTE); - return (byte & RTC_LAST_BOOT_FLAG_SET); + return (byte & RTC_NORMAL_BOOT_FLAG_SET); } Index: LinuxBIOSv3/arch/x86/stage1.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/stage1.c 2007-07-18 13:13:59.000000000 -0600 +++ LinuxBIOSv3/arch/x86/stage1.c 2007-07-18 12:34:15.000000000 -0600 @@ -2,6 +2,7 @@ * This file is part of the LinuxBIOS project. * * Copyright (C) 2007 Stefan Reinauer <stepan(a)coresystems.de> + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -32,10 +33,7 @@ void die(const char *msg); int find_file(struct mem_file *archive, char *filename, struct mem_file *result); void hardware_stage1(void); - -// Is this value correct? -#define DCACHE_RAM_SIZE 0x8000 - +void disable_car(void); void post_code(u8 value) { @@ -78,7 +76,7 @@ post_code(0x02); - // before we do anything, we want to stop if we dont run + // before we do anything, we want to stop if we dont run // on the bootstrap processor. if (bist==0) { // stop secondaries @@ -87,7 +85,7 @@ // We have cache as ram running and can start executing code in C. // - + hardware_stage1(); // @@ -101,29 +99,37 @@ // enable rom enable_rom(); - + // location and size of image. - + // FIXME this should be defined in the VPD area // but NOT IN THE CODE. - + /* The len field starts behind the reset vector on x86. * The start is not correct for all platforms. sc520 will - * need some hands on here. + * need some hands on here. */ archive.len = *(u32 *)0xfffffff4; - archive.start =(void *)(0UL-archive.len); + archive.start =(void *)(0UL-archive.len); // FIXME check integrity // find first initram - if (last_boot_normal()) { + if (check_normal_boot_flag()) { printk(BIOS_DEBUG, "Choosing normal boot.\n"); - ret = run_file(&archive, "normal/initram", (void *)(512*1024)); //CONFIG_CARBASE; + ret = execute_in_place(&archive, "normal/initram"); } else { printk(BIOS_DEBUG, "Choosing fallback boot.\n"); - ret = run_file(&archive, "fallback/initram", (void *)(512*1024)); //CONFIG_CARBASE; + ret = execute_in_place(&archive, "fallback/initram"); + /* Try a normal boot if fallback doesn't exists in the lar. + * TODO: There are other ways to do this. + * It could be ifdef or the boot flag could be forced. + */ + if (ret) { + printk(BIOS_DEBUG, "Fallback failed. Try normal boot\n"); + ret = execute_in_place(&archive, "normal/initram"); + } } if (ret) @@ -132,97 +138,8 @@ printk(BIOS_DEBUG, "Done RAM init code\n"); - /* Turn off Cache-As-Ram, and do some other things. - * - * This has to be done inline -- You can't call a function because the - * return stack does not survive. - */ - - __asm__ volatile ( - /* - FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that. - It is only needed if we want to go back - */ - - /* We don't need cache as ram for now on */ - /* disable cache */ - "movl %cr0, %eax\n\t" - "orl $(0x1<<30),%eax\n\t" - "movl %eax, %cr0\n\t" - - /* clear sth */ - "movl $0x269, %ecx\n\t" /* fix4k_c8000*/ - "xorl %edx, %edx\n\t" - "xorl %eax, %eax\n\t" - "wrmsr\n\t" -#if DCACHE_RAM_SIZE > 0x8000 - "movl $0x268, %ecx\n\t" /* fix4k_c0000*/ - "wrmsr\n\t" -#endif - - /* Set the default memory type and disable fixed and enable variable MTRRs */ - "movl $0x2ff, %ecx\n\t" -// "movl $MTRRdefType_MSR, %ecx\n\t" - "xorl %edx, %edx\n\t" - /* Enable Variable and Disable Fixed MTRRs */ - "movl $0x00000800, %eax\n\t" - "wrmsr\n\t" - -#if defined(CLEAR_FIRST_1M_RAM) - /* enable caching for first 1M using variable mtrr */ - "movl $0x200, %ecx\n\t" - "xorl %edx, %edx\n\t" - "movl $(0 | 1), %eax\n\t" -// "movl $(0 | MTRR_TYPE_WRCOMB), %eax\n\t" - "wrmsr\n\t" - - "movl $0x201, %ecx\n\t" - "movl $0x0000000f, %edx\n\t" /* AMD 40 bit 0xff*/ - "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t" - "wrmsr\n\t" -#endif - - /* enable cache */ - "movl %cr0, %eax\n\t" - "andl $0x9fffffff,%eax\n\t" - "movl %eax, %cr0\n\t" -#if defined(CLEAR_FIRST_1M_RAM) - /* clear the first 1M */ - "movl $0x0, %edi\n\t" - "cld\n\t" - "movl $(0x100000>>2), %ecx\n\t" - "xorl %eax, %eax\n\t" - "rep stosl\n\t" - - /* disable cache */ - "movl %cr0, %eax\n\t" - "orl $(0x1<<30),%eax\n\t" - "movl %eax, %cr0\n\t" - - /* enable caching for first 1M using variable mtrr */ - "movl $0x200, %ecx\n\t" - "xorl %edx, %edx\n\t" - "movl $(0 | 6), %eax\n\t" -// "movl $(0 | MTRR_TYPE_WRBACK), %eax\n\t" - "wrmsr\n\t" - - "movl $0x201, %ecx\n\t" - "movl $0x0000000f, %edx\n\t" /* AMD 40 bit 0xff*/ - "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t" - "wrmsr\n\t" - - /* enable cache */ - "movl %cr0, %eax\n\t" - "andl $0x9fffffff,%eax\n\t" - "movl %eax, %cr0\n\t" - "invd\n\t" - - /* - FIXME: I hope we don't need to change esp and ebp value here, so we can restore value from mmx sse back - But the problem is the range is some io related, So don't go back - */ -#endif - ); + /* Turn off Cache-As-Ram */ + disable_car(); ret = run_file(&archive, "normal/stage2", (void *)0x1000); if (ret) Index: LinuxBIOSv3/include/mc146818rtc.h =================================================================== --- LinuxBIOSv3.orig/include/mc146818rtc.h 2007-07-18 13:26:23.000000000 -0600 +++ LinuxBIOSv3/include/mc146818rtc.h 2007-07-18 13:27:39.000000000 -0600 @@ -120,6 +120,6 @@ void rtc_init(int invalid); int get_option(void *dest, char *name); int last_boot_normal(void); -int do_normal_boot(void); +int check_normal_boot_flag(void); #endif /* MC146818RTC_H */ Index: LinuxBIOSv3/mainboard/emulation/qemu-x86/stage1.c =================================================================== --- LinuxBIOSv3.orig/mainboard/emulation/qemu-x86/stage1.c 2007-07-18 13:13:59.000000000 -0600 +++ LinuxBIOSv3/mainboard/emulation/qemu-x86/stage1.c 2007-07-18 13:27:39.000000000 -0600 @@ -17,12 +17,13 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* no printk allowed until hardware is ready; hardware is ready */ /** - * Start up hardware needed for stage1. - * - * No printk() allowed until hardware is ready; hardware is ready. - * TODO: Fix above comment? It's unclear. + * start up hardware needed for stage1 */ void hardware_stage1(void) { } +void disable_car(void) +{ +}

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coreboot July 2007