coreboot July 2007

coreboot@coreboot.org

73 participants
208 discussions

[LinuxBIOS] Need help with flashrom
by Markus Boas 26 Jul '07

26 Jul '07

Hi I try to write support for the winbond W29C040C I can somehow erase, but nor write or read. It reads the 512 kb, but awardecode finde nothing. So has somebody time and will help me? Greedings Markus

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[LinuxBIOS] LILUG Formally Invites LinuxBIOS
by John Teddy 25 Jul '07

25 Jul '07

To Whom It May Concern, LILUG would like to formally invite the LinuxBIOS project to give a talk at Farmingdale State College, Farmingdale, NY, USA. Our talks typically run for about 45 minutes, and about 15 minutes of questions/answers are optional. We have a projector you can hook your laptop up to, or you don't have a laptop we have a computer you're able to use. Typically we have about 50 or 60 LILUG members at the meeting place. We also record the speaker usually and put a .ogg(theora+vorbis) file on the Internet ( archive.org ) for people to access who aren't able to make the meeting. If you do not wish to be recorded you will not be. We have general meetings on the second Tuesday of every month at 8pm. Our website is located at www.lilug.org . Directions to the location can be found here: http://www.lilug.org/index.php/Directions . If you take the rail, I will be picking you up and escorting you to the campus and then back after the meeting. Our next available general meeting is September 11th, 2007. If someone from LinuxBIOS project is able to give a talk please contact me via e-mail and we can work out the date/time(if a later date is desired) and topic. If more convenient I can be contacted on irc.freenode.net as the alias "sid". Regards, John Teddy

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[LinuxBIOS] lspci Output from MSI P965 Platinum
by Declan Gannon 25 Jul '07

25 Jul '07

I am not sure where precisely I should send this information.....so I thought this might be a start. it is the output from my MSI mobo. I am new to Linux and am currently running PClinuxOS....I only encountered the notion of a linuxBIOS while searching some of the Linux sites for as much info as I can swallow (far too much for me sometimes....or rather most of the time). Apologies in advance if it is the wrong place # dmidecode 2.8 SMBIOS 2.4 present. 27 structures occupying 1343 bytes. Table at 0x000FC270. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: American Megatrends Inc. Version: V1.2 Release Date: 11/08/2006 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 1024 kB Characteristics: ISA is supported PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported BIOS Revision: 8.14 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: MICRO-STAR INT'L Product Name: MS-7238 Version: 110 Serial Number: To Be Filled By O.E.M. UUID: 00020003-0004-0005-0006-000700080009 Wake-up Type: Power Switch SKU Number: To Be Filled By O.E.M. Family: To Be Filled By O.E.M. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: MICRO-STAR INT'L Product Name: MS-7238 Version: 110 Serial Number: To be filled by O.E.M. Asset Tag: To Be Filled By O.E.M. Features: Board is a hosting board Board is replaceable Location In Chassis: To Be Filled By O.E.M. Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Handle 0x0003, DMI type 3, 21 bytes Chassis Information Manufacturer: MICRO-STAR INT'L Type: Desktop Lock: Not Present Version: To Be Filled By O.E.M. Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000000 Heigth: Unspecified Number Of Power Cords: 1 Contained Elements: 0 Handle 0x0004, DMI type 4, 35 bytes Processor Information Socket Designation: CPU 1 Type: Central Processor Family: <OUT OF SPEC> Manufacturer: Intel ID: F6 06 00 00 FF FB EB BF Version: Intel(R) Core(TM)2 CPU 6700 @ 2.66GHz Voltage: 1.3 V External Clock: 266 MHz Max Speed: 2666 MHz Current Speed: 2666 MHz Status: Populated, Enabled Upgrade: Other L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: 0x0007 Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Part Number: To Be Filled By O.E.M. Handle 0x0005, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Write Back Location: Internal Installed Size: 64 KB Maximum Size: 64 KB Supported SRAM Types: Other Installed SRAM Type: Other Speed: Unknown Error Correction Type: Parity System Type: Data Associativity: 8-way Set-associative Handle 0x0006, DMI type 7, 19 bytes Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Write Back Location: Internal Installed Size: 4096 KB Maximum Size: 4096 KB Supported SRAM Types: Other Installed SRAM Type: Other Speed: Unknown Error Correction Type: Single-bit ECC System Type: Instruction Associativity: 8-way Set-associative Handle 0x0007, DMI type 7, 19 bytes Cache Information Socket Designation: L3-Cache Configuration: Disabled, Not Socketed, Level 3 Operational Mode: Unknown Location: Internal Installed Size: 0 KB Maximum Size: 0 KB Supported SRAM Types: Unknown Installed SRAM Type: Unknown Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown Handle 0x0008, DMI type 5, 24 bytes Memory Controller Information Error Detecting Method: 64-bit ECC Error Correcting Capabilities: None Supported Interleave: One-way Interleave Current Interleave: One-way Interleave Maximum Memory Module Size: 4096 MB Maximum Total Memory Size: 16384 MB Supported Speeds: Other Supported Memory Types: DIMM SDRAM Memory Module Voltage: 3.3 V Associated Memory Slots: 4 0x0009 0x000A 0x000B 0x000C Enabled Error Correcting Capabilities: None Handle 0x0009, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM0 Bank Connections: 0 1 Current Speed: Unknown Type: DIMM SDRAM Installed Size: 1024 MB (Double-bank Connection) Enabled Size: 1024 MB (Double-bank Connection) Error Status: OK Handle 0x000A, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM1 Bank Connections: 2 3 Current Speed: Unknown Type: DIMM SDRAM Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x000B, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM2 Bank Connections: 4 5 Current Speed: Unknown Type: DIMM SDRAM Installed Size: 1024 MB (Double-bank Connection) Enabled Size: 1024 MB (Double-bank Connection) Error Status: OK Handle 0x000C, DMI type 6, 12 bytes Memory Module Information Socket Designation: DIMM3 Bank Connections: 6 7 Current Speed: Unknown Type: DIMM SDRAM Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x000D, DMI type 13, 22 bytes BIOS Language Information Installable Languages: 1 en|US|iso8859-1 Currently Installed Language: en|US|iso8859-1 Handle 0x000E, DMI type 15, 35 bytes System Event Log Area Length: 4 bytes Header Start Offset: 0x0000 Header Length: 2 bytes Data Start Offset: 0x0002 Access Method: Indexed I/O, one 16-bit index port, one 8-bit data port Access Address: Index 0x046A, Data 0x046C Status: Invalid, Not Full Change Token: 0x00000000 Header Format: No Header Supported Log Type Descriptors: 6 Descriptor 1: End of log Data Format 1: OEM-specific Descriptor 2: End of log Data Format 2: OEM-specific Descriptor 3: End of log Data Format 3: OEM-specific Descriptor 4: End of log Data Format 4: OEM-specific Descriptor 5: End of log Data Format 5: OEM-specific Descriptor 6: End of log Data Format 6: OEM-specific Handle 0x000F, DMI type 16, 15 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 4 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x0010, DMI type 19, 15 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0007FFFFFFF Range Size: 2 GB Physical Array Handle: 0x000F Partition Width: 0 Handle 0x0011, DMI type 17, 27 bytes Memory Device Array Handle: 0x000F Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: DIMM0 Bank Locator: BANK0 Type: SDRAM Type Detail: Synchronous Speed: Unknown Manufacturer: Manufacturer0 Serial Number: SerNum0 Asset Tag: AssetTagNum0 Part Number: PartNum0 Handle 0x0012, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Device Handle: 0x0011 Memory Array Mapped Address Handle: 0x0010 Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0013, DMI type 17, 27 bytes Memory Device Array Handle: 0x000F Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM1 Bank Locator: BANK1 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer1 Serial Number: SerNum1 Asset Tag: AssetTagNum1 Part Number: PartNum1 Handle 0x0014, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0013 Memory Array Mapped Address Handle: 0x0010 Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0015, DMI type 17, 27 bytes Memory Device Array Handle: 0x000F Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 1024 MB Form Factor: DIMM Set: None Locator: DIMM2 Bank Locator: BANK2 Type: SDRAM Type Detail: Synchronous Speed: Unknown Manufacturer: Manufacturer2 Serial Number: SerNum2 Asset Tag: AssetTagNum2 Part Number: PartNum2 Handle 0x0016, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00040000000 Ending Address: 0x0007FFFFFFF Range Size: 1 GB Physical Device Handle: 0x0015 Memory Array Mapped Address Handle: 0x0010 Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0017, DMI type 17, 27 bytes Memory Device Array Handle: 0x000F Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM3 Bank Locator: BANK3 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer3 Serial Number: SerNum3 Asset Tag: AssetTagNum3 Part Number: PartNum3 Handle 0x0018, DMI type 20, 19 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0017 Memory Array Mapped Address Handle: 0x0010 Partition Row Position: 1 Interleaved Data Depth: 1 Handle 0x0019, DMI type 32, 20 bytes System Boot Information Status: No errors detected Handle 0x001A, DMI type 127, 4 bytes End Of Table lspci -n 00:00.0 0600: 8086:29a0 (rev 02) 00:01.0 0604: 8086:29a1 (rev 02) 00:1a.0 0c03: 8086:2834 (rev 02) 00:1a.1 0c03: 8086:2835 (rev 02) 00:1a.7 0c03: 8086:283a (rev 02) 00:1b.0 0403: 8086:284b (rev 02) 00:1c.0 0604: 8086:283f (rev 02) 00:1c.4 0604: 8086:2847 (rev 02) 00:1c.5 0604: 8086:2849 (rev 02) 00:1d.0 0c03: 8086:2830 (rev 02) 00:1d.1 0c03: 8086:2831 (rev 02) 00:1d.2 0c03: 8086:2832 (rev 02) 00:1d.7 0c03: 8086:2836 (rev 02) 00:1e.0 0604: 8086:244e (rev f2) 00:1f.0 0601: 8086:2810 (rev 02) 00:1f.2 0101: 8086:2820 (rev 02) 00:1f.3 0c05: 8086:283e (rev 02) 00:1f.5 0101: 8086:2825 (rev 02) 01:00.0 0300: 10de:0391 (rev a1) 03:00.0 0101: 197b:2361 (rev 02) 03:00.1 0101: 197b:2361 (rev 02) 04:00.0 0200: 10ec:8168 (rev 01) 05:04.0 0c00: 1106:3044 (rev 80) lspci -v 00:00.0 Host bridge: Intel Corporation 82P965/G965 Memory Controller Hub (rev 02 ) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, fast devsel, latency 0 Capabilities: [e0] Vendor Specific Information 00:01.0 PCI bridge: Intel Corporation 82P965/G965 PCI Express Root Port (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: fc000000-fe8fffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Capabilities: [88] Subsystem: Intel Corporation Unknown device 0000 Capabilities: [80] Power Management version 3 Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [a0] Express Root Port (Slot+) IRQ 0 00:1a.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Contolle r #4 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 16 I/O ports at ac00 [size=32] 00:1a.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #5 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 19 I/O ports at a880 [size=32] 00:1a.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Control ler #2 (rev 02) (prog-if 20 [EHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 21 Memory at fbfffc00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port 00:1b.0 Audio device: Intel Corporation 82801H (ICH8 Family) HD Audio Controller (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, fast devsel, latency 0, IRQ 23 Memory at fbff8000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Capabilities: [70] Express Unknown type IRQ 0 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: fe900000-fe9fffff Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1c.5 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 6 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fea00000-feafffff Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1d.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #1 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 20 I/O ports at a800 [size=32] 00:1d.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #2 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 18 I/O ports at a480 [size=32] 00:1d.2 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #3 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 21 I/O ports at a400 [size=32] 00:1d.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Control ler #1 (rev 02) (prog-if 20 [EHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 20 Memory at fbfff800 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev f2) (prog-if 01 [Sub tractive decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=32 I/O behind bridge: 0000e000-0000efff Memory behind bridge: feb00000-febfffff Capabilities: [50] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 00:1f.0 ISA bridge: Intel Corporation 82801HB/HR (ICH8/R) LPC Interface Controll er (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0 Capabilities: [e0] Vendor Specific Information 00:1f.2 IDE interface: Intel Corporation 82801H (ICH8 Family) 4 port SATA IDE Co ntroller (rev 02) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 18 I/O ports at a080 [size=8] I/O ports at a000 [size=4] I/O ports at 9c00 [size=8] I/O ports at 9880 [size=4] I/O ports at 9800 [size=16] I/O ports at 9480 [size=16] Capabilities: [70] Power Management version 3 00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: medium devsel, IRQ 5 Memory at fbfff400 (32-bit, non-prefetchable) [size=256] I/O ports at 0400 [size=32] 00:1f.5 IDE interface: Intel Corporation 82801H (ICH8 Family) 2 port SATA IDE Co ntroller (rev 02) (prog-if 85 [Master SecO PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 18 I/O ports at 9080 [size=8] I/O ports at 9000 [size=4] I/O ports at 8c00 [size=8] I/O ports at 8880 [size=4] I/O ports at 8800 [size=16] I/O ports at 8480 [size=16] Capabilities: [70] Power Management version 3 01:00.0 VGA compatible controller: nVidia Corporation G70 [GeForce 7600 GT] (rev a1) (prog-if 00 [VGA]) Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at fc000000 (64-bit, non-prefetchable) [size=16M] I/O ports at bc00 [size=128] [virtual] Expansion ROM at fe8e0000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Capabilities: [78] Express Endpoint IRQ 0 03:00.0 IDE interface: JMicron Technologies, Inc. JMB361 AHCI/IDE (rev 02) (prog -if 01 [PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7246 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fe9fe000 (32-bit, non-prefetchable) [size=8K] Expansion ROM at fe9e0000 [disabled] [size=64K] Capabilities: [68] Power Management version 2 Capabilities: [50] Express Legacy Endpoint IRQ 1 03:00.1 IDE interface: JMicron Technologies, Inc. JMB361 AHCI/IDE (rev 02) (prog -if 85 [Master SecO PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7246 Flags: bus master, fast devsel, latency 0, IRQ 17 I/O ports at cc00 [size=8] I/O ports at c880 [size=4] I/O ports at c800 [size=8] I/O ports at c480 [size=4] I/O ports at c400 [size=16] Capabilities: [68] Power Management version 2 04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI E xpress Gigabit Ethernet controller (rev 01) Subsystem: Micro-Star International Co., Ltd. Unknown device 238c Flags: bus master, fast devsel, latency 0, IRQ 17 I/O ports at d800 [size=256] Memory at feaff000 (64-bit, non-prefetchable) [size=4K] Expansion ROM at feac0000 [disabled] [size=128K] Capabilities: [40] Power Management version 2 Capabilities: [48] Vital Product Data Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Capabilities: [60] Express Endpoint IRQ 0 Capabilities: [84] Vendor Specific Information 05:04.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host Controller ( rev 80) (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 238d Flags: bus master, medium devsel, latency 64, IRQ 22 Memory at febff800 (32-bit, non-prefetchable) [size=2K] I/O ports at ec00 [size=128] Capabilities: [50] Power Management version 2 lspci -v 00:00.0 Host bridge: Intel Corporation 82P965/G965 Memory Controller Hub (rev 02 ) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, fast devsel, latency 0 Capabilities: [e0] Vendor Specific Information 00:01.0 PCI bridge: Intel Corporation 82P965/G965 PCI Express Root Port (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: fc000000-fe8fffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Capabilities: [88] Subsystem: Intel Corporation Unknown device 0000 Capabilities: [80] Power Management version 3 Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [a0] Express Root Port (Slot+) IRQ 0 00:1a.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Contolle r #4 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 16 I/O ports at ac00 [size=32] 00:1a.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #5 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 19 I/O ports at a880 [size=32] 00:1a.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Control ler #2 (rev 02) (prog-if 20 [EHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 21 Memory at fbfffc00 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port 00:1b.0 Audio device: Intel Corporation 82801H (ICH8 Family) HD Audio Controller (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, fast devsel, latency 0, IRQ 23 Memory at fbff8000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Capabilities: [60] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Capabilities: [70] Express Unknown type IRQ 0 00:1c.0 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 1 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1c.4 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 5 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: fe900000-fe9fffff Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1c.5 PCI bridge: Intel Corporation 82801H (ICH8 Family) PCI Express Port 6 (r ev 02) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fea00000-feafffff Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- Capabilities: [90] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Capabilities: [a0] Power Management version 2 00:1d.0 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #1 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 20 I/O ports at a800 [size=32] 00:1d.1 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #2 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 18 I/O ports at a480 [size=32] 00:1d.2 USB Controller: Intel Corporation 82801H (ICH8 Family) USB UHCI Controll er #3 (rev 02) (prog-if 00 [UHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 21 I/O ports at a400 [size=32] 00:1d.7 USB Controller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Control ler #1 (rev 02) (prog-if 20 [EHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0, IRQ 20 Memory at fbfff800 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev f2) (prog-if 01 [Sub tractive decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=32 I/O behind bridge: 0000e000-0000efff Memory behind bridge: feb00000-febfffff Capabilities: [50] Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 00:1f.0 ISA bridge: Intel Corporation 82801HB/HR (ICH8/R) LPC Interface Controll er (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, medium devsel, latency 0 Capabilities: [e0] Vendor Specific Information 00:1f.2 IDE interface: Intel Corporation 82801H (ICH8 Family) 4 port SATA IDE Co ntroller (rev 02) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 18 I/O ports at a080 [size=8] I/O ports at a000 [size=4] I/O ports at 9c00 [size=8] I/O ports at 9880 [size=4] I/O ports at 9800 [size=16] I/O ports at 9480 [size=16] Capabilities: [70] Power Management version 3 00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 02) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: medium devsel, IRQ 5 Memory at fbfff400 (32-bit, non-prefetchable) [size=256] I/O ports at 0400 [size=32] 00:1f.5 IDE interface: Intel Corporation 82801H (ICH8 Family) 2 port SATA IDE Co ntroller (rev 02) (prog-if 85 [Master SecO PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7238 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 18 I/O ports at 9080 [size=8] I/O ports at 9000 [size=4] I/O ports at 8c00 [size=8] I/O ports at 8880 [size=4] I/O ports at 8800 [size=16] I/O ports at 8480 [size=16] Capabilities: [70] Power Management version 3 01:00.0 VGA compatible controller: nVidia Corporation G70 [GeForce 7600 GT] (rev a1) (prog-if 00 [VGA]) Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at fc000000 (64-bit, non-prefetchable) [size=16M] I/O ports at bc00 [size=128] [virtual] Expansion ROM at fe8e0000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Capabilities: [68] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Capabilities: [78] Express Endpoint IRQ 0 03:00.0 IDE interface: JMicron Technologies, Inc. JMB361 AHCI/IDE (rev 02) (prog -if 01 [PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7246 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fe9fe000 (32-bit, non-prefetchable) [size=8K] Expansion ROM at fe9e0000 [disabled] [size=64K] Capabilities: [68] Power Management version 2 Capabilities: [50] Express Legacy Endpoint IRQ 1 03:00.1 IDE interface: JMicron Technologies, Inc. JMB361 AHCI/IDE (rev 02) (prog -if 85 [Master SecO PriO]) Subsystem: Micro-Star International Co., Ltd. Unknown device 7246 Flags: bus master, fast devsel, latency 0, IRQ 17 I/O ports at cc00 [size=8] I/O ports at c880 [size=4] I/O ports at c800 [size=8] I/O ports at c480 [size=4] I/O ports at c400 [size=16] Capabilities: [68] Power Management version 2 04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI E xpress Gigabit Ethernet controller (rev 01) Subsystem: Micro-Star International Co., Ltd. Unknown device 238c Flags: bus master, fast devsel, latency 0, IRQ 17 I/O ports at d800 [size=256] Memory at feaff000 (64-bit, non-prefetchable) [size=4K] Expansion ROM at feac0000 [disabled] [size=128K] Capabilities: [40] Power Management version 2 Capabilities: [48] Vital Product Data Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable- Capabilities: [60] Express Endpoint IRQ 0 Capabilities: [84] Vendor Specific Information 05:04.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host Controller ( rev 80) (prog-if 10 [OHCI]) Subsystem: Micro-Star International Co., Ltd. Unknown device 238d Flags: bus master, medium devsel, latency 64, IRQ 22 Memory at febff800 (32-bit, non-prefetchable) [size=2K] I/O ports at ec00 [size=128] Capabilities: [50] Power Management version 2

2 1

[LinuxBIOS] r2741 build service
by LinuxBIOS information 25 Jul '07

25 Jul '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2741 to the LinuxBIOS source repository and caused the following changes: Change Log: This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by ST to flashrom. The patch is based on the data sheets of the chips and has not been tested at all. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=hdama&vendor=… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2741&device=dk8x&vendor=i… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] flashrom: Add support for 8 ST flash chips
by Carl-Daniel Hailfinger 25 Jul '07

25 Jul '07

This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by ST to flashrom. The patch is based on the data sheets of the chips and has not been tested at all. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: util/flashrom/flash.h =================================================================== --- util/flashrom/flash.h (Revision 2740) +++ util/flashrom/flash.h (Arbeitskopie) @@ -111,11 +111,19 @@ #define W_49V002FA 0x32 #define ST_ID 0x20 /* ST */ +#define ST_M50FLW040A 0x08 +#define ST_M50FLW040B 0x28 +#define ST_M50FLW080A 0x80 +#define ST_M50FLW080B 0x81 #define ST_M50FW040 0x2C +#define ST_M50FW080 0x2D +#define ST_M50FW016 0x2E +#define ST_M50LPW116 0x30 #define ST_M29F002B 0x34 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */ #define ST_M29F400BT 0xD5 #define ST_M29F040B 0xE2 +#define ST_M29W010B 0x23 #define ST_M29W040B 0xE3 #define EMST_ID 0x8c /* EMST / EFST */ Index: util/flashrom/flashchips.c =================================================================== --- util/flashrom/flashchips.c (Revision 2740) +++ util/flashrom/flashchips.c (Arbeitskopie) @@ -82,8 +82,6 @@ probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, {"SST49LF008A", SST_ID, SST_49LF008A, 1024, 64 * 1024 , probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"Pm49FL002", PMC_ID, PMC_49FL002, 256, 16 * 1024, - probe_jedec, erase_chip_jedec, write_49fl004}, {"SST49LF004C", SST_ID, SST_49LF004C, 512, 4 * 1024, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST49LF008C", SST_ID, SST_49LF008C, 1024, 4 * 1024 , @@ -92,6 +90,8 @@ probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024 , probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, + {"Pm49FL002", PMC_ID, PMC_49FL002, 256, 16 * 1024, + probe_jedec, erase_chip_jedec, write_49fl004}, {"Pm49FL004", PMC_ID, PMC_49FL004, 512, 64 * 1024, probe_jedec, erase_chip_jedec, write_49fl004}, {"W29C011", WINBOND_ID, W_29C011, 128, 128, @@ -122,6 +122,22 @@ probe_jedec, erase_chip_jedec, write_jedec}, {"M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024, probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt}, + {"M50FLW040A", ST_ID, ST_M50FLW040A, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW040B", ST_ID, ST_M50FLW040B, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW080A", ST_ID, ST_M50FLW080A, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW080B", ST_ID, ST_M50FLW080B, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FW080", ST_ID, ST_M50FW080, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FW016", ST_ID, ST_M50FW016, 2048, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50LPW116", ST_ID, ST_M50LPW116, 2048, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M29W010B", ST_ID, ST_M29W010B, 128, 16 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, {"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024, probe_29f040b, erase_29f040b, write_29f040b}, {"82802ab", 137, 173, 512, 64 * 1024,

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[LinuxBIOS] r2741 - trunk/util/flashrom
by svn＠openbios.org 25 Jul '07

25 Jul '07

Author: uwe Date: 2007-07-25 19:55:45 +0200 (Wed, 25 Jul 2007) New Revision: 2741 Modified: trunk/util/flashrom/flash.h trunk/util/flashrom/flashchips.c Log: This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by ST to flashrom. The patch is based on the data sheets of the chips and has not been tested at all. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2007-07-24 18:18:05 UTC (rev 2740) +++ trunk/util/flashrom/flash.h 2007-07-25 17:55:45 UTC (rev 2741) @@ -111,11 +111,19 @@ #define W_49V002FA 0x32 #define ST_ID 0x20 /* ST */ +#define ST_M50FLW040A 0x08 +#define ST_M50FLW040B 0x28 +#define ST_M50FLW080A 0x80 +#define ST_M50FLW080B 0x81 #define ST_M50FW040 0x2C +#define ST_M50FW080 0x2D +#define ST_M50FW016 0x2E +#define ST_M50LPW116 0x30 #define ST_M29F002B 0x34 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */ #define ST_M29F400BT 0xD5 #define ST_M29F040B 0xE2 +#define ST_M29W010B 0x23 #define ST_M29W040B 0xE3 #define EMST_ID 0x8c /* EMST / EFST */ Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2007-07-24 18:18:05 UTC (rev 2740) +++ trunk/util/flashrom/flashchips.c 2007-07-25 17:55:45 UTC (rev 2741) @@ -82,8 +82,6 @@ probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, {"SST49LF008A", SST_ID, SST_49LF008A, 1024, 64 * 1024 , probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, - {"Pm49FL002", PMC_ID, PMC_49FL002, 256, 16 * 1024, - probe_jedec, erase_chip_jedec, write_49fl004}, {"SST49LF004C", SST_ID, SST_49LF004C, 512, 4 * 1024, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST49LF008C", SST_ID, SST_49LF008C, 1024, 4 * 1024 , @@ -92,6 +90,8 @@ probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024 , probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, + {"Pm49FL002", PMC_ID, PMC_49FL002, 256, 16 * 1024, + probe_jedec, erase_chip_jedec, write_49fl004}, {"Pm49FL004", PMC_ID, PMC_49FL004, 512, 64 * 1024, probe_jedec, erase_chip_jedec, write_49fl004}, {"W29C011", WINBOND_ID, W_29C011, 128, 128, @@ -122,6 +122,22 @@ probe_jedec, erase_chip_jedec, write_jedec}, {"M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024, probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt}, + {"M50FLW040A", ST_ID, ST_M50FLW040A, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW040B", ST_ID, ST_M50FLW040B, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW080A", ST_ID, ST_M50FLW080A, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FLW080B", ST_ID, ST_M50FLW080B, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FW080", ST_ID, ST_M50FW080, 1024, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FW016", ST_ID, ST_M50FW016, 2048, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M50LPW116", ST_ID, ST_M50LPW116, 2048, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M29W010B", ST_ID, ST_M29W010B, 128, 16 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, {"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024, probe_29f040b, erase_29f040b, write_29f040b}, {"82802ab", 137, 173, 512, 64 * 1024,

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[LinuxBIOS] Check for compatibility
by MasterBrian 25 Jul '07

25 Jul '07

Greetings, I'm new to this project :) I've found it, while looking trough google for something that let me boot from usb. I would like to try the linuxbios on my notebook, but I need to be rasonable sure to do not make my computer unworking. So I will need your help to undestain if it is supported or not. (Of course I've read the compatibility list. no notebook mainboard appears, but the chipset looks like to be supported) I've a notebook hp pavilion zd 7050ea. Here is the output of lspci and cpuinfo: # lspci -v && cat /proc/cpuinfo 00:00.0 Host bridge: Intel Corporation 82865G/PE/P DRAM Controller/Host-Hub Interface (rev 02) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, fast devsel, latency 0 Memory at d8000000 (32-bit, prefetchable) [size=128M] Capabilities: [e4] Vendor Specific Information Capabilities: [a0] AGP version 3.0 00:01.0 PCI bridge: Intel Corporation 82865G/PE/P PCI to AGP Controller (rev 02) (prog-if 00 [Normal decode]) Flags: bus master, 66MHz, fast devsel, latency 96 Bus: primary=00, secondary=01, subordinate=01, sec-latency=80 Memory behind bridge: d1000000-d1ffffff Prefetchable memory behind bridge: e0000000-efffffff 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 (rev 02) (prog-if 00 [UHCI]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 16 I/O ports at 1cc0 [size=32] 00:1d.1 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2 (rev 02) (prog-if 00 [UHCI]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 19 I/O ports at 1ce0 [size=32] 00:1d.2 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3 (rev 02) (prog-if 00 [UHCI]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 18 I/O ports at 2000 [size=32] 00:1d.7 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller (rev 02) (prog-if 20 [EHCI]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 23 Memory at d0000000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=06, sec-latency=32 I/O behind bridge: 00003000-00003fff Memory behind bridge: d2000000-d23fffff Prefetchable memory behind bridge: 88000000-8bffffff 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge (rev 02) Flags: bus master, medium devsel, latency 0 00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE Controller (rev 02) (prog-if 8a [Master SecP PriP]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 17 I/O ports at 01f0 [size=8] I/O ports at 03f4 [size=1] I/O ports at 0170 [size=8] I/O ports at 0374 [size=1] I/O ports at 2040 [size=16] Memory at 8c000000 (32-bit, non-prefetchable) [size=1K] 00:1f.5 Multimedia audio controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller (rev 02) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 0, IRQ 17 I/O ports at 1400 [size=256] I/O ports at 1c80 [size=64] Memory at d0000c00 (32-bit, non-prefetchable) [size=512] Memory at d0000800 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 00:1f.6 Modem: Intel Corporation 82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller (rev 02) (prog-if 00 [Generic]) Subsystem: Hewlett-Packard Company NX9500 Flags: medium devsel, IRQ 17 I/O ports at 1800 [size=256] I/O ports at 1c00 [size=128] Capabilities: [50] Power Management version 2 01:00.0 VGA compatible controller: nVidia Corporation NV31M [GeForce FX Go5600] (rev a1) (prog-if 00 [VGA]) Subsystem: Hewlett-Packard Company Unknown device 006a Flags: bus master, 66MHz, medium devsel, latency 248, IRQ 16 Memory at d1000000 (32-bit, non-prefetchable) [size=16M] Memory at e0000000 (32-bit, prefetchable) [size=256M] Capabilities: [60] Power Management version 2 Capabilities: [44] AGP version 3.0 02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 32, IRQ 20 I/O ports at 3000 [size=256] Memory at d2007800 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 02:01.0 CardBus bridge: ENE Technology Inc CB-710/2/4 Cardbus Controller (rev 02) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 168, IRQ 17 Memory at d2006000 (32-bit, non-prefetchable) [size=4K] Bus: primary=02, secondary=03, subordinate=06, sec-latency=176 Memory window 0: 88000000-8bfff000 (prefetchable) Memory window 1: 90000000-93fff000 I/O window 0: 00003400-000034ff I/O window 1: 00003800-000038ff 16-bit legacy interface ports at 0001 02:01.1 FLASH memory: ENE Technology Inc CB710 Memory Card Reader Controller Subsystem: Hewlett-Packard Company NX9500 Flags: medium devsel, IRQ 18 I/O ports at 3c00 [size=128] Capabilities: [a0] Power Management version 2 02:02.0 FireWire (IEEE 1394): Texas Instruments TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: Hewlett-Packard Company NX9500 Flags: bus master, medium devsel, latency 32, IRQ 19 Memory at d2007000 (32-bit, non-prefetchable) [size=2K] Memory at d2000000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 02:03.0 Network controller: Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller (rev 02) Subsystem: Compaq Computer Corporation Unknown device 00e7 Flags: bus master, fast devsel, latency 168, IRQ 21 Memory at d2004000 (32-bit, non-prefetchable) [size=8K] Capabilities: [40] Power Management version 2 processor : 0 vendor_id : GenuineIntel cpu family : 15 model : 2 model name : Intel(R) Pentium(R) 4 CPU 2.80GHz stepping : 9 cpu MHz : 2800.000 cache size : 512 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 1 fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe cid xtpr bogomips : 5613.01 clflush size : 64 processor : 1 vendor_id : GenuineIntel cpu family : 15 model : 2 model name : Intel(R) Pentium(R) 4 CPU 2.80GHz stepping : 9 cpu MHz : 2800.000 cache size : 512 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 1 fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe cid xtpr bogomips : 5586.85 clflush size : 64 Thank you :)

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[LinuxBIOS] new target iei juki-511p/rocky-512
by Nikolay Petukhov 25 Jul '07

25 Jul '07

Hi, 2007/6/3, Stefan Reinauer <stepan(a)coresystems.de>: > Please sign off the patch according to > http://www.linuxbios.org/Development_Guidelines#Sign-off_Procedure > so we can check this patch in! Add sign-off. 2007/6/3, Juergen Beisert <juergen127(a)kreuzholzen.de>: > As your dmesg output shows, the graphical console is active. I missed > something to setup correctly. When my LinuxBIOS activates the VGA the linux > console runs as expected. Without it, everything seems ok, but no output > occures. I don't know why, yet. How You activates VGA in LinuxBios? 2007/6/3, Uwe Hermann <uwe(a)hermann-uwe.de>: > On Sun, Jun 03, 2007 at 12:20:10AM +0600, Nikolay Petukhov wrote: > > Problems: > > Filo load bzImage only from ide0. > > What does not work? ide1? AFAICS the boards only have one IDE port!? The this boards has two IDE ports. IDE0 has 40-pin IDE connector. IDE1 has CF connector. > > diff -Nru LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c > > --- LinuxBIOSv2-2700/src/mainboard/iei/juki511p/auto.c 1970-01-01 05:00:00.000000000 +0500 > > +++ LinuxBIOSv2-2700-juki/src/mainboard/iei/juki511p/auto.c 2007-06-02 20:02:10.000000000 +0600 > > Please rename the directory to 'juki-511p' if possible, as that seems to be > the canonical (lowercase'd) name used by the vendor. I had change directory name to 'juki_511p'. > > +#include "superio/winbond/w83977fa/w83977fa_early_serial.c" > > Maybe this should be 'w83977f' (without the 'a')? IIRC, we omitted any > '-A' or '-AW' suffix from other Super I/Os, too. Comments anyone? I agree. I did it. > > > > +void udelay(int usecs) > > +{ > > + int i; > > + for(i = 0; i < usecs; i++) > > + outb(i&0xff, 0x80); > > +} > > Is this needed? There's a global implementation in the repository > already. > I removed it. > > > + device pnp 3f0.4 on # RTC > > + end > > Is this ok if left empty? > > My 'lspnp -v' (on another mainboard) says: > > 00:04 PNP0b00 AT real-time clock > state = active > io 0x70-0x71 > irq 8 > > So maybe something like > > device pnp 3f0.4 on # RTC > io 0x60 = 0x70 > irq 0x70 = 8 > end > > is needed here? I'm just guessing, though, please correct me if I'm > wrong. > > > > + device pnp 3f0.5 on # Keyboard > > + io 0x60 = 0x60 > > + io 0x62 = 0x64 > > + irq 0x70 = 0x01 # int 1 for PS/2 keyboard > > + irq 0x72 = 0x0c # int 12 for PS/2 mouse > > Why not like this? Easier to read, IMHO: > > irq 0x70 = 1 # int 1 for PS/2 keyboard > irq 0x72 = 12 # int 12 for PS/2 mouse > > +const struct irq_routing_table intel_irq_routing_table = { > > + PIRQ_SIGNATURE, /* u32 signature */ > > + PIRQ_VERSION, /* u16 version */ > > + 32+16*2, /* There can be total 6 devices on the bus */ > ^ > typo? ---> 2? > > Maybe even > > 32+16*IRQ_SLOT_COUNT, /* There can be IRQ_SLOT_COUNT devices on the bus */ I corrected it. > > diff -Nru LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c > > --- LinuxBIOSv2-2700/src/northbridge/amd/gx1/raminit.c 2005-07-06 23:11:02.000000000 +0600 > > +++ LinuxBIOSv2-2700-juki/src/northbridge/amd/gx1/raminit.c 2007-05-31 16:06:40.000000000 +0600 > > @@ -324,6 +324,7 @@ > > outb(0x70, 0x80); > > > > setGX1Mem(GX_BASE + MC_MEM_CNTRL2, 0x000007d8); /* Disable all CLKS, Shift = 3 */ > > +// setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92080000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=2.5 */ > > setGX1Mem(GX_BASE + MC_MEM_CNTRL1, 0x92140000); /* MD_DS=2, MA_DS=2, CNTL_DS=2 SDCLKRATE=4 */ > > setGX1Mem(GX_BASE + MC_BANK_CFG, 0x00700070); /* No DIMMS installed */ > > setGX1Mem(GX_BASE + MC_SYNC_TIM1, 0x3a733225); /* LTMODE=3, RC=10, RAS=7, RP=3, RCD=3, RRD=2, DPL=2 */ > > OK, not sure what we should do with this. Will it break other GX1-based > mainboards? Or is it generic for all GX1s? I removed it. > > diff -Nru LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h > > --- LinuxBIOSv2-2700/src/superio/winbond/w83977fa/chip.h 1970-01-01 05:00:00.000000000 +0500 > > +++ LinuxBIOSv2-2700-juki/src/superio/winbond/w83977fa/chip.h 2007-06-02 18:52:57.000000000 +0600 > > Please provide an extra patch for the addition of the new Super I/O, > this is independant of the mainboards... > > > > diff -Nru LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb > > --- LinuxBIOSv2-2700/targets/iei/juki511p/Config.lb 1970-01-01 05:00:00.000000000 +0500 > > +++ LinuxBIOSv2-2700-juki/targets/iei/juki511p/Config.lb 2007-06-02 19:07:21.000000000 +0600 > > Please add a copyright header to this file, too. Signed-off-by: Nikolay Petukhov <nikolay.petukhov(a)gmail.com> -- Nikolay -----------------------------------------------------------------

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[LinuxBIOS] r2740 build service
by LinuxBIOS information 24 Jul '07

24 Jul '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2740 to the LinuxBIOS source repository and caused the following changes: Change Log: This patch adds support for ST M50FW040 and ST M29W040B to flashrom. Only reading from the chips was tested; writing support is untested. Thanks to Gürkan Sengün <gurkan(a)linuks.mine.nu> for testing! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=hdama&vendor=… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2740&device=dk8x&vendor=i… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] [PATCH] Enable flashrom support for ST M50FW040 and ST M29W040B
by Carl-Daniel Hailfinger 24 Jul '07

24 Jul '07

This patch adds support for ST M50FW040 and ST M29W040B to flashrom. Only reading from the chips was tested; writing support is untested. Thanks to Gürkan Sengün <gurkan(a)linuks.mine.nu> for testing! Signed-Off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: util/flashrom/flash.h =================================================================== --- util/flashrom/flash.h (Revision 2739) +++ util/flashrom/flash.h (Arbeitskopie) @@ -111,10 +111,12 @@ #define W_49V002FA 0x32 #define ST_ID 0x20 /* ST */ +#define ST_M50FW040 0x2C #define ST_M29F002B 0x34 #define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */ #define ST_M29F400BT 0xD5 #define ST_M29F040B 0xE2 +#define ST_M29W040B 0xE3 #define EMST_ID 0x8c /* EMST / EFST */ #define EMST_F49B002UA 0x00 Index: util/flashrom/flashchips.c =================================================================== --- util/flashrom/flashchips.c (Revision 2739) +++ util/flashrom/flashchips.c (Arbeitskopie) @@ -114,6 +114,10 @@ probe_jedec, erase_chip_jedec, write_39sf020}, {"M29F002B", ST_ID, ST_M29F002B, 256, 64 * 1024, probe_jedec, erase_chip_jedec, write_jedec}, + {"M50FW040", ST_ID, ST_M50FW040, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, + {"M29W040B", ST_ID, ST_M29W040B, 512, 64 * 1024, + probe_jedec, erase_chip_jedec, write_jedec}, {"M29F002T/NT", ST_ID, ST_M29F002T, 256, 64 * 1024, probe_jedec, erase_chip_jedec, write_jedec}, {"M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024,

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coreboot July 2007