coreboot July 2007

coreboot@coreboot.org

73 participants
208 discussions

Re: [LinuxBIOS] Is Asrock 775VM800 supported?
by Christian Sturm 01 Aug '07

01 Aug '07

Corey Osgood wrote: > At this time, no. vt8237r is a work in progress, but afaik > noone's working on the p4m800. Thanks for the answer! > Can you please send the output of lspci -n and lspci -xxx? Of course. # lspci -n 00:00.0 0600: 1106:0314 00:00.1 0600: 1106:1314 00:00.2 0600: 1106:2314 00:00.3 0600: 1106:3208 00:00.4 0600: 1106:4314 00:00.7 0600: 1106:7314 00:01.0 0604: 1106:b198 00:0f.0 0101: 1106:3149 (rev 80) 00:0f.1 0101: 1106:0571 (rev 06) 00:10.0 0c03: 1106:3038 (rev 81) 00:10.1 0c03: 1106:3038 (rev 81) 00:10.2 0c03: 1106:3038 (rev 81) 00:10.3 0c03: 1106:3038 (rev 81) 00:10.4 0c03: 1106:3104 (rev 86) 00:11.0 0601: 1106:3227 00:11.5 0401: 1106:3059 (rev 60) 00:12.0 0200: 1106:3065 (rev 78) 01:00.0 0300: 10de:0322 (rev a1) # lspci -xxx 00:00.0 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00: 06 11 14 03 06 00 30 22 00 00 00 06 00 08 80 00 10: 08 00 00 fc 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 03 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: c7 00 10 00 00 00 00 00 00 00 1f c4 00 04 00 01 50: 01 00 02 00 00 00 00 00 08 00 01 80 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 02 50 35 00 1b 0a 00 07 12 0b 00 00 00 00 00 00 90: 80 01 00 00 38 0f 01 00 00 00 5d 37 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 40 00 00 21 d2 00 8c c0: 01 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00: 06 11 14 13 06 00 00 02 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 13 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.2 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00: 06 11 14 23 06 00 00 02 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 23 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 88 7a ef 88 3e 16 01 41 00 20 00 00 00 b2 88 c7 60: ff ff 0f ff ff 0f ff 70 01 00 00 00 00 00 00 00 70: 44 44 44 44 3a 28 74 00 55 aa 24 55 55 6d 00 00 80: 1b 55 55 55 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.3 Host bridge: VIA Technologies, Inc. PT890 Host Bridge 00: 06 11 08 32 06 00 00 02 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 04 08 0c 10 00 00 00 00 00 04 08 0c 00 00 00 00 50: 22 00 11 1f 89 ab c5 67 00 00 00 00 00 00 00 00 60: 03 44 2a 0a 44 d9 80 00 00 83 54 10 08 c0 89 41 70: 00 00 00 00 03 03 00 b7 85 85 00 10 00 00 00 00 80: aa 00 ff 20 00 40 29 00 40 00 00 00 00 00 00 00 90: 02 05 03 02 00 00 00 00 31 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 66 f0 f0 02 80 00 00 00 00 00 00 00 54 55 00 00 e0: 66 00 55 00 99 00 44 00 ef 00 00 00 01 10 80 10 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.4 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00: 06 11 14 43 06 00 00 02 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 43 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 80 20 fb ff fe f0 f7 80 00 00 00 00 00 00 00 00 b0: 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 04 04 04 04 04 04 04 04 00 09 12 1b 00 00 00 00 e0: 12 12 12 12 00 00 00 00 0f 00 00 00 40 0b 3f 00 f0: 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00:00.7 Host bridge: VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro Host Bridge 00: 06 11 14 73 06 00 00 02 00 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 73 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 14 19 88 80 82 44 00 04 18 b9 88 80 82 44 00 00 50: 00 00 00 00 00 00 01 40 08 00 01 80 00 00 00 00 60: 00 aa 00 e0 00 00 00 00 00 00 00 00 00 00 00 00 70: 02 c8 ec 01 20 0f 50 2e 01 00 00 00 00 00 10 12 80: 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 90: 00 00 00 00 38 0f 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 23 65 aa a8 44 6b 68 66 01 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 40 29 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:01.0 PCI bridge: VIA Technologies, Inc. VT8237 PCI Bridge 00: 06 11 98 b1 07 01 30 02 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 20 62 20: e0 f9 e0 fb d0 e9 c0 f9 00 00 00 00 00 00 00 00 30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 0b 00 40: 83 c3 62 44 34 72 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 80: 0e 00 35 00 0b 0a 00 07 00 00 00 00 00 00 00 00 90: 80 00 00 00 00 0f 01 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 80 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0f.0 IDE interface: VIA Technologies, Inc. VIA VT6420 SATA RAID Controller (rev 80) 00: 06 11 49 31 07 00 90 02 80 8f 01 01 00 20 80 00 10: 01 d4 00 00 01 d0 00 00 01 cc 00 00 01 c8 00 00 20: 01 c4 00 00 01 c0 00 00 00 00 00 00 49 18 49 31 30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 02 00 00 40: 23 03 f1 44 0e af 00 00 00 82 65 03 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 10 10 00 05 00 10 00 60: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 01 00 01 10 10 00 00 00 80: 00 00 00 00 00 00 00 00 00 90 e6 37 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 80 02 49 31 49 18 49 31 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0f.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 06) 00: 06 11 71 05 07 00 90 02 06 8a 01 01 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 fc 00 00 00 00 00 00 00 00 00 00 49 18 71 05 30: 00 00 00 00 c0 00 00 00 00 00 00 00 ff 01 00 00 40: 2b f2 09 05 18 8c c0 00 a8 20 a8 20 ff 00 20 20 50: 07 e6 17 e1 0c 00 00 00 a8 a8 a8 a8 00 00 00 00 60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 70: 02 01 00 00 00 00 00 00 02 01 00 00 00 00 00 00 80: 00 80 e5 37 00 00 00 00 00 90 e5 37 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 06 00 71 05 49 18 71 05 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 09 00 00 00 00 00 00 00 00 00 00:10.0 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00: 06 11 38 30 17 00 10 02 81 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d8 00 00 00 00 00 00 00 00 00 00 49 18 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 01 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.1 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00: 06 11 38 30 17 00 10 02 81 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 dc 00 00 00 00 00 00 00 00 00 00 49 18 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 01 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.2 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00: 06 11 38 30 17 00 10 02 81 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 e0 00 00 00 00 00 00 00 00 00 00 49 18 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 05 02 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.3 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 81) 00: 06 11 38 30 17 00 10 02 81 00 03 0c 08 20 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 ec 00 00 00 00 00 00 00 00 00 00 49 18 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 05 02 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00:10.4 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 86) 00: 06 11 04 31 17 00 10 02 86 20 03 0c 20 20 80 00 10: 00 f8 ff fb 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 04 31 30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 03 00 00 40: 00 00 03 00 00 00 00 00 a8 20 00 09 00 00 00 00 50: 00 5a 00 80 00 00 00 00 04 0b 88 88 03 88 88 00 60: 20 20 01 00 00 00 00 00 01 00 00 00 00 00 08 c0 70: 00 00 00 00 00 00 ff ff 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 89 00 00 00 00 00 00 00 00 00 00:11.0 ISA bridge: VIA Technologies, Inc. VT8237 ISA bridge [KT600/K8T800/K8T890 South] 00: 06 11 27 32 87 00 10 02 00 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 27 32 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 44 00 f0 00 00 00 00 00 0c 20 00 00 44 00 08 08 50: 80 9d 09 00 00 00 00 00 42 80 00 09 00 00 00 00 60: 00 00 00 00 00 00 00 04 00 00 00 00 00 00 00 00 70: 49 18 27 32 00 00 00 00 00 00 00 00 20 00 00 00 80: 20 84 59 00 00 00 00 00 01 08 00 00 00 18 00 00 90: 00 fc 57 00 b0 c5 06 00 50 56 20 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 04 01 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 40 09 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 03 30 00 00 00 00 00 00 00 00 00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT8233/A/8235/8237 AC97 Audio Controller (rev 60) 00: 06 11 59 30 01 00 10 02 60 00 01 04 00 00 00 00 10: 01 e4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 61 97 30: 00 00 00 00 c0 00 00 00 00 00 00 00 0b 03 00 00 40: 01 cc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 06 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 78) 00: 06 11 65 30 17 01 10 02 78 00 00 02 08 20 00 00 10: 01 e8 00 00 00 fc ff fb 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 65 30 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 03 08 40: 01 00 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 65 30 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01:00.0 VGA compatible controller: nVidia Corporation NV34 [GeForce FX 5200] (rev a1) 00: de 10 22 03 07 00 b0 02 a1 00 00 03 00 f8 00 00 10: 00 00 00 fa 08 00 00 f0 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 60 00 00 00 00 00 00 00 0a 01 05 01 40: 00 00 00 00 02 00 30 00 1b 0e 00 1f 12 03 00 07 50: 01 00 00 00 01 00 00 00 ce d6 23 00 0f 00 00 00 60: 01 44 02 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

2 1

[LinuxBIOS] Will it work?
by Daniel Hill 01 Aug '07

01 Aug '07

Im just wondering if this is compatible with my computer AMD Athlon 64 Processor 3200+ (Venice) MSI K8N Neo4 Platinum (PCB 1.0) (MS-7125) NVIDIA® nForce4 Ultra Chipset (http://global.msi.com.tw/index.php?func=proddesc&prod_no=165&maincat_no=1&c…) for more detail lspci: ------------ 00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) 00:01.0 ISA bridge: nVidia Corporation CK804 ISA Bridge (rev a3) 00:01.1 SMBus: nVidia Corporation CK804 SMBus (rev a2) 00:02.0 USB Controller: nVidia Corporation CK804 USB Controller (rev a2) 00:02.1 USB Controller: nVidia Corporation CK804 USB Controller (rev a3) 00:04.0 Multimedia audio controller: nVidia Corporation CK804 AC'97 Audio Controller (rev a2) 00:06.0 IDE interface: nVidia Corporation CK804 IDE (rev f2) 00:07.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev f3) 00:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev f3) 00:09.0 PCI bridge: nVidia Corporation CK804 PCI Bridge (rev a2) 00:0a.0 Bridge: nVidia Corporation CK804 Ethernet Controller (rev a3) 00:0b.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0c.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 01:0c.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host Controller (rev 80) 03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8053 PCI-E Gigabit Ethernet Controller (rev 15) 05:00.0 VGA compatible controller: ATI Technologies Inc R430 [Radeon X800 XL] (PCIe) 05:00.1 Display controller: ATI Technologies Inc R430 [Radeon X800 XL] (PCIe) Secondary 00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) 00:01.0 ISA bridge: nVidia Corporation CK804 ISA Bridge (rev a3) 00:01.1 SMBus: nVidia Corporation CK804 SMBus (rev a2) 00:02.0 USB Controller: nVidia Corporation CK804 USB Controller (rev a2) 00:02.1 USB Controller: nVidia Corporation CK804 USB Controller (rev a3) 00:04.0 Multimedia audio controller: nVidia Corporation CK804 AC'97 Audio Controller (rev a2) 00:06.0 IDE interface: nVidia Corporation CK804 IDE (rev f2) 00:07.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev f3) 00:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev f3) 00:09.0 PCI bridge: nVidia Corporation CK804 PCI Bridge (rev a2) 00:0a.0 Bridge: nVidia Corporation CK804 Ethernet Controller (rev a3) 00:0b.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0c.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 01:0c.0 FireWire (IEEE 1394): VIA Technologies, Inc. IEEE 1394 Host Controller (rev 80) 03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8053 PCI-E Gigabit Ethernet Controller (rev 15) 05:00.0 VGA compatible controller: ATI Technologies Inc R430 [Radeon X800 XL] (PCIe) 05:00.1 Display controller: ATI Technologies Inc R430 [Radeon X800 XL] (PCIe) Secondary ---------------- PLCC BIOS Winbond W38627THF Also wondering if it will work using window x64? and I assume freeDOS wouldn't work either?

4 3

[LinuxBIOS] UNSUBSCRIBE
by Shaun Ruffell 31 Jul '07

31 Jul '07

UNSUBSCRIBE -----Original Message----- From: linuxbios-bounces(a)linuxbios.org on behalf of linuxbios-request(a)linuxbios.org Sent: Mon 7/30/2007 3:00 AM To: linuxbios(a)linuxbios.org Subject: linuxbios Digest, Vol 29, Issue 115 Send linuxbios mailing list submissions to linuxbios(a)linuxbios.org To subscribe or unsubscribe via the World Wide Web, visit http://www.linuxbios.org/mailman/listinfo/linuxbios or, via email, send a message with subject or body 'help' to linuxbios-request(a)linuxbios.org You can reach the person managing the list at linuxbios-owner(a)linuxbios.org When replying, please edit your Subject line so it is more specific than "Re: Contents of linuxbios digest..." Today's Topics: 1. Re: Can't boot from IDE on vt8237r (Corey Osgood) 2. Re: GA-M57SLI - Nvidia X Server (yhlu) 3. Re: Can't boot from IDE on vt8237r (Stefan Reinauer) 4. Re: GA-M57SLI - Nvidia X Server (Stefan Reinauer) 5. Re: GA-M57SLI - Nvidia X Server (echelon(a)free.fr) 6. Re: GA-M57SLI - Nvidia X Server (yhlu) 7. Re: Can't boot from IDE on vt8237r (Adam Talbot) 8. Tyan S2885 memreset problem!! (Richard Wei) 9. Re: Tyan S2885 memreset problem!! (yhlu) 10. Re: Tyan S2885 memreset problem!! (Richard Wei) ---------------------------------------------------------------------- Message: 1 Date: Sun, 29 Jul 2007 14:21:37 -0400 From: Corey Osgood <corey.osgood(a)gmail.com> Subject: Re: [LinuxBIOS] Can't boot from IDE on vt8237r To: Stefan Reinauer <stepan(a)coresystems.de> Cc: LinuxBIOS Mailing List <linuxbios(a)linuxbios.org> Message-ID: <46ACDAB1.6080600(a)gmail.com> Content-Type: text/plain; charset=UTF-8 Stefan Reinauer wrote: > * Corey Osgood <corey.osgood(a)gmail.com> [070729 17:08]: > >> It's fixed and booting very happily now, thanks! >> > > is that on a C7? > > Yes, c7, cn700, vt8237r. No video yet and USB is causing kernel warnings, but I can log in and use the system through serial. -Corey ------------------------------ Message: 2 Date: Sun, 29 Jul 2007 12:23:54 -0700 From: yhlu <yinghailu(a)gmail.com> Subject: Re: [LinuxBIOS] GA-M57SLI - Nvidia X Server To: "Stefan Reinauer" <stepan(a)coresystems.de> Cc: linuxbios(a)linuxbios.org Message-ID: <2ea3fae10707291223t64ac98b3k3e78d058d3e13209(a)mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1 On 7/29/07, Stefan Reinauer <stepan(a)coresystems.de> wrote: > Peter Stuge wrote: > >> 2. I've lost cpu frequency control (no powernow-k8) so now both my > >> CPUs are running flat out at 3000 MHz. Core temperatures are > >> hovering just below 70C (63C and 67C). > >> > > > > I just had a look at arch/i386/kernel/cpu/cpufreq/powernow-k8.c and > > it currently depends on ACPI and the BIOS keeping a table of > > parameters that it needs; > > > ... > > Once the table has been initialized in the driver ACPI is not used > > at all - the real work is done using rdmsr() and wrmsr(). > > > > I think it would be easy enough to change the initialization so that > > ACPI is not required. > > > > > And it means the kernel driver has to maintain alll the tables for all > CPU revisions and options. > > > > AMD: Are these tables board dependent? Why not put the tables, > > arranged by cpuid, into the powernow driver and do without ACPI? > > > > > > I am not AMD, but I guess it is preferred to do the efford once instead > of once per OS. > > Fixing things that we do wrong in Linux is a bad thing. It will only > help us with Linux and lock out all others. Did we do this whole free > bios thing to make it easier to lock others out? Ouch. > that is not the point. you need to do implenmentation in DSDT for chipset in a clean room. current nvidia chipset dsdt is belonging to IBV...instead of nvidia. or AMD. YH ------------------------------ Message: 3 Date: Sun, 29 Jul 2007 22:55:38 +0200 From: Stefan Reinauer <stepan(a)coresystems.de> Subject: Re: [LinuxBIOS] Can't boot from IDE on vt8237r To: Corey Osgood <corey.osgood(a)gmail.com> Cc: LinuxBIOS Mailing List <linuxbios(a)linuxbios.org> Message-ID: <46ACFECA.3060809(a)coresystems.de> Content-Type: text/plain; charset=UTF-8 Corey Osgood wrote: > Yes, c7, cn700, vt8237r. No video yet and USB is causing kernel > warnings, but I can log in and use the system through serial. > > -Corey > you rock! -- coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br. Tel.: +49 761 7668825 ? Fax: +49 761 7664613 Email: info(a)coresystems.de ? http://www.coresystems.de/ ------------------------------ Message: 4 Date: Sun, 29 Jul 2007 23:00:02 +0200 From: Stefan Reinauer <stepan(a)coresystems.de> Subject: Re: [LinuxBIOS] GA-M57SLI - Nvidia X Server To: yhlu <yinghailu(a)gmail.com> Cc: linuxbios(a)linuxbios.org Message-ID: <20070729210002.GA18516(a)coresystems.de> Content-Type: text/plain; charset=utf-8 * yhlu <yinghailu(a)gmail.com> [070729 21:23]: > > Fixing things that we do wrong in Linux is a bad thing. It will only > > help us with Linux and lock out all others. Did we do this whole free > > bios thing to make it easier to lock others out? Ouch. > > that is not the point. you need to do implenmentation in DSDT for > chipset in a clean room. > current nvidia chipset dsdt is belonging to IBV...instead of nvidia. or AMD. Yes, that was what I was thinking. Such a clean room implementation is not impossible though, is it? Stefan -- coresystems GmbH ? Brahmsstr. 16 ? D-79104 Freiburg i. Br. Tel.: +49 761 7668825 ? Fax: +49 761 7664613 Email: info(a)coresystems.de ? http://www.coresystems.de/ ------------------------------ Message: 5 Date: Mon, 30 Jul 2007 01:17:24 +0200 From: echelon(a)free.fr Subject: Re: [LinuxBIOS] GA-M57SLI - Nvidia X Server To: linuxbios(a)linuxbios.org Message-ID: <1185751044.46ad2004ae37c(a)imp.free.fr> Content-Type: text/plain; charset=ISO-8859-1 Hi all, I suppose that by "clean room" you mean in fact the "Chinese wall technique" (cf Wikipedia..) If we have to do that (including reverse engineering), what are the legal issues? I know that here in Europe doing revers is permited if it is justified by interoperability and/or security auditing. What about the other countries/economic zones? Also what can be the "political" consequences (I mean by this the relationship between the LB team and the hardware manufacturers like nvidia, amd or the motherboard manufacturers..)? I know that having access to datasheets is a very hot issue for the LB project.. Can we go to these IP owners with a straight face after having dissected the legacy bios, and ask them ingenously : "can we have please access at your datasheets"? Oh, I know, Yinghai Lu has said that the copyright owner is the IBV not AMD or nvidia, but can we be sure that the hardware guys are really neutral on this topic? Again, my apologies for asking idiotic questions as a n00b.. Kind regards, Florentin Quoting Stefan Reinauer <stepan(a)coresystems.de>: > * yhlu <yinghailu(a)gmail.com> [070729 21:23]: > > > Fixing things that we do wrong in Linux is a bad thing. It will only > > > help us with Linux and lock out all others. Did we do this whole free > > > bios thing to make it easier to lock others out? Ouch. > > > > that is not the point. you need to do implenmentation in DSDT for > > chipset in a clean room. > > current nvidia chipset dsdt is belonging to IBV...instead of nvidia. or > AMD. > > Yes, that was what I was thinking. Such a clean room implementation is > not impossible though, is it? > > Stefan > > -- > coresystems GmbH ??? Brahmsstr. 16 ??? D-79104 Freiburg i. Br. > Tel.: +49 761 7668825 ??? Fax: +49 761 7664613 > Email: info(a)coresystems.de ??? http://www.coresystems.de/ > > -- > linuxbios mailing list > linuxbios(a)linuxbios.org > http://www.linuxbios.org/mailman/listinfo/linuxbios ------------------------------ Message: 6 Date: Sun, 29 Jul 2007 17:10:07 -0700 From: yhlu <yinghailu(a)gmail.com> Subject: Re: [LinuxBIOS] GA-M57SLI - Nvidia X Server To: "Stefan Reinauer" <stepan(a)coresystems.de> Cc: linuxbios(a)linuxbios.org Message-ID: <2ea3fae10707291710n5ae25c7bk188f1863a6ddd646(a)mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1 On 7/29/07, Stefan Reinauer <stepan(a)coresystems.de> wrote: > * yhlu <yinghailu(a)gmail.com> [070729 21:23]: > > > Fixing things that we do wrong in Linux is a bad thing. It will only > > > help us with Linux and lock out all others. Did we do this whole free > > > bios thing to make it easier to lock others out? Ouch. > > > > that is not the point. you need to do implenmentation in DSDT for > > chipset in a clean room. > > current nvidia chipset dsdt is belonging to IBV...instead of nvidia. or AMD. > > Yes, that was what I was thinking. Such a clean room implementation is > not impossible though, is it? you need to prove that code is done in a clean room... YH ------------------------------ Message: 7 Date: Sun, 29 Jul 2007 20:38:21 -0700 From: Adam Talbot <talbotx(a)comcast.net> Subject: Re: [LinuxBIOS] Can't boot from IDE on vt8237r To: Stefan Reinauer <stepan(a)coresystems.de> Cc: Corey Osgood <corey.osgood(a)gmail.com>, LinuxBIOS Mailing List <linuxbios(a)linuxbios.org> Message-ID: <46AD5D2D.4070800(a)comcast.net> Content-Type: text/plain; charset=UTF-8; format=flowed Great to hear! -Adam Stefan Reinauer wrote: > Corey Osgood wrote: > >> Yes, c7, cn700, vt8237r. No video yet and USB is causing kernel >> warnings, but I can log in and use the system through serial. >> >> -Corey >> >> > > you rock! > > ------------------------------ Message: 8 Date: Mon, 30 Jul 2007 00:39:48 -0700 (PDT) From: Richard Wei <outlander_wei(a)yahoo.com> Subject: [LinuxBIOS] Tyan S2885 memreset problem!! To: linuxbios(a)linuxbios.org Message-ID: <115468.45071.qm(a)web33508.mail.mud.yahoo.com> Content-Type: text/plain; charset=us-ascii I was trying to compile LinuxBIOSv2-2673 for Tyan S2885. The EVB has only one CPU on board. Somehow, I got the following message from the console. The system seems to hang right inside the memreset() function. And the function seems only to toggle GPIO16 and GPIO17 on AMD8111. Cound't figure out where the GPIOs are connected to and why it's memory reset? The following comment is placed right in front of memreset(). /* And if necessary toggle the the reset on the dimms by hand */ Does anyone has the same experience with me and knows what's going on? Please help! Richard Wei ====================================================================== LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 ht reset - LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 Ram1.00 Ram2.00 Ram3 ____________________________________________________________________________________ Need a vacation? Get great deals to amazing places on Yahoo! Travel. http://travel.yahoo.com/ ------------------------------ Message: 9 Date: Mon, 30 Jul 2007 00:57:02 -0700 From: yhlu <yinghailu(a)gmail.com> Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! To: "Richard Wei" <outlander_wei(a)yahoo.com> Cc: linuxbios(a)linuxbios.org Message-ID: <2ea3fae10707300057q104f1ae7rf12eb5a4e36acd9c(a)mail.gmail.com> Content-Type: text/plain; charset=ISO-8859-1 On 7/30/07, Richard Wei <outlander_wei(a)yahoo.com> wrote: > I was trying to compile LinuxBIOSv2-2673 for Tyan S2885. > The EVB has only one CPU on board. > Somehow, I got the following message from the console. > The system seems to hang right inside the memreset() function. > And the function seems only to toggle GPIO16 and GPIO17 on AMD8111. > Cound't figure out where the GPIOs are connected to and why it's memory reset? > The following comment is placed right in front of memreset(). > /* And if necessary toggle the the reset on the dimms by hand */ > > Does anyone has the same experience with me and knows what's going on? > Please help! > > Richard Wei > ====================================================================== > > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > ht reset - > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > Ram1.00 > Ram2.00 > Ram3 > how about the system with two cpu installed? YH ------------------------------ Message: 10 Date: Mon, 30 Jul 2007 02:48:25 -0700 (PDT) From: Richard Wei <outlander_wei(a)yahoo.com> Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! To: yhlu <yinghailu(a)gmail.com> Cc: linuxbios(a)linuxbios.org Message-ID: <816797.64363.qm(a)web33507.mail.mud.yahoo.com> Content-Type: text/plain; charset=us-ascii Hmm... I only have one AMD Opteron. Do I have to configure or rewrite the code for Hypertransport configuration? So appreciated for your rapid response. ----- Original Message ---- From: yhlu <yinghailu(a)gmail.com> To: Richard Wei <outlander_wei(a)yahoo.com> Cc: linuxbios(a)linuxbios.org Sent: Monday, July 30, 2007 3:57:02 PM Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! On 7/30/07, Richard Wei <outlander_wei(a)yahoo.com> wrote: > I was trying to compile LinuxBIOSv2-2673 for Tyan S2885. > The EVB has only one CPU on board. > Somehow, I got the following message from the console. > The system seems to hang right inside the memreset() function. > And the function seems only to toggle GPIO16 and GPIO17 on AMD8111. > Cound't figure out where the GPIOs are connected to and why it's memory reset? > The following comment is placed right in front of memreset(). > /* And if necessary toggle the the reset on the dimms by hand */ > > Does anyone has the same experience with me and knows what's going on? > Please help! > > Richard Wei > ====================================================================== > > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > ht reset - > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > Ram1.00 > Ram2.00 > Ram3 > how about the system with two cpu installed? YH ____________________________________________________________________________________ Boardwalk for $500? In 2007? Ha! Play Monopoly Here and Now (it's updated for today's economy) at Yahoo! Games. http://get.games.yahoo.com/proddesc?gamekey=monopolyherenow ------------------------------ _______________________________________________ linuxbios mailing list linuxbios(a)linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios End of linuxbios Digest, Vol 29, Issue 115 ******************************************

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Re: [LinuxBIOS] Tyan S2885 memreset problem!!
by Richard Wei 31 Jul '07

31 Jul '07

Oh... I check it again. The information right on the AMD Opteron processor is OSA240CC05AH. By the last two digit, I think I have Rev. B3. AD CPUID：Model4ESRev.C0–0.13um AG CPUID：Model5(max.1CPU)Rev.B3-0,13umSledgehammer core AH CPUID：Model5(max.2CPU)Rev.B3-0,13umSledgehammer core AI CPUID：Model5(max.8CPU)Rev.B3-0,13umSledgehammer core AK CPUID：Model5(max.1CPU)Rev.C0-0,13umSledgehammer core AL CPUID：Model5(max.2CPU)Rev.C0-0,13umSledgehammer core AMCPUID：Model5(max.8CPU)Rev.C0-0,13umSledgehammer core ----- Original Message ---- From: yhlu <yinghailu(a)gmail.com> To: Richard Wei <outlander_wei(a)yahoo.com> Cc: linuxbios(a)linuxbios.org Sent: Tuesday, July 31, 2007 1:25:24 AM Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! On 7/30/07, Richard Wei <outlander_wei(a)yahoo.com> wrote: > Hmm... I only have one AMD Opteron. > Do I have to configure or rewrite the code > for Hypertransport configuration? > what's your CPU rev? B3 or C0...? YH -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios ____________________________________________________________________________________ Get the free Yahoo! toolbar and rest assured with the added security of spyware protection. http://new.toolbar.yahoo.com/toolbar/features/norton/index.php

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Re: [LinuxBIOS] Tyan S2885 memreset problem!!
by Richard Wei 31 Jul '07

31 Jul '07

There is no rev information on the top of AMD Opteron processor, but the number right below the barcode on the heatsink has B32001549. Probably it's rev B3. Richard Wei ----- Original Message ---- From: yhlu <yinghailu(a)gmail.com> To: Richard Wei <outlander_wei(a)yahoo.com> Cc: linuxbios(a)linuxbios.org Sent: Tuesday, July 31, 2007 1:25:24 AM Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! On 7/30/07, Richard Wei <outlander_wei(a)yahoo.com> wrote: > Hmm... I only have one AMD Opteron. > Do I have to configure or rewrite the code > for Hypertransport configuration? > what's your CPU rev? B3 or C0...? YH -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios ____________________________________________________________________________________Ready for the edge of your seat? Check out tonight's top picks on Yahoo! TV. http://tv.yahoo.com/

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[LinuxBIOS] mkelfImage adoption on Debian and Ubuntu
by Martin-Éric Racine 30 Jul '07

30 Jul '07

Greetings, I'm currently packaging mkelfImage for Debian and Ubuntu, due to a number of recent LTSP products based upon LinuxBIOS not being able to boot with ELF images produced using etherboot.org's old mkelf-linux tool. There is interest on the Ubuntu side to eventually migrate to this tool for LTSP, provided that it can be verified to generate ELF images that also work for booting Etherboot/Netboot devices based on commercial BIOS. In the process of packaging mkelfImage, a number of issues related to the upstream tarball came up, which prompted me to contact the people mentioned in AUTHORS, to no avail. No response. The main issues are a non-pristine upstream 2.7 tarball and a rather convoluted autotools implementation that makes it very difficult to cleanly build this software in a repeatable way. Thus, in the interest of furthering LinuxBIOS adoption, I am wondering if anyone would be interested in picking up upstream's aging 2.7 tarball, cleaning up its Makefile and bringing it up to current GNU recommended practices, adding missing author credits in each source file's headers, etc. possibly even adding support for amd64 - in essence, to become the new upstream? Once we have a new, properly documented pristine upstream 2.8 tarball with a clean autotools implementation that meets Debian's standards, inclusion into Debian and Ubuntu can proceed. Best Regards, -- Martin-Éric Racine http://q-funk.iki.fi

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Re: [LinuxBIOS] Tyan S2885 memreset problem!!
by Richard Wei 30 Jul '07

30 Jul '07

Hmm... I only have one AMD Opteron. Do I have to configure or rewrite the code for Hypertransport configuration? So appreciated for your rapid response. ----- Original Message ---- From: yhlu <yinghailu(a)gmail.com> To: Richard Wei <outlander_wei(a)yahoo.com> Cc: linuxbios(a)linuxbios.org Sent: Monday, July 30, 2007 3:57:02 PM Subject: Re: [LinuxBIOS] Tyan S2885 memreset problem!! On 7/30/07, Richard Wei <outlander_wei(a)yahoo.com> wrote: > I was trying to compile LinuxBIOSv2-2673 for Tyan S2885. > The EVB has only one CPU on board. > Somehow, I got the following message from the console. > The system seems to hang right inside the memreset() function. > And the function seems only to toggle GPIO16 and GPIO17 on AMD8111. > Cound't figure out where the GPIOs are connected to and why it's memory reset? > The following comment is placed right in front of memreset(). > /* And if necessary toggle the the reset on the dimms by hand */ > > Does anyone has the same experience with me and knows what's going on? > Please help! > > Richard Wei > ====================================================================== > > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > ht reset - > > LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... > 01 nodes initialized. > core0 started: > started ap apicid: > SBLink=02 > NC node|link=00 > busn=40 > NC node|link=02 > Ram1.00 > Ram2.00 > Ram3 > how about the system with two cpu installed? YH ____________________________________________________________________________________ Boardwalk for $500? In 2007? Ha! Play Monopoly Here and Now (it's updated for today's economy) at Yahoo! Games. http://get.games.yahoo.com/proddesc?gamekey=monopolyherenow

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[LinuxBIOS] Can we provide BIOS service base on the Linux BIOS
by Tsai Jonson 30 Jul '07

30 Jul '07

Dear Sir or Madam, We are a small software company in Taiwan. As you may know we have many PC manufacturer and SoC Design comapny here. May we provide them the BIOS binary code base on the Linux BIOS? Surely we modify some code to fit our need of the SoC we had. Is there any legal issue we need to take care? Note: We spent 6 months to learn and boot up the Linux BIOS on our platform. Should we open our source code? And how can we protect our intellecture property if we need to open our source? Very appreciate your kindly attention! Many thanks and looking forward to your advice! Best regards, Jonson Tsai Softton Technology ____________________________________________________________________________________ 想及時通知通訊錄裡的所有親朋好友好消息，就來 Yahoo!奇摩電子信箱發簡訊！ http://tw.mobile.yahoo.com/texts/mail.php

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[LinuxBIOS] Tyan S2885 memreset problem!!
by Richard Wei 30 Jul '07

30 Jul '07

I was trying to compile LinuxBIOSv2-2673 for Tyan S2885. The EVB has only one CPU on board. Somehow, I got the following message from the console. The system seems to hang right inside the memreset() function. And the function seems only to toggle GPIO16 and GPIO17 on AMD8111. Cound't figure out where the GPIOs are connected to and why it's memory reset? The following comment is placed right in front of memreset(). /* And if necessary toggle the the reset on the dimms by hand */ Does anyone has the same experience with me and knows what's going on? Please help! Richard Wei ====================================================================== LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 ht reset - LinuxBIOS-2.0.0_s2885_Fallback Fri Jun 1 15:51:28 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 Ram1.00 Ram2.00 Ram3 ____________________________________________________________________________________ Need a vacation? Get great deals to amazing places on Yahoo! Travel. http://travel.yahoo.com/

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[LinuxBIOS] Can't boot from IDE on vt8237r
by Corey Osgood 30 Jul '07

30 Jul '07

The cn700/vt8237r is almost working, but I'm having problems booting from IDE using filo. boot log, vt8237r.c, vt8237r_lpc.c, vt8237r_ide.c, and Config.lb are all attached (sorry for filling your inboxes, just trying to make sure anything that might help is available). This is based mostly off the vt8235, I've also tried Rudolf Marek's files with no success. Mainly what's got me lost are these two things from the boot log: @line 259: In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.0 In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.1 why? This should be the IDE controller, and it's turned on in Config.lb. Unless I'm missing something, which I must be. It looks like bad device numbers, but afaik it isn't, so why is it coming up null? @line 635: boot: hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 malloc_diag: alloc: 352 bytes (4 blocks), free: 16024 bytes (1 blocks) malloc_diag: alloc: 368 bytes (5 blocks), free: 16008 bytes (1 blocks) file_open: dev=hda1, path=/vmlinuz find_ide_controller: found PCI IDE controller 1106:0571 prog_if=0x8a find_ide_controller: primary channel: compatibility mode find_ide_controller: cmd_base=0x1f0 ctrl_base=0x3f4 Detected floating bus No drive detected on IDE channel 0 Floating bus sounds like a bad thing to me, and google says it is too. But the IDE controller is being found! I've tried this with a real hard drive, a CF to IDE adapter, and a flash-based ide drive, and none are found. I found some references to this in the mailing list archives, especially in relation to the ck804, but never any "this is what fixed it"... Thanks, Corey LinuxBIOS-2.0.0.0-Fallback Sun Jul 22 16:15:56 EDT 2007 starting... Enabling mainboard devices Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0-Fallback Sun Jul 22 16:15:56 EDT 2007 booting... end 82e81318, start 0 32-bit delta 1952 calibrate_tsc 32-bit result is 1952 clocks_per_usec: 1952 Enumerating buses... scan_static_bus for Root Device In cn700 enable_dev for device APIC_CLUSTER: 0. APIC_CLUSTER: 0 enabled In cn700 enable_dev for device PCI_DOMAIN: 0000. Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... Entering cn700 pci_domain_scan_bus. PCI: pci_scan_bus for bus 00 In cn700 enable_dev for device PCI: 00:00.0. PCI: 00:00.0 [1106/0314] ops PCI: 00:00.0 [1106/0314] enabled In cn700 enable_dev for device PCI: 00:00.1. PCI: 00:00.1 [1106/1314] enabled In cn700 enable_dev for device PCI: 00:00.2. PCI: 00:00.2 [1106/2314] enabled In cn700 enable_dev for device PCI: 00:00.3. PCI: 00:00.3 [1106/3208] enabled In cn700 enable_dev for device PCI: 00:00.4. PCI: 00:00.4 [1106/4314] enabled PCI: devfn 0x5, bad id 0xffffffff PCI: devfn 0x6, bad id 0xffffffff In cn700 enable_dev for device PCI: 00:00.7. PCI: 00:00.7 [1106/7314] enabled In cn700 enable_dev for device PCI: 00:01.0. PCI: 00:01.0 [1106/b198] bus ops PCI: 00:01.0 [1106/b198] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 0001e000 malloc 0x0001e000 PCI: 00:0a.0 [1106/3044] enabled PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.0 In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.1 PCI: devfn 0x7a, bad id 0xffffffff PCI: devfn 0x7b, bad id 0xffffffff PCI: devfn 0x7c, bad id 0xffffffff PCI: devfn 0x7d, bad id 0xffffffff PCI: devfn 0x7e, bad id 0xffffffff PCI: devfn 0x7f, bad id 0xffffffff In vt8237r_enable 1106 3038. PCI: 00:10.0 [1106/3038] ops PCI: 00:10.0 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.1 [1106/3038] ops PCI: 00:10.1 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.2 [1106/3038] ops PCI: 00:10.2 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.3 [1106/3038] ops PCI: 00:10.3 [1106/3038] enabled malloc Enter, size 668, free_mem_ptr 0001e29c malloc 0x0001e29c PCI: 00:10.4 [1106/3104] ops PCI: 00:10.4 [1106/3104] enabled malloc Enter, size 668, free_mem_ptr 0001e538 malloc 0x0001e538 PCI: 00:10.5 [1106/d104] enabled PCI: devfn 0x86, bad id 0xffffffff PCI: devfn 0x87, bad id 0xffffffff In vt8237r_enable 1106 3227. Initialising Devices PCI: 00:11.0 [1106/3227] bus ops PCI: 00:11.0 [1106/3227] enabled PCI: devfn 0x89, bad id 0xffffffff PCI: devfn 0x8a, bad id 0xffffffff PCI: devfn 0x8b, bad id 0xffffffff PCI: devfn 0x8c, bad id 0xffffffff In vt8237r_enable 1106 3059. PCI: 00:11.5 [1106/3059] ops PCI: 00:11.5 [1106/3059] enabled In vt8237r_enable ffff ffff. PCI: devfn 0x8f, bad id 0xffffffff In vt8237r_enable 1106 3065. PCI: 00:12.0 [1106/3065] ops PCI: 00:12.0 [1106/3065] enabled PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:11.0 scan_static_bus for PCI: 00:11.0 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Entering cn700 pci_domain_read_resources. Leaving cn700 pci_domain_read_resources. PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:11.5 10 * [0x00000400 - 0x000004ff] io PCI: 00:12.0 10 * [0x00000800 - 0x000008ff] io PCI: 00:0a.0 14 * [0x00000c00 - 0x00000c7f] io PCI: 00:10.0 20 * [0x00000c80 - 0x00000c9f] io PCI: 00:10.1 20 * [0x00000ca0 - 0x00000cbf] io PCI: 00:10.2 20 * [0x00000cc0 - 0x00000cdf] io PCI: 00:10.3 20 * [0x00000ce0 - 0x00000cff] io Root Device compute_allocate_io: base: 00000d00 size: 00000900 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.0 46 * [0x00000000 - 0x0fffffff] mem PCI: 00:0a.0 10 * [0x10000000 - 0x100007ff] mem PCI: 00:10.4 10 * [0x10001000 - 0x100010ff] mem PCI: 00:10.5 10 * [0x10002000 - 0x100020ff] mem PCI: 00:12.0 14 * [0x10003000 - 0x100030ff] mem Root Device compute_allocate_mem: base: 10003100 size: 10003100 align: 28 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000900 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.5 10 * [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 * [0x00001400 - 0x000014ff] io PCI: 00:0a.0 14 * [0x00001800 - 0x0000187f] io PCI: 00:10.0 20 * [0x00001880 - 0x0000189f] io PCI: 00:10.1 20 * [0x000018a0 - 0x000018bf] io PCI: 00:10.2 20 * [0x000018c0 - 0x000018df] io PCI: 00:10.3 20 * [0x000018e0 - 0x000018ff] io Root Device compute_allocate_io: base: 00001900 size: 00000900 align: 8 gran: 0 done Root Device compute_allocate_mem: base: e0000000 size: 10003100 align: 28 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.0 46 * [0xe0000000 - 0xefffffff] mem PCI: 00:0a.0 10 * [0xf0000000 - 0xf00007ff] mem PCI: 00:10.4 10 * [0xf0001000 - 0xf00010ff] mem PCI: 00:10.5 10 * [0xf0002000 - 0xf00020ff] mem PCI: 00:12.0 14 * [0xf0003000 - 0xf00030ff] mem Root Devic LinuxBIOS-2.0.0.0-Fallback Sun Jul 22 16:15:56 EDT 2007 starting... Enabling mainboard devices Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0-Fallback Sun Jul 22 16:15:56 EDT 2007 booting... end 82e81318, start 0 32-bit delta 1952 calibrate_tsc 32-bit result is 1952 clocks_per_usec: 1952 Enumerating buses... scan_static_bus for Root Device In cn700 enable_dev for device APIC_CLUSTER: 0. APIC_CLUSTER: 0 enabled In cn700 enable_dev for device PCI_DOMAIN: 0000. Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... Entering cn700 pci_domain_scan_bus. PCI: pci_scan_bus for bus 00 In cn700 enable_dev for device PCI: 00:00.0. PCI: 00:00.0 [1106/0314] ops PCI: 00:00.0 [1106/0314] enabled In cn700 enable_dev for device PCI: 00:00.1. PCI: 00:00.1 [1106/1314] enabled In cn700 enable_dev for device PCI: 00:00.2. PCI: 00:00.2 [1106/2314] enabled In cn700 enable_dev for device PCI: 00:00.3. PCI: 00:00.3 [1106/3208] enabled In cn700 enable_dev for device PCI: 00:00.4. PCI: 00:00.4 [1106/4314] enabled PCI: devfn 0x5, bad id 0xffffffff PCI: devfn 0x6, bad id 0xffffffff In cn700 enable_dev for device PCI: 00:00.7. PCI: 00:00.7 [1106/7314] enabled In cn700 enable_dev for device PCI: 00:01.0. PCI: 00:01.0 [1106/b198] bus ops PCI: 00:01.0 [1106/b198] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 0001e000 malloc 0x0001e000 PCI: 00:0a.0 [1106/3044] enabled PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.0 In vt8237r_enable ffff ffff. Disabling static device: PCI: 00:0f.1 PCI: devfn 0x7a, bad id 0xffffffff PCI: devfn 0x7b, bad id 0xffffffff PCI: devfn 0x7c, bad id 0xffffffff PCI: devfn 0x7d, bad id 0xffffffff PCI: devfn 0x7e, bad id 0xffffffff PCI: devfn 0x7f, bad id 0xffffffff In vt8237r_enable 1106 3038. PCI: 00:10.0 [1106/3038] ops PCI: 00:10.0 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.1 [1106/3038] ops PCI: 00:10.1 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.2 [1106/3038] ops PCI: 00:10.2 [1106/3038] enabled In vt8237r_enable 1106 3038. PCI: 00:10.3 [1106/3038] ops PCI: 00:10.3 [1106/3038] enabled malloc Enter, size 668, free_mem_ptr 0001e29c malloc 0x0001e29c PCI: 00:10.4 [1106/3104] ops PCI: 00:10.4 [1106/3104] enabled malloc Enter, size 668, free_mem_ptr 0001e538 malloc 0x0001e538 PCI: 00:10.5 [1106/d104] enabled PCI: devfn 0x86, bad id 0xffffffff PCI: devfn 0x87, bad id 0xffffffff In vt8237r_enable 1106 3227. Initialising Devices PCI: 00:11.0 [1106/3227] bus ops PCI: 00:11.0 [1106/3227] enabled PCI: devfn 0x89, bad id 0xffffffff PCI: devfn 0x8a, bad id 0xffffffff PCI: devfn 0x8b, bad id 0xffffffff PCI: devfn 0x8c, bad id 0xffffffff In vt8237r_enable 1106 3059. PCI: 00:11.5 [1106/3059] ops PCI: 00:11.5 [1106/3059] enabled In vt8237r_enable ffff ffff. PCI: devfn 0x8f, bad id 0xffffffff In vt8237r_enable 1106 3065. PCI: 00:12.0 [1106/3065] ops PCI: 00:12.0 [1106/3065] enabled PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: devfn 0x0, bad id 0xffffffff PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:11.0 scan_static_bus for PCI: 00:11.0 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Entering cn700 pci_domain_read_resources. Leaving cn700 pci_domain_read_resources. PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:11.5 10 * [0x00000400 - 0x000004ff] io PCI: 00:12.0 10 * [0x00000800 - 0x000008ff] io PCI: 00:0a.0 14 * [0x00000c00 - 0x00000c7f] io PCI: 00:10.0 20 * [0x00000c80 - 0x00000c9f] io PCI: 00:10.1 20 * [0x00000ca0 - 0x00000cbf] io PCI: 00:10.2 20 * [0x00000cc0 - 0x00000cdf] io PCI: 00:10.3 20 * [0x00000ce0 - 0x00000cff] io Root Device compute_allocate_io: base: 00000d00 size: 00000900 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.0 46 * [0x00000000 - 0x0fffffff] mem PCI: 00:0a.0 10 * [0x10000000 - 0x100007ff] mem PCI: 00:10.4 10 * [0x10001000 - 0x100010ff] mem PCI: 00:10.5 10 * [0x10002000 - 0x100020ff] mem PCI: 00:12.0 14 * [0x10003000 - 0x100030ff] mem Root Device compute_allocate_mem: base: 10003100 size: 10003100 align: 28 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000900 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.5 10 * [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 * [0x00001400 - 0x000014ff] io PCI: 00:0a.0 14 * [0x00001800 - 0x0000187f] io PCI: 00:10.0 20 * [0x00001880 - 0x0000189f] io PCI: 00:10.1 20 * [0x000018a0 - 0x000018bf] io PCI: 00:10.2 20 * [0x000018c0 - 0x000018df] io PCI: 00:10.3 20 * [0x000018e0 - 0x000018ff] io Root Device compute_allocate_io: base: 00001900 size: 00000900 align: 8 gran: 0 done Root Device compute_allocate_mem: base: e0000000 size: 10003100 align: 28 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:11.0 46 * [0xe0000000 - 0xefffffff] mem PCI: 00:0a.0 10 * [0xf0000000 - 0xf00007ff] mem PCI: 00:10.4 10 * [0xf0001000 - 0xf00010ff] mem PCI: 00:10.5 10 * [0xf0002000 - 0xf00020ff] mem PCI: 00:12.0 14 * [0xf0003000 - 0xf00030ff] mem Root Device compute_allocate_mem: base: f0003100 size: 10003100 align: 28 gran: 0 done Root Device assign_resources, bus 0 link: 0 Entering cn700 pci_domain_set_resources. mc_dev located at 0x11880 ERROR! register 0x5b is not set! ERROR! register 0x5c is not set! ERROR! register 0x5d is not set! I would set ram size to 0x204000 Kbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:0a.0 10 <- [0x00f0000000 - 0x00f00007ff] mem PCI: 00:0a.0 14 <- [0x0000001800 - 0x000000187f] io PCI: 00:10.0 20 <- [0x0000001880 - 0x000000189f] io PCI: 00:10.1 20 <- [0x00000018a0 - 0x00000018bf] io PCI: 00:10.2 20 <- [0x00000018c0 - 0x00000018df] io PCI: 00:10.3 20 <- [0x00000018e0 - 0x00000018ff] io PCI: 00:10.4 10 <- [0x00f0001000 - 0x00f00010ff] mem PCI: 00:10.5 10 <- [0x00f0002000 - 0x00f00020ff] mem PCI: 00:11.5 10 <- [0x0000001000 - 0x00000010ff] io PCI: 00:12.0 10 <- [0x0000001400 - 0x00000014ff] io PCI: 00:12.0 14 <- [0x00f0003000 - 0x00f00030ff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 146 PCI: 00:00.1 subsystem <- 00/00 PCI: 00:00.1 cmd <- 146 PCI: 00:00.2 subsystem <- 00/00 PCI: 00:00.2 cmd <- 146 PCI: 00:00.3 subsystem <- 00/00 PCI: 00:00.3 cmd <- 146 PCI: 00:00.4 subsystem <- 00/00 PCI: 00:00.4 cmd <- 146 PCI: 00:00.7 subsystem <- 00/00 PCI: 00:00.7 cmd <- 146 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 147 PCI: 00:0a.0 cmd <- 1c3 PCI: 00:10.0 cmd <- 141 PCI: 00:10.1 cmd <- 141 PCI: 00:10.2 cmd <- 141 PCI: 00:10.3 cmd <- 141 PCI: 00:10.4 cmd <- 142 PCI: 00:10.5 cmd <- 142 PCI: 00:11.0 cmd <- 1c7 PCI: 00:11.5 cmd <- 141 PCI: 00:12.0 cmd <- 1c3 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init malloc Enter, size 668, free_mem_ptr 0001e7d4 malloc 0x0001e7d4 Initializing CPU #0 CPU: vendor Centaur device 6a9 CPU: family 06, model 0a, stepping 09 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xf DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized PCI: 00:00.0 init PCI: 00:00.1 init PCI: 00:00.2 init PCI: 00:00.3 init PCI: 00:00.4 init PCI: 00:00.7 init PCI: 00:01.0 init PCI: 00:10.0 init base address for this usb controller is 0xFA01 PCI: 00:10.1 init base address for this usb controller is 0xFB01 PCI: 00:10.2 init base address for this usb controller is 0xFC01 PCI: 00:10.3 init base address for this usb controller is 0xFD01 PCI: 00:11.0 init vt8237r init RTC Init RTC: Checksum invalid zeroing cmos Invalid CMOS LB checksum for IRQ, reg 0x00000000 value 0x00000700 0xff000000 for IRQ, reg 0x00000001 value 0x00010000 0x00000000 for IRQ, reg 0x00000002 value 0x00010000 0x00000000 for IRQ, reg 0x00000003 value 0x00010000 0x00000000 for IRQ, reg 0x00000004 value 0x00010000 0x00000000 for IRQ, reg 0x00000005 value 0x00010000 0x00000000 for IRQ, reg 0x00000006 value 0x00010000 0x00000000 for IRQ, reg 0x00000007 value 0x00010000 0x00000000 for IRQ, reg 0x00000008 value 0x00010000 0x00000000 for IRQ, reg 0x00000009 value 0x00010000 0x00000000 for IRQ, reg 0x0000000a value 0x00010000 0x00000000 for IRQ, reg 0x0000000b value 0x00010000 0x00000000 for IRQ, reg 0x0000000c value 0x00010000 0x00000000 for IRQ, reg 0x0000000d value 0x00010000 0x00000000 for IRQ, reg 0x0000000e value 0x00010000 0x00000000 for IRQ, reg 0x0000000f value 0x00010000 0x00000000 for IRQ, reg 0x00000010 value 0x00010000 0x00000000 for IRQ, reg 0x00000011 value 0x00010000 0x00000000 for IRQ, reg 0x00000012 value 0x00010000 0x00000000 for IRQ, reg 0x00000013 value 0x00010000 0x00000000 for IRQ, reg 0x00000014 value 0x00010000 0x00000000 for IRQ, reg 0x00000015 value 0x00010000 0x00000000 for IRQ, reg 0x00000016 value 0x00010000 0x00000000 for IRQ, reg 0x00000017 value 0x00010000 0x00000000 PCI: 00:11.5 init Enabling VIA AC'97 Audio. PCI: 00:12.0 init Configuring VIA Rhine LAN PCI: 00:0a.0 init PCI: 00:10.4 init PCI: 00:10.5 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...done Checking IRQ routing table consistency... check_pirq_routing_table() - irq_routing_table located at: 0x000f0000 /home/amp/linuxbios/LinuxBIOSv2/src/arch/i386/boot/pirq_routing.c: 36:check_pirq_routing_table() - checksum is: 0xb7 but should be: 0x89 done. ACPI: Writing ACPI tables at f0400... ACPI: * FACS ACPI: * DSDT @ 000f04a2 Length 589a ACPI: * FADT ACPI: added table 1/6 Length now 40 ACPI: done. Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 00000b70 checksum 8775 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfffc0000 - 0xfffdbfff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 malloc Enter, size 32, free_mem_ptr 0001ea70 malloc 0x0001ea70 New segment addr 0x100000 size 0x234e0 offset 0xc0 filesize 0x9348 (cleaned up) New segment addr 0x100000 size 0x234e0 offset 0xc0 filesize 0x9348 lb: [0x0000000000004000, 0x0000000000022000) malloc Enter, size 32, free_mem_ptr 0001ea90 malloc 0x0001ea90 New segment addr 0x1234e0 size 0x48 offset 0x9420 filesize 0x48 (cleaned up) New segment addr 0x1234e0 size 0x48 offset 0x9420 filesize 0x48 lb: [0x0000000000004000, 0x0000000000022000) Dropping non PT_LOAD segment Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000234e0 filesz: 0x0000000000009348 [ 0x0000000000100000, 0000000000109348, 0x00000000001234e0) <- 00000000000000c0 Clearing Segment: addr: 0x0000000000109348 memsz: 0x000000000001a198 Loading Segment: addr: 0x00000000001234e0 memsz: 0x0000000000000048 filesz: 0x0000000000000048 [ 0x00000000001234e0, 0000000000123528, 0x0000000000123528) <- 0000000000009420 Loaded segments verified segments closed down stream Jumping to boot code at 0x106524 entry = 0x00106524 lb_start = 0x00004000 lb_size = 0x0001e000 adjust = 0x1ffde000 buffer = 0x1ffc4000 elf_boot_notes = 0x00017ee0 adjusted_boot_notes = 0x1fff5ee0 FILO version 0.5 (amp@ampmobile) Sun Jul 22 00:31:32 EDT 2007 collect_sys_info: boot eax = 0xe1fb007 collect_sys_info: boot ebx = 0x1fff5ee0 collect_sys_info: boot arg = 0x1fff5ee0 malloc_diag: alloc: 0 bytes (0 blocks), free: 16376 bytes (1 blocks) malloc_diag: alloc: 24 bytes (1 blocks), free: 16352 bytes (1 blocks) collect_elfboot_info: Bootloader: elfboot collect_elfboot_info: Version: 1.3 malloc_diag: alloc: 40 bytes (2 blocks), free: 16336 bytes (1 blocks) collect_linuxbios_info: Searching for LinuxBIOS tables... find_lb_table: Found canidate at: 00000530 find_lb_table: header checksum o.k. find_lb_table: table checksum o.k. find_lb_table: record count o.k. collect_linuxbios_info: Found LinuxBIOS table at: 00000530 convert_memmap: 0x00000000000000 0x00000000000bd4 16 convert_memmap: 0x00000000000bd4 0x0000000009f42c 1 convert_memmap: 0x000000000c0000 0x00000000030000 1 convert_memmap: 0x000000000f0000 0x00000000010000 16 convert_memmap: 0x00000000100000 0x0000001ff00000 1 collect_sys_info: 0000000000000bd4-00000000000a0000 collect_sys_info: 00000000000c0000-00000000000f0000 collect_sys_info: 0000000000100000-0000000020000000 collect_sys_info: RAM 512 MB relocate: Current location: 0x100000-0x123527 relocate: Relocating to 0x1ffdcad0-0x1ffffff7... ok setup_timers: CPU 800 MHz pci_init: Scanning PCI: found 19 devices malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) pci_init: 00:00.0 1106:0314 0600 00 pci_init: 00:00.1 1106:1314 0600 00 pci_init: 00:00.2 1106:2314 0600 00 pci_init: 00:00.3 1106:3208 0600 00 pci_init: 00:00.4 1106:4314 0600 00 pci_init: 00:00.7 1106:7314 0600 00 pci_init: 00:01.0 1106:b198 0604 00 pci_init: 00:0a.0 1106:3044 0c00 10 pci_init: 00:0f.0 1106:3149 0104 00 pci_init: 00:0f.1 1106:0571 0101 8a pci_init: 00:10.0 1106:3038 0c03 00 pci_init: 00:10.1 1106:3038 0c03 00 pci_init: 00:10.2 1106:3038 0c03 00 pci_init: 00:10.3 1106:3038 0c03 00 pci_init: 00:10.4 1106:3104 0c03 20 pci_init: 00:10.5 1106:d104 0280 00 pci_init: 00:11.0 1106:3227 0601 00 pci_init: 00:11.5 1106:3059 0401 00 pci_init: 00:12.0 1106:3065 0200 00 boot: hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 malloc_diag: alloc: 352 bytes (4 blocks), free: 16024 bytes (1 blocks) malloc_diag: alloc: 368 bytes (5 blocks), free: 16008 bytes (1 blocks) file_open: dev=hda1, path=/vmlinuz find_ide_controller: found PCI IDE controller 1106:0571 prog_if=0x8a find_ide_controller: primary channel: compatibility mode find_ide_controller: cmd_base=0x1f0 ctrl_base=0x3f4 Detected floating bus No drive detected on IDE channel 0 devopen: failed to open ide malloc_diag: alloc: 352 bytes (4 blocks), free: 16024 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 malloc_diag: alloc: 352 bytes (4 blocks), free: 16024 bytes (1 blocks) malloc_diag: alloc: 368 bytes (5 blocks), free: 16008 bytes (1 blocks) file_open: dev=hda1, path=/vmlinuz Drive 0 does not exist devopen: failed to open ide malloc_diag: alloc: 352 bytes (4 blocks), free: 16024 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hda1:/vmlinuz root=/dev/hda1 console=tty0 console=ttyS0,115200 c1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hdc1, path=<NULL> find_ide_controller: found PCI IDE controller 1106:0571 prog_if=0x8a find_ide_controller: secodary channel: compatibility mode find_ide_controller: cmd_base=0x170 ctrl_base=0x374 Detected floating bus No drive detected on IDE channel 1 devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hdc1 b1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hdb1, path=<NULL> Drive 1 does not exist devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hdb1 d1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hdd1, path=<NULL> Drive 3 does not exist devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hdd1 e1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hde1, path=<NULL> find_ide_controller: PCI IDE #1 not found IDE channel 2 not found devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hde1 f1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hdf1, path=<NULL> find_ide_controller: PCI IDE #1 not found IDE channel 2 not found devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hdf1 a1 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hda1, path=<NULL> Drive 0 does not exist devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hda1 2 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hda2, path=<NULL> Drive 0 does not exist devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hda2 3 malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 312 bytes (5 blocks), free: 16064 bytes (1 blocks) file_open: dev=hda3, path=<NULL> Drive 0 does not exist devopen: failed to open ide malloc_diag: alloc: 296 bytes (4 blocks), free: 16080 bytes (1 blocks) malloc_diag: alloc: 280 bytes (3 blocks), free: 16096 bytes (1 blocks) boot: hda3 ## ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) default ROM_SECTION_OFFSET = 0 end ## ## Compute the start location and size size of ## The linuxBIOS bootloader. ## default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) ## ## Compute where this copy of linuxBIOS will start in the boot rom ## default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) ## ## Compute a range of ROM that can cached to speed up linuxBIOS, ## execution speed. ## ## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## default XIP_ROM_SIZE=65536 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) ## ## Set all of the defaults for an x86 architecture ## arch i386 end ## ## Build the objects we have code for in this directory. ## driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o #object vgabios.o if HAVE_ACPI_TABLES object fadt.o object dsdt.o object acpi_tables.o end ## ## Romcc output ## makerule ./failover.E depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## ## Build our 16 bit and 32 bit linuxBIOS entry code ## mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds ## ## Build our reset vector (This is where linuxBIOS is entered) ## if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds end ### Should this be in the northbridge code? mainboardinit arch/i386/lib/cpu_reset.inc ## ## Include an id string (For safe flashing) ## mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds ### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should ### failover to another image. ### if USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end ### ### O.k. We aren't just an intermediary anymore! ### ## ## Setup RAM ## mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files ## dir /pc80 config chip.h chip northbridge/via/cn700 device apic_cluster 0 on chip cpu/via/model_centaur device apic 0 on end end end device pci_domain 0 on device pci 0.0 on end # AGP Bridge device pci 0.1 on end # Error Reporting device pci 0.2 on end # Host Bus Control device pci 0.3 on end # Memory Controller device pci 0.4 on end # Power Management device pci 0.7 on end # V-Link Controller device pci 1.0 on end # PCI Bridge chip southbridge/via/vt8237r device pci f.0 on end # SATA device pci f.1 on end # IDE device pci 10.0 on end # USB 1.1 device pci 10.1 on end # USB 1.1 device pci 10.2 on end # USB 1.1 device pci 10.3 on end # USB 2.0 device pci 11.0 on # Southbridge LPC #chip superio/fintek/f71805f # device pnp 2e.0 on # Floppy # io 0x60 = 0x3f0 # irq 0x70 = 6 # drq 0x74 = 2 # end # device pnp 2e.1 on # Parallel Port # io 0x60 = 0x378 # irq 0x70 = 7 # drq 0x74 = 3 # end # device pnp 2e.2 on # COM1 # io 0x60 = 0x3f8 # irq 0x70 = 4 # end # device pnp 2e.3 on # COM2 # io 0x60 = 0x2f8 # irq 0x70 = 3 # end # device pnp 2e.b on # HWM # io 0x60 = 0xec00 # end #end #superio end # pci 11.0 # 1-4 non existant device pci 11.5 on end # AC97 Audio device pci 11.6 off end # AC97 Modem device pci 12.0 on end # Ethernet end # vt8237 end # pci domain 0 end # cn700

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coreboot July 2007