Author: uwe
Date: 2007-07-15 23:31:05 +0200 (Sun, 15 Jul 2007)
New Revision: 454
Modified:
LinuxBIOSv3/arch/x86/geodelx/geodelx.c
LinuxBIOSv3/northbridge/amd/geodelx/geodelx.c
LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c
Log:
Minor fixes (trivial).
Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de>
Modified: LinuxBIOSv3/arch/x86/geodelx/geodelx.c
===================================================================
--- LinuxBIOSv3/arch/x86/geodelx/geodelx.c 2007-07-13 10:40:31 UTC (rev 453)
+++ LinuxBIOSv3/arch/x86/geodelx/geodelx.c 2007-07-15 21:31:05 UTC (rev 454)
@@ -198,7 +198,6 @@
}
printk(BIOS_DEBUG, "Done pll_reset\n");
- return;
}
/**
@@ -397,7 +396,6 @@
}
}
wrmsr(GLCP_DELAY_CONTROLS, msr);
- return;
}
/**
Modified: LinuxBIOSv3/northbridge/amd/geodelx/geodelx.c
===================================================================
--- LinuxBIOSv3/northbridge/amd/geodelx/geodelx.c 2007-07-13 10:40:31 UTC (rev 453)
+++ LinuxBIOSv3/northbridge/amd/geodelx/geodelx.c 2007-07-15 21:31:05 UTC (rev 454)
@@ -161,7 +161,7 @@
{
struct msr msr;
int sizem = 0;
- unsigned short dimm;
+ u32 dimm;
/* Get the RAM size from the memory controller as calculated
* and set by auto_size_dimm().
@@ -221,8 +221,10 @@
msr.hi |= 0x3;
msr.lo |= 0x30000;
- printk(BIOS_DEBUG,"MSR 0x%08X is now 0x%08X:0x%08X\n", MSR_GLIU0_SHADOW, msr.hi, msr.lo);
- printk(BIOS_DEBUG,"MSR 0x%08X is now 0x%08X:0x%08X\n", MSR_GLIU1_SHADOW, msr.hi, msr.lo);
+ printk(BIOS_DEBUG,"MSR 0x%08X is now 0x%08X:0x%08X\n",
+ MSR_GLIU0_SHADOW, msr.hi, msr.lo);
+ printk(BIOS_DEBUG,"MSR 0x%08X is now 0x%08X:0x%08X\n",
+ MSR_GLIU1_SHADOW, msr.hi, msr.lo);
#endif
}
@@ -380,12 +382,12 @@
setup_realmode_idt();
- printk(BIOS_DEBUG, "Before VSA:\n");
+ printk(BIOS_SPEW, "Before VSA:\n");
/* print_conf(); */
#warning Not doing vsm bios -- linux will fail.
/* Do the magic stuff here, so prepare your tambourine ;) */
/* do_vsmbios(); */
- printk(BIOS_DEBUG, "After VSA:\n");
+ printk(BIOS_SPEW, "After VSA:\n");
/* print_conf(); */
#warning graphics_init is disabled.
@@ -399,6 +401,7 @@
*
* @param dev The PCI domain device.
* @param max Maximum number of devices to scan.
+ * @return TODO
*/
static unsigned int geodelx_pci_domain_scan_bus(struct device *dev,
unsigned int max)
@@ -432,7 +435,7 @@
*/
/** Operations for when the northbridge is running a PCI domain. */
-struct device_operations geodelx_pcidomainops = {
+struct device_operations geodelx_pcidomain_ops = {
.constructor = default_device_constructor,
.phase2_setup_scan_bus = geodelx_pci_domain_phase2,
.phase3_scan = geodelx_pci_domain_scan_bus,
@@ -444,7 +447,7 @@
};
/** Operations for when the northbridge is running an APIC cluster. */
-struct device_operations geodelx_apicops = {
+struct device_operations geodelx_apic_ops = {
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_read_resources = cpu_bus_noop,
@@ -474,13 +477,13 @@
{.id = {.type = DEVICE_ID_PCI_DOMAIN,
.u = {.pci_domain = {.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_AMD_LXBRIDGE}}},
- .ops = &geodelx_pcidomainops},
+ .ops = &geodelx_pcidomain_ops},
/* Northbridge running an APIC cluster. */
{.id = {.type = DEVICE_ID_APIC_CLUSTER,
.u = {.apic_cluster = {.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_AMD_LXBRIDGE}}},
- .ops = &geodelx_apicops},
+ .ops = &geodelx_apic_ops},
/* Northbridge running a PCI device. */
{.id = {.type = DEVICE_ID_PCI,
Modified: LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c
===================================================================
--- LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c 2007-07-13 10:40:31 UTC (rev 453)
+++ LinuxBIOSv3/southbridge/amd/cs5536/cs5536.c 2007-07-15 21:31:05 UTC (rev 454)
@@ -47,7 +47,6 @@
/* CS5536 clock gating */
struct msrinit CS5536_CLOCK_GATING_TABLE[] = {
- /* MSR Setting */
{GLIU_SB_GLD_MSR_PM, {.hi = 0,.lo = 0x000000004}},
{GLPCI_SB_GLD_MSR_PM, {.hi = 0,.lo = 0x000000005}},
{GLCP_SB_GLD_MSR_PM, {.hi = 0,.lo = 0x000000004}},