coreboot July 2007

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208 discussions

[LinuxBIOS] r458 - in LinuxBIOSv3: include lib
by svn＠openbios.org 19 Jul '07

19 Jul '07

Author: mjones Date: 2007-07-19 17:03:05 +0200 (Thu, 19 Jul 2007) New Revision: 458 Modified: LinuxBIOSv3/include/lar.h LinuxBIOSv3/lib/lar.c Log: Add execute in place to lar. Allows code to be run from the ROM. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: LinuxBIOSv3/include/lar.h =================================================================== --- LinuxBIOSv3/include/lar.h 2007-07-18 19:19:48 UTC (rev 457) +++ LinuxBIOSv3/include/lar.h 2007-07-19 15:03:05 UTC (rev 458) @@ -76,5 +76,6 @@ int find_file(struct mem_file *archive, char *filename, struct mem_file *result); int copy_file(struct mem_file *archive, char *filename, void *where); int run_file(struct mem_file *archive, char *filename, void *where); +int execute_in_place(struct mem_file *archive, char *filename); #endif /* LAR_H */ Modified: LinuxBIOSv3/lib/lar.c =================================================================== --- LinuxBIOSv3/lib/lar.c 2007-07-18 19:19:48 UTC (rev 457) +++ LinuxBIOSv3/lib/lar.c 2007-07-19 15:03:05 UTC (rev 458) @@ -3,6 +3,7 @@ * * Copyright (C) 2006-2007 coresystems GmbH * (Written by Stefan Reinauer <stepan(a)coresystems.de> for coresystems GmbH) + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -103,16 +104,41 @@ return 1; } + +/** + * Find the file in the LAR header, copy it to the desired location, + * and execute it. A location of 0xFFFFFFFF means execute in place (XIP). + */ int run_file(struct mem_file *archive, char *filename, void *where) { int (*v) (void); + struct mem_file result; - if (copy_file(archive, filename, where)) { - printk(BIOS_INFO, "LAR: Run file %s failed: No such file.\n", - filename); - return 1; + if ((u32) where != 0xFFFFFFFF) { + if (copy_file(archive, filename, where)) { + printk(BIOS_INFO, + "LAR: Run file %s failed: No such file.\n", + filename); + return 1; + } + } else { /* XIP */ + if (find_file(archive, filename, &result)) { + printk(BIOS_INFO, + "LAR: Run file %s failed: No such file.\n", + filename); + return 1; + } + where = result.start; } v = where; return v(); } + +/** + * Call run_file() to execute in place. + */ +int execute_in_place(struct mem_file *archive, char *filename) +{ + return run_file(archive, filename, (void *) 0xFFFFFFFF); +}

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[LinuxBIOS] we're getting there
by ron minnich 19 Jul '07

19 Jul '07

2 interesting news items. First, Intel is now on the board of OLPC: http://news.digitaltrends.com/news/story/13569/intel_joins_olpc_board. Speculation is that Intel would like to see an OLPC built with Intel hardware. To pull this off, however, Intel would have to either provide a totally open source bios, or help get one made for a hypothetical Intel-based OLPC. I doubt there is going to be a totally open source EFI on an Intel-based OLPC, so what is Intel going to do? It seems to me that Intel has just endorsed the concept of a full open source BIOS. Does it really matter which one it is? No, because the same day that source is released for the OLPC chipset, that source can be used for a linuxbios port. Second, you will see in the June 2007 linux journal, page 14, that putting linuxbios in place of a closed bios is item #10 on the top 10 list of things for Dell to do. Yeah, we're no higher than 10, but hey, we placed! We're getting there! thanks ron

2 1

[LinuxBIOS] Change Value in Southbridge Register
by Marcel Graber 19 Jul '07

19 Jul '07

Hi, Perhaps a dummy, stupid question: I want to set a value in the epia-m southbridge "Generic Power Management Register". Is this possible? In the source code of the vt8253 I see only Value Settings to the "Bus Control" Register. Tnx, marcel

2 2

[LinuxBIOS] Remote Flashing
by Joseph Smith 19 Jul '07

19 Jul '07

Hello, On the LinuxBIOS website I see several references to "remote flashing". Is there any documentaion, or can someone point me in the right direction on how to set this up? Thanks - Joe

2 1

[LinuxBIOS] [v3][PATCH] Clean up mc146818rtc
by Marc Jones 18 Jul '07

18 Jul '07

As the title says. Marc -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors Clean up do_normal_boot() by adding defines, moving defines to the header file, and add a function header. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Index: LinuxBIOSv3/arch/x86/mc146818rtc.c =================================================================== --- LinuxBIOSv3.orig/arch/x86/mc146818rtc.c 2007-07-18 10:13:33.000000000 -0600 +++ LinuxBIOSv3/arch/x86/mc146818rtc.c 2007-07-18 09:27:21.000000000 -0600 @@ -2,6 +2,7 @@ * * Copyright (C) 200X FIXME * Copyright (C) 2007 coresystems GmbH + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -42,75 +43,6 @@ outb((val),RTC_PORT(1)); \ }) -/* control registers - Moto names - */ -#define RTC_REG_A 10 -#define RTC_REG_B 11 -#define RTC_REG_C 12 -#define RTC_REG_D 13 - - -/********************************************************************** - * register details - **********************************************************************/ -#define RTC_FREQ_SELECT RTC_REG_A - -/* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, - * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, - * totalling to a max high interval of 2.228 ms. - */ -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 - /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */ -# define RTC_REF_CLCK_4MHZ 0x00 -# define RTC_REF_CLCK_1MHZ 0x10 -# define RTC_REF_CLCK_32KHZ 0x20 - /* 2 values for divider stage reset, others for "testing purposes only" */ -# define RTC_DIV_RESET1 0x60 -# define RTC_DIV_RESET2 0x70 - /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */ -# define RTC_RATE_SELECT 0x0F -# define RTC_RATE_NONE 0x00 -# define RTC_RATE_32786HZ 0x01 -# define RTC_RATE_16384HZ 0x02 -# define RTC_RATE_8192HZ 0x03 -# define RTC_RATE_4096HZ 0x04 -# define RTC_RATE_2048HZ 0x05 -# define RTC_RATE_1024HZ 0x06 -# define RTC_RATE_512HZ 0x07 -# define RTC_RATE_256HZ 0x08 -# define RTC_RATE_128HZ 0x09 -# define RTC_RATE_64HZ 0x0a -# define RTC_RATE_32HZ 0x0b -# define RTC_RATE_16HZ 0x0c -# define RTC_RATE_8HZ 0x0d -# define RTC_RATE_4HZ 0x0e -# define RTC_RATE_2HZ 0x0f - -/**********************************************************************/ -#define RTC_CONTROL RTC_REG_B -# define RTC_SET 0x80 /* disable updates for clock setting */ -# define RTC_PIE 0x40 /* periodic interrupt enable */ -# define RTC_AIE 0x20 /* alarm interrupt enable */ -# define RTC_UIE 0x10 /* update-finished interrupt enable */ -# define RTC_SQWE 0x08 /* enable square-wave output */ -# define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ -# define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ -# define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ - -/**********************************************************************/ -#define RTC_INTR_FLAGS RTC_REG_C -/* caution - cleared by read */ -# define RTC_IRQF 0x80 /* any of the following 3 is active */ -# define RTC_PF 0x40 -# define RTC_AF 0x20 -# define RTC_UF 0x10 - -/**********************************************************************/ -#define RTC_VALID RTC_REG_D -# define RTC_VRT 0x80 /* valid RAM and time */ -/**********************************************************************/ - #if defined(CONFIG_OPTION_TABLE) && (CONFIG_OPTION_TABLE == 1) static int rtc_checksum_valid(int range_start, int range_end, int cks_loc) @@ -311,7 +243,7 @@ static int cmos_error(void) { - unsigned char reg_d; + u8 reg_d; /* See if the cmos error condition has been flagged */ reg_d = CMOS_READ(RTC_REG_D); return (reg_d & RTC_VRT) == 0; @@ -319,8 +251,8 @@ static int cmos_chksum_valid(void) { - unsigned char addr; - unsigned long sum, old_sum; + u8 addr; + u32 sum, old_sum; sum = 0; /* Comput the cmos checksum */ for(addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) { @@ -338,24 +270,29 @@ int last_boot_normal(void) { - unsigned char byte; + u8 byte; + byte = CMOS_READ(RTC_BOOT_BYTE); - return (byte & (1 << 1)); + return (byte & RTC_LAST_BOOT_FLAG_SET); } -static int do_normal_boot(void) +/** + * Check CMOS for normal or fallback boot mode. + * Use lxbios to set normal mode once the system is operational. + */ +int do_normal_boot(void) { - unsigned char byte; + u8 byte; if (cmos_error() || !cmos_chksum_valid()) { - unsigned char byte; /* There are no impossible values, no cheksums so just * trust whatever value we have in the the cmos, * but clear the fallback bit. */ byte = CMOS_READ(RTC_BOOT_BYTE); - byte &= 0x0c; - byte |= MAX_REBOOT_CNT << 4; + byte &= ~(0x0f << RTC_BOOT_COUNT_SHIFT + | RTC_LAST_BOOT_FLAG_SET | RTC_NORMAL_BOOT_FLAG_SET); + byte |= MAX_REBOOT_CNT << RTC_BOOT_COUNT_SHIFT; CMOS_WRITE(byte, RTC_BOOT_BYTE); } @@ -363,28 +300,28 @@ byte = CMOS_READ(RTC_BOOT_BYTE); /* Are we in normal mode? */ - if (byte & 1) { - byte &= 0x0f; /* yes, clear the boot count */ + if (byte & RTC_NORMAL_BOOT_FLAG_SET) { + byte &= ~(0x0f << RTC_BOOT_COUNT_SHIFT); /* yes, clear the boot count */ } /* Properly set the last boot flag */ - byte &= 0xfc; + byte &= ~(RTC_LAST_BOOT_FLAG_SET | RTC_NORMAL_BOOT_FLAG_SET); if ((byte >> 4) < MAX_REBOOT_CNT) { - byte |= (1<<1); + byte |= RTC_LAST_BOOT_FLAG_SET; } /* Are we already at the max count? */ - if ((byte >> 4) < MAX_REBOOT_CNT) { - byte += 1 << 4; /* No, add 1 to the count */ + if ((byte >> RTC_BOOT_COUNT_SHIFT) < MAX_REBOOT_CNT) { + byte += 1 << RTC_BOOT_COUNT_SHIFT; /* No, add 1 to the count */ } else { - byte &= 0xfc; /* Yes, put in fallback mode */ + byte &= ~RTC_NORMAL_BOOT_FLAG_SET; /* Yes, put in fallback mode */ } /* Save the boot byte */ CMOS_WRITE(byte, RTC_BOOT_BYTE); - return (byte & (1<<1)); + return (byte & RTC_LAST_BOOT_FLAG_SET); } Index: LinuxBIOSv3/include/mc146818rtc.h =================================================================== --- LinuxBIOSv3.orig/include/mc146818rtc.h 2007-07-18 10:13:20.000000000 -0600 +++ LinuxBIOSv3/include/mc146818rtc.h 2007-07-18 09:27:15.000000000 -0600 @@ -1,6 +1,7 @@ /* * Copyright (C) 200X FIXME * Copyright (C) 2007 coresystems GmbH + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -111,10 +112,14 @@ #define LB_CKS_LOC 126 #endif -#define RTC_BOOT_BYTE 48 +#define RTC_BOOT_BYTE 48 +#define RTC_BOOT_COUNT_SHIFT 4 +#define RTC_LAST_BOOT_FLAG_SET (1<<1) +#define RTC_NORMAL_BOOT_FLAG_SET (1<<0) void rtc_init(int invalid); int get_option(void *dest, char *name); int last_boot_normal(void); +int do_normal_boot(void); #endif /* MC146818RTC_H */

2 2

[LinuxBIOS] r457 - in LinuxBIOSv3: arch/x86 include
by svn＠openbios.org 18 Jul '07

18 Jul '07

Author: mjones Date: 2007-07-18 21:19:48 +0200 (Wed, 18 Jul 2007) New Revision: 457 Modified: LinuxBIOSv3/arch/x86/mc146818rtc.c LinuxBIOSv3/include/mc146818rtc.h Log: Clean up do_normal_boot() by adding defines, moving defines to the header file, and add a function header. Signed-off-by: Marc Jones <marc.jones(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: LinuxBIOSv3/arch/x86/mc146818rtc.c =================================================================== --- LinuxBIOSv3/arch/x86/mc146818rtc.c 2007-07-16 22:42:21 UTC (rev 456) +++ LinuxBIOSv3/arch/x86/mc146818rtc.c 2007-07-18 19:19:48 UTC (rev 457) @@ -2,6 +2,7 @@ * * Copyright (C) 200X FIXME * Copyright (C) 2007 coresystems GmbH + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -42,75 +43,6 @@ outb((val),RTC_PORT(1)); \ }) -/* control registers - Moto names - */ -#define RTC_REG_A 10 -#define RTC_REG_B 11 -#define RTC_REG_C 12 -#define RTC_REG_D 13 - - -/********************************************************************** - * register details - **********************************************************************/ -#define RTC_FREQ_SELECT RTC_REG_A - -/* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, - * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, - * totalling to a max high interval of 2.228 ms. - */ -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 - /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */ -# define RTC_REF_CLCK_4MHZ 0x00 -# define RTC_REF_CLCK_1MHZ 0x10 -# define RTC_REF_CLCK_32KHZ 0x20 - /* 2 values for divider stage reset, others for "testing purposes only" */ -# define RTC_DIV_RESET1 0x60 -# define RTC_DIV_RESET2 0x70 - /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */ -# define RTC_RATE_SELECT 0x0F -# define RTC_RATE_NONE 0x00 -# define RTC_RATE_32786HZ 0x01 -# define RTC_RATE_16384HZ 0x02 -# define RTC_RATE_8192HZ 0x03 -# define RTC_RATE_4096HZ 0x04 -# define RTC_RATE_2048HZ 0x05 -# define RTC_RATE_1024HZ 0x06 -# define RTC_RATE_512HZ 0x07 -# define RTC_RATE_256HZ 0x08 -# define RTC_RATE_128HZ 0x09 -# define RTC_RATE_64HZ 0x0a -# define RTC_RATE_32HZ 0x0b -# define RTC_RATE_16HZ 0x0c -# define RTC_RATE_8HZ 0x0d -# define RTC_RATE_4HZ 0x0e -# define RTC_RATE_2HZ 0x0f - -/**********************************************************************/ -#define RTC_CONTROL RTC_REG_B -# define RTC_SET 0x80 /* disable updates for clock setting */ -# define RTC_PIE 0x40 /* periodic interrupt enable */ -# define RTC_AIE 0x20 /* alarm interrupt enable */ -# define RTC_UIE 0x10 /* update-finished interrupt enable */ -# define RTC_SQWE 0x08 /* enable square-wave output */ -# define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ -# define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ -# define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ - -/**********************************************************************/ -#define RTC_INTR_FLAGS RTC_REG_C -/* caution - cleared by read */ -# define RTC_IRQF 0x80 /* any of the following 3 is active */ -# define RTC_PF 0x40 -# define RTC_AF 0x20 -# define RTC_UF 0x10 - -/**********************************************************************/ -#define RTC_VALID RTC_REG_D -# define RTC_VRT 0x80 /* valid RAM and time */ -/**********************************************************************/ - #if defined(CONFIG_OPTION_TABLE) && (CONFIG_OPTION_TABLE == 1) static int rtc_checksum_valid(int range_start, int range_end, int cks_loc) @@ -311,7 +243,7 @@ static int cmos_error(void) { - unsigned char reg_d; + u8 reg_d; /* See if the cmos error condition has been flagged */ reg_d = CMOS_READ(RTC_REG_D); return (reg_d & RTC_VRT) == 0; @@ -319,8 +251,8 @@ static int cmos_chksum_valid(void) { - unsigned char addr; - unsigned long sum, old_sum; + u8 addr; + u32 sum, old_sum; sum = 0; /* Comput the cmos checksum */ for(addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) { @@ -338,24 +270,29 @@ int last_boot_normal(void) { - unsigned char byte; + u8 byte; + byte = CMOS_READ(RTC_BOOT_BYTE); - return (byte & (1 << 1)); + return (byte & RTC_LAST_BOOT_FLAG_SET); } -static int do_normal_boot(void) +/** + * Check CMOS for normal or fallback boot mode. + * Use lxbios to set normal mode once the system is operational. + */ +int do_normal_boot(void) { - unsigned char byte; + u8 byte; if (cmos_error() || !cmos_chksum_valid()) { - unsigned char byte; /* There are no impossible values, no cheksums so just * trust whatever value we have in the the cmos, * but clear the fallback bit. */ byte = CMOS_READ(RTC_BOOT_BYTE); - byte &= 0x0c; - byte |= MAX_REBOOT_CNT << 4; + byte &= ~(0x0f << RTC_BOOT_COUNT_SHIFT + | RTC_LAST_BOOT_FLAG_SET | RTC_NORMAL_BOOT_FLAG_SET); + byte |= MAX_REBOOT_CNT << RTC_BOOT_COUNT_SHIFT; CMOS_WRITE(byte, RTC_BOOT_BYTE); } @@ -363,28 +300,28 @@ byte = CMOS_READ(RTC_BOOT_BYTE); /* Are we in normal mode? */ - if (byte & 1) { - byte &= 0x0f; /* yes, clear the boot count */ + if (byte & RTC_NORMAL_BOOT_FLAG_SET) { + byte &= ~(0x0f << RTC_BOOT_COUNT_SHIFT); /* yes, clear the boot count */ } /* Properly set the last boot flag */ - byte &= 0xfc; + byte &= ~(RTC_LAST_BOOT_FLAG_SET | RTC_NORMAL_BOOT_FLAG_SET); if ((byte >> 4) < MAX_REBOOT_CNT) { - byte |= (1<<1); + byte |= RTC_LAST_BOOT_FLAG_SET; } /* Are we already at the max count? */ - if ((byte >> 4) < MAX_REBOOT_CNT) { - byte += 1 << 4; /* No, add 1 to the count */ + if ((byte >> RTC_BOOT_COUNT_SHIFT) < MAX_REBOOT_CNT) { + byte += 1 << RTC_BOOT_COUNT_SHIFT; /* No, add 1 to the count */ } else { - byte &= 0xfc; /* Yes, put in fallback mode */ + byte &= ~RTC_NORMAL_BOOT_FLAG_SET; /* Yes, put in fallback mode */ } /* Save the boot byte */ CMOS_WRITE(byte, RTC_BOOT_BYTE); - return (byte & (1<<1)); + return (byte & RTC_LAST_BOOT_FLAG_SET); } Modified: LinuxBIOSv3/include/mc146818rtc.h =================================================================== --- LinuxBIOSv3/include/mc146818rtc.h 2007-07-16 22:42:21 UTC (rev 456) +++ LinuxBIOSv3/include/mc146818rtc.h 2007-07-18 19:19:48 UTC (rev 457) @@ -1,6 +1,7 @@ /* * Copyright (C) 200X FIXME * Copyright (C) 2007 coresystems GmbH + * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -111,10 +112,14 @@ #define LB_CKS_LOC 126 #endif -#define RTC_BOOT_BYTE 48 +#define RTC_BOOT_BYTE 48 +#define RTC_BOOT_COUNT_SHIFT 4 +#define RTC_LAST_BOOT_FLAG_SET (1<<1) +#define RTC_NORMAL_BOOT_FLAG_SET (1<<0) void rtc_init(int invalid); int get_option(void *dest, char *name); int last_boot_normal(void); +int do_normal_boot(void); #endif /* MC146818RTC_H */

1 0

[LinuxBIOS] V3 fallback, failover, and the normal boot flag.
by Marc Jones 18 Jul '07

18 Jul '07

How should this work in V3? The current implementation doesn't really make sense to me. See do_normal_boot() in V2. I think that stage0+1 is the equivalent of V2 failover. In stage1 the normal boot flag cmos byte is checked to see if the normal or the fallback image should be loaded. The cmos byte is not documented well. I think it is as follows: [7-4] - boot count [3-2] - not defined [1] - last boot flag [0] - normal boot flag Boot count increments until reset if normal boot flag is set. Last boot flag is set anytime boot count is less than max boot count. Normal boot flag is cleared if boot count exceeds max boot count. Normal boot flag doesn't seem that it can ever be set? Currently in V3, if CMOS checksum is invalid (CMOS is cleared/not setup) then the boot count is maxed and the fallback image is forced. I don't think this is the correct thing to do. If checksum is bad we should clear cmos, set the boot count to 0, and try to do a normal boot. If normal boot fails the CMOS will checksum this time around. The boot count flag should be incremented should try again until max boot count is exceeded. Then the normal boot flag should be cleared and fallback image used. The last item is about the last boot flag. I don't think that it is needed. Thoughts and comments? Marc -- Marc Jones Senior Software Engineer (970) 226-9684 Office mailto:Marc.Jones@amd.com http://www.amd.com/embeddedprocessors

6 18

[LinuxBIOS] (no subject)
by Marcel Graber 18 Jul '07

18 Jul '07

1 0

[LinuxBIOS] black screen of death
by samuel pattuzzi 17 Jul '07

17 Jul '07

oh! its come back to haunt me, all the way from windows. well in truth it isnt my computer that is having the promblem, its my uncles. we are in italy for our summer holidays (where my uncle lives) and im trying to install ubuntu for him. the problem seems to me, from the research i have done, to be to do with the x server. my uncle had tried to install ubuntu on his own but he had found the problem that when ubuntu finish loading the screen goes black and the computer stops responding (even to ctrl alt f1). i tried to install ubuntu using a text install and all goes smooth till it comes to booting ubuntu when the loading bar gets to the end the screen blacks out. i have yet to see gnome from this pc. i have also tried to run a mandriva live cd i have and that works fine! but i dont want mandriva, i want ubuntu!! my uncle had his old grafics card about so i tried this out, however my efforts where to no avail. i got the messega that x server failed to load. i tried to reconfigure the xorg with "dpkg-reconfigure xserver-xorg" but i guess i got it wrong because there was no change. i put the newer card back in and it acted as if it still had the other card, i guess this is because i configured the x server wrong. it tells me it cant find a device. the card im using is and asus 9250 and the screen is an acer AL1716s. here in italy i have very limited access to the internet, my uncle hasnt got broadband, so please consider this in your answers. do i need to reconfigure the xserver, or is it another problem? are there some drivers i should download for the asus card? -sam

3 2

[LinuxBIOS] flashrom on about 140 computers
by Gürkan Sengün 17 Jul '07

17 Jul '07

Please find the output of flashrom -r of about 140 machines at the following address: http://gnu.ethz.ch/rom/run.log You might want to know more about the hardware if you want to make flashrom work on all of them, only about 25 were able to read the BIOS. Yours, Guerkan (also on #openbios on irc.gnu.org)

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coreboot July 2007