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39707 discussions

southbridge vt82c686
by Nhan NGO DINH 01 May '03

01 May '03

Greetings, With the latest CVS I have problems with the support for the southbridge in subject. Here is a part of the make output: === gcc ... -o southbridge.o /usr/src/freebios/src/southbridge/via/vt82c686/southbri dge.c /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c: In function `keybo ard_on': /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:32: warning: passin g arg 3 of `pci_read_config_byte' discards qualifiers from pointer target type /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:48: warning: passin g arg 3 of `pci_read_config_byte' discards qualifiers from pointer target type /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c: In function `south bridge_fixup': /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:83: warning: implic it declaration of function `memcpy' /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:96: `devfn' undecla red (first use in this function) /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:96: (Each undeclare d identifier is reported only once /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:96: for each functi on it appears in.) /usr/src/freebios/src/southbridge/via/vt82c686/southbridge.c:96: too many argume nts to function `pci_write_config_byte' make: *** [southbridge.o] Error 1 === At line 96, there is a wrong parameters count for pci_write_config_byte function. Any suggestions? Bye. Nhan NGO DINH

2 1

Etherboot boot problem after jumping to boot code it restarts
by dkotian3＠vsnl.net 01 May '03

01 May '03

Hi, I have tried etherboot on my machine which has Compact Flash IDE and FLASHROMS(256K/512K). Not successful.. The payload I got was from etherboot-5.0.9, which is rtl8139.ebi which is my ethernet chip. Did an Compact flash.. fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both of ext3 type. Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1 Set these parameters in my config file. option RAMTEST=1 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 option ROM_SIZE=524288 option STD_FLASH=1 #payload ../elfImage.9load payload ../rtl8139.ebi option PAYLOAD_SIZE=196608 burned the romimage using the uniflash tool. It seems to have found the elfimage, but just restarts all over again, could someone please spot what could be the problem and the solution to it. Any help on this would really nice. Please find the log below. **********Error Log start**** LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 0, Superio w83627hf handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7124] PCI: 00:1e.0 [8086/2418] PCI: 00:1f.0 [8086/2410] PCI: 00:1f.1 [8086/2411] PCI: 00:1f.2 [8086/2412] PCI: 00:1f.3 [8086/2413] PCI: 00:1f.5 [8086/2415] PCI: 00:1f.6 [8086/2416] PCI: pci_scan_bus for bus 1 PCI: 01:04.0 [10ec/8139] PCI: 01:05.0 [10ec/8139] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:1e.0 cmd <- 07 PCI: 00:1f.0 cmd <- 0f PCI: 00:1f.1 cmd <- 01 PCI: 00:1f.2 cmd <- 01 PCI: 00:1f.3 cmd <- 01 PCI: 00:1f.5 cmd <- 01 PCI: 00:1f.6 cmd <- 01 PCI: 01:04.0 cmd <- 03 PCI: 01:05.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized DRP0 = 0x9 DIMM0 - size = 64M DIMM1 - size = 0M DRP1 = 0x0 DIMM2 - size = 0M totalram: 64M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Configuring L2 cache...Not 'GenuineIntel' Processor Enable Cache done. Disabling local apic...done. CPU #0 Initialized ioapic southbridge enabled 180 RTC Init Invalid CMOS LB checksum set power on after power fail Please turn on nvram handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 1, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call init Enabling com device: 03 iobase = 0x02f8 irq=3 handle_superio Pass 1, done #0 handle_superio done handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c handle_superio: Pass 2, Superio w83627hf handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 2, done #0 handle_superio done Wrote linuxbios table at: 00000500 - 00000648 checksum 268b Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128 filesz: 0x00 000000000038d4 Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 Jumping to boot code at 0x94000 LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... Ram1 Ram2 .... **********Error Log end**** Thanks and Regards

3 2

low compression of kernel
by Felix Kloeckner 01 May '03

01 May '03

hello, just a simple question: what's the reason for using only a compression level of 3 instead of default or even maximum? 9 works fine for me and give me some additional space for the kernel "makerule linux.bin.gz: linux.bin ;gzip -f -3 linux.bin" in "src/arch/i386/config/make.base", line 39 felix

5 15

Re: ADLO is GO
by Richard Smith 01 May '03

01 May '03

> ok, richard, how about a HOWTO? > Over the last 2 weeks.. I've been building a FAQ/HOWTO from my own experience + stuff that has been coming across the list. I'm updateing it for ADLO now. Then I'll release the pre-alpha version to the list. -- Richard A. Smith rsmith(a)bitworks.com

1 0

Re: Etherboot boot problem after jumping to boot code it restarts
by dkotian3＠vsnl.net 01 May '03

01 May '03

Hi, Thanks for the suggestion. I just tried the suggestion as well with the poll-ide patch. Did not work with that well, there is something else which is missing. The etherboot payload code is not executed at all it seems.. Any idea why. Please let me know. Here is the extract of the log I tried , the address have changed a bit.. **** 203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Initialized controller... Read completed... scanning elf header... Found ELF candiate at offset 0 scan complete... header_offset is 0 calling elf load... New segment addr 0x400000 size 0xc240 offset 0x60 filesize 0x7669 (cleaned up) New segment addr 0x400000 size 0xc240 offset 0x60 filesize 0x7669 Loading Segment: addr: 0x0000000000400000 memsz: 0x000000000000c240 filesz: 0x00 00000000007669 Clearing Segment: addr: 0x0000000000407669 memsz: 0x0000000000004bd7 Jumping to boot code at 0x400000 LinuxBIOS-1.0.0 Thu May 1 10:17:27 IST 2003 starting... Ram1 Ram2 Ram3 Ram Enable 1 ********* Regards Deepak agnew(a)cs.umd.edu wrote etherboot-5.0.9 is NOT supposed to work. you want etherboot-5.0.6 probably and the patch against it at http://www.missl.cs.umd.edu/~agnew/ On Thu, 1 May 2003 dkotian3(a)vsnl.net wrote: > Hi, > > I have tried etherboot on my machine which has > Compact Flash IDE and FLASHROMS(256K/512K). Not > successful.. > The payload I got was from etherboot-5.0.9, which is > rtl8139.ebi which is my ethernet chip. > > Did an Compact flash.. > fdisk /dev/hdc, created 2 partions hdc1 and hdc2, both > of ext3 type. > Then dd if=elfImage_of_kernel of=/dev/hdc bs=4096 skip=1 > > Set these parameters in my config file. > option RAMTEST=1 > option USE_GENERIC_ROM=1 > option USE_ELF_BOOT=1 > option ROM_SIZE=524288 > option STD_FLASH=1 > > #payload ../elfImage.9load > payload ../rtl8139.ebi > option PAYLOAD_SIZE=196608 > > burned the romimage using the uniflash tool. > > It seems to have found the elfimage, but just restarts all over > again, could someone please spot what could be > the problem and the solution to it. > Any help on this would really nice. Please find the log > below. > > **********Error Log start**** > LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... > Ram1 > Ram2 > Ram3 > Ram Enable 1 > Ram Enable 2 > Ram Enable 3 > Ram Enable 4 > Ram Enable 5 > Ram4 > Ram5 > Ram6 > Copying LinuxBIOS to ram. > Jumping to LinuxBIOS. > LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 booting... > Finding PCI configuration type. > PCI: Using configuration type 1 > handle_superio start, nsuperio 1 > handle_superio Pass 0, check #0, s 00009680 s->super 0000a97c > handle_superio: Pass 0, Superio w83627hf > handle_superio port 0x0, defaultport 0x2e > handle_superio Using port 0x2e > handle_superio Pass 0, done #0 > handle_superio done > Scanning PCI bus...PCI: pci_scan_bus for bus 0 > PCI: 00:00.0 [8086/7124] > PCI: 00:1e.0 [8086/2418] > PCI: 00:1f.0 [8086/2410] > PCI: 00:1f.1 [8086/2411] > PCI: 00:1f.2 [8086/2412] > PCI: 00:1f.3 [8086/2413] > PCI: 00:1f.5 [8086/2415] > PCI: 00:1f.6 [8086/2416] > PCI: pci_scan_bus for bus 1 > PCI: 01:04.0 [10ec/8139] > PCI: 01:05.0 [10ec/8139] > PCI: pci_scan_bus returning with max=01 > PCI: pci_scan_bus returning with max=01 > done > Allocating PCI resources... > ASSIGN RESOURCES, bus 0 > PCI: 00:1e.0 1c <- [0x00001000 - 0x00001fff] bus 1 io > PCI: 00:1e.0 24 <- [0xfec00000 - 0xfebfffff] bus 1 prefmem > PCI: 00:1e.0 20 <- [0xfeb00000 - 0xfebfffff] bus 1 mem > ASSIGN RESOURCES, bus 1 > PCI: 01:04.0 10 <- [0x00001000 - 0x000010ff] io > PCI: 01:04.0 14 <- [0xfeb00000 - 0xfeb000ff] mem > PCI: 01:05.0 10 <- [0x00001400 - 0x000014ff] io > PCI: 01:05.0 14 <- [0xfeb01000 - 0xfeb010ff] mem > ASSIGNED RESOURCES, bus 1 > PCI: 00:1f.1 20 <- [0x000028e0 - 0x000028ef] io > PCI: 00:1f.2 20 <- [0x000028c0 - 0x000028df] io > PCI: 00:1f.3 20 <- [0x000028f0 - 0x000028ff] io > PCI: 00:1f.5 10 <- [0x00002000 - 0x000020ff] io > PCI: 00:1f.5 14 <- [0x00002880 - 0x000028bf] io > PCI: 00:1f.6 10 <- [0x00002400 - 0x000024ff] io > PCI: 00:1f.6 14 <- [0x00002800 - 0x0000287f] io > ASSIGNED RESOURCES, bus 0 > done. > Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 > PCI: 00:1e.0 cmd <- 07 > PCI: 00:1f.0 cmd <- 0f > PCI: 00:1f.1 cmd <- 01 > PCI: 00:1f.2 cmd <- 01 > PCI: 00:1f.3 cmd <- 01 > PCI: 00:1f.5 cmd <- 01 > PCI: 00:1f.6 cmd <- 01 > PCI: 01:04.0 cmd <- 03 > PCI: 01:05.0 cmd <- 03 > done. > Initializing PCI devices... > PCI devices initialized > DRP0 = 0x9 > DIMM0 - size = 64M > DIMM1 - size = 0M > DRP1 = 0x0 > DIMM2 - size = 0M > totalram: 64M > Initializing CPU #0 > Updating microcode > microcode_info: sig = 0x00000678 pf=0x00000001 rev = 0x00000000 > Enabling cache... > Setting fixed MTRRs(0-88) type: UC > Setting fixed MTRRs(0-16) type: WB > DONE fixed MTRRs > Setting variable MTRR 0, base: 0MB, range: 64MB, type WB > DONE variable MTRRs > Clear out the extra MTRR's > call intel_enable_fixed_mtrr() > call intel_enable_var_mtrr() > Leave setup_mtrrs > done. > > Max cpuid index : 1 > Vendor ID : CentaurHauls > Processor Type : 0x00 > Processor Family : 0x06 > Processor Model : 0x07 > Processor Mask : 0x00 > Processor Stepping : 0x08 > Feature flags : 0x00803035 > > > MTRR check > Fixed MTRRs : Enabled > Variable MTRRs: Enabled > > Configuring L2 cache...Not 'GenuineIntel' Processor > Enable Cache > done. > Disabling local apic...done. > CPU #0 Initialized > ioapic southbridge enabled 180 > RTC Init > Invalid CMOS LB checksum > set power on after power fail > Please turn on nvram > handle_superio start, nsuperio 1 > handle_superio Pass 1, check #0, s 00009680 s->super 0000a97c > handle_superio: Pass 1, Superio w83627hf > handle_superio port 0x2e, defaultport 0x2e > handle_superio Using port 0x2e > Call init > Enabling com device: 03 > iobase = 0x02f8 irq=3 > handle_superio Pass 1, done #0 > handle_superio done > handle_superio start, nsuperio 1 > handle_superio Pass 2, check #0, s 00009680 s->super 0000a97c > handle_superio: Pass 2, Superio w83627hf > handle_superio port 0x2e, defaultport 0x2e > handle_superio Using port 0x2e > handle_superio Pass 2, done #0 > handle_superio done > Wrote linuxbios table at: 00000500 - 00000648 checksum 268b > > Welcome to elfboot, the open sourced starter. > January 2002, Eric Biederman. > Version 1.2 > > 203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f > Searching for 16 byte tags > 64:rom_read_bytes() - overflowed source buffer. max_block = 3 > init_bytes found 0 tags > Initialized controller... > Read completed... > scanning elf header... > Found ELF candiate at offset 0 > scan complete... > header_offset is 0 > calling elf load... > New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 > (cleaned up) New segment addr 0x94000 size 0x8128 offset 0x60 filesize 0x38d4 > Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000008128 filesz: 0x00 > 000000000038d4 > Clearing Segment: addr: 0x00000000000978d4 memsz: 0x0000000000004854 > Jumping to boot code at 0x94000 > > LinuxBIOS-1.0.0 Thu May 1 04:29:36 IST 2003 starting... > Ram1 > Ram2 > .... > **********Error Log end**** > > Thanks and Regards > > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios >

1 0

Test post without confidentiality disclaimer (was RE: Debugging t he linuxBIOS code)
by Colin Hall 01 May '03

01 May '03

This is a test posting. > > Please do not send confidential email to public mailing lists. > > > //Peter > In response to Peter and Gregg's posts my sys admin has reconfigured our corporate mail server so that posts from me to this forum are free of confidentiality disclaimers. Hopefully this posting will not contain the automatically appended disclaimer. Thanks for your patience. Regards, Colin.

1 0

Re: ADLO is GO
by Richard Smith 01 May '03

01 May '03

Ok. that fixed it.. ADLO is booting for me. For the list: I had to enable read and write in the shadow memory. I don't think you had to but I enabled the full range from 0c0000 to 0ffffff Adam: I added a macro that does a PCI config space write. Saves you from haveing to do all the calulations. Would you like a diff? It doesn't appear however that my video bios is getting called. I rememember seeing somewhere that I have to enable that? -- Richard A. Smith rsmith(a)bitworks.com

3 6

Generate a config file on LinuxBIOS site
by dkotian3＠vsnl.net 01 May '03

01 May '03

Hi, Generate a config file option on LinuxBIOS site does not seem show up anything Someone has any idea on it. Basically, I was trying the etherboot option on it. Thanks and Regards Deepak

1 0

ADLO Video is up
by Richard Smith 01 May '03

01 May '03

Adam Sulmicki wrote: > can you just diasable/remove debug patch and see what happen? i actually > never used that patch. Thats what it was. I commented out SERIAL_DEBUG and now I have text on my monitor. Dude this is COOL. Ok... Now. This board is a multi-head board so there are actually 2 69000 on the PCI bus. I also need to init the second chip as well. The way we did this under General software was to activate chip 2. run bios. Deactivate chip 2. Activate chip 1 and then re run the bios. Would I have to do such a thing for BOCHS as well or is there a better way. -- Richard A. Smith rsmith(a)bitworks.com

2 3

ADLO no go
by Richard Smith 30 Apr '03

30 Apr '03

I'm trying to get ADLO up but once it jumps to adlo nothing happens. I've applied the serial-debug patch to ADLO but still no results. Are there any specific memory region options that I need to have enabled /disabled? Heres the snipit from my serial output. Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 Using stream address 0x9c00 37:init_bytes() - zkernel_start:0xfff00000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x7c00 size 0x20400 offset 0x100 filesize 0x20400 (cleaned up) New segment addr 0x7c00 size 0x20400 offset 0x100 filesize 0x20400 Loading Segment: addr: 0x0000000007f67368 memsz: 0x0000000000020400 filesz: 0x0000000000020400 Jumping to boot code at 0x7c00 <machine is toast at this point> -- Richard A. Smith rsmith(a)bitworks.com

2 1

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