coreboot

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39707 discussions

epia-m vgabios
by elife elife 03 Jul '03

03 Jul '03

Hi, I have boot linux succ with linuxbios/serial console in my epia-m. Now I would like add VGA support. I try testbios, but it report "int15 encountered". What should I do? Or there are other methods to let linux's tty0 works? running file epia-m.videobios.bin No size specified. defaulting to 32k No base specified. defaulting to 0xc0000 No initial code segment specified. defaulting to 0xc000 No initial instruction pointer specified. defaulting to 0x0003 eax=0x8 ecx=0x3 eflags=0x44 int15 encountered. EAX=00005f19 EBX=00000800 ECX=00000000 EDX=000003d4 ESP=0000ffcc EBP=00000000 ESI=000058d8 EDI=00000044 DS=0000 ES=0000 SS=0030 CS=c000 EIP=00004ef9 NV UP DI NG NZ NA PE NC int15 encountered. EAX=00005f19 EBX=00000f04 ECX=00000000 EDX=000003d4 ESP=0000ffb4 EBP=00000000 ESI=000058d8 EDI=00000044 DS=0000 ES=0000 SS=0030 CS=c000 EIP=000051df NV UP DI PL NZ NA PO NC int15 encountered. EAX=00005f19 EBX=0000f004 ECX=00000000 EDX=000003c4 ESP=0000ffcc EBP=00000000 ESI=00000000 EDI=0000b1a9 DS=0000 ES=0000 SS=0030 CS=c000 EIP=00004fcb NV UP DI PL NZ NA PO NC int15 encountered. EAX=00005f19 EBX=0000f004 ECX=00000000 EDX=000003d4 ESP=0000ffcc EBP=00000000 ESI=00000000 EDI=0000b1a9 DS=0000 ES=0000 SS=0030 CS=c000 EIP=00005020 NV UP DI PL NZ NA PO NC int15 encountered. EAX=00005f0f EBX=00000000 ECX=00000000 EDX=000003d5 ESP=0000fff2 EBP=00000000 ESI=00000000 EDI=00000044 DS=0000 ES=0000 SS=0030 CS=c000 EIP=00005c98 NV UP DI NG NZ NA PO NC int15 encountered. EAX=00005f19 EBX=00000000 ECX=00000000 EDX=000003d4 ESP=0000ffdc EBP=00000000 ESI=00000000 EDI=00000044 DS=0000 ES=0000 SS=0030 CS=c000 EIP=000051df NV UP DI PL NZ NA PO NC int15 encountered. EAX=00005f02 EBX=00000000 ECX=00000000 EDX=000003d4 ESP=0000fff2 EBP=00000000 ESI=00000000 EDI=00000044 DS=0000 ES=0000 SS=0030 CS=c000 EIP=00005ce8 NV UP DI PL ZR AC PE NC halt_sys: file ops.c, line 8583 halted _________________________________________________________________ 与联机的朋友进行交流，请使用 MSN Messenger: http://messenger.msn.com/cn

2 1

Re: freebios2 anonymous checkout
by ebiederman＠lnxi.com 03 Jul '03

03 Jul '03

"mitch wright" <mitch.wright(a)earthlink.net> writes: > Hello Eric, > > Why does cvs not let me check out the freebios2 tree with anonymous username and > an empty password? It looks like sourceforge is crumbling under it's current load. > I'd really like to take a look at it. I'd love to share. Eric

3 2

Re: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD
by YhLu 02 Jul '03

02 Jul '03

Eric, Thanks for the Info, I can get two cpus running now. but it die in Kernel. Ron, I use 2.4.21 kernel and it died on CPU 0: Machine Check Exception: 0000000000000007 Bank 3: b40000000000083b at 000000fdfc000cfe Kernel panic: Unable to continue Any advise. Regards Yinghai Lu LinuxBIOS-1.1.02.0Fallback Thu Jul 3 00:33:17 EDT 2003 starting... LinuxBIOS-1.1.02.0Fallback Thu Jul 3 00:33:17 EDT 2003 starting... apic_id: 00000000 Bootstrap cpu setting up resource map.... done. setting up coherent ht domain.... done. PCI: 00:01.00 PCI: 00:01.01 PCI: 00:02.00 PCI: 00:02.01 PCI: 00:03.00 PCI: 00:04.00 PCI: 00:04.01 PCI: 00:04.02 PCI: 00:04.03 PCI: 00:04.05 PCI: 00:04.06 PCI: 00:18.00 PCI: 00:18.01 PCI: 00:18.02 PCI: 00:18.03 PCI: 00:19.00 PCI: 00:19.01 PCI: 00:19.02 PCI: 00:19.03 SMBus controller enabled Ram1 setting up CPU0 northbridge registers done. setting up CPU1 northbridge registers done. Ram2 RAM: 0x00180000 KB Ram3 dcl: 08018000 Initializing memory: done dcl: 08018000 Initializing memory: done Ram4 Ram5 Ram6 LinuxBIOS-1.1.02.0Fallback Thu Jul 3 00:33:17 EDT 2003 starting... LinuxBIOS-1.1.02.0Fallback Thu Jul 3 00:33:17 EDT 2003 starting... apic_id: 00000001 Application processor Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.02.0Fallback Thu Jul 3 00:33:17 EDT 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Enumerating buses...PCI: pci_scan_bus for bus 0 PCI: 00:01.0 [1022/7450] PCI: 00:01.1 [1022/7451] PCI: 00:02.0 [1022/7450] PCI: 00:02.1 [1022/7451] PCI: 00:03.0 [1022/7460] PCI: 00:04.0 [1022/7468] ops PCI: 00:04.0 [1022/7468] PCI: 00:04.1 [1022/7469] ops PCI: 00:04.1 [1022/7469] PCI: 00:04.2 [1022/746a] PCI: 00:04.3 [1022/746b] ops PCI: 00:04.3 [1022/746b] PCI: 00:04.5 [1022/746d] PCI: 00:04.6 [1022/746e] PCI: 00:18.0 [1022/1100] PCI: 00:18.1 [1022/1101] PCI: 00:18.2 [1022/1102] PCI: 00:18.3 [1022/1103] PCI: 00:19.0 [1022/1100] PCI: 00:19.1 [1022/1101] PCI: 00:19.2 [1022/1102] PCI: 00:19.3 [1022/1103] PCI: pci_scan_bus for bus 1 PCI: 01:09.0 [14e4/1648] PCI: 01:09.1 [14e4/1648] PCI: 01:0a.0 [1000/0030] PCI: 01:0a.1 [1000/0030] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus for bus 2 PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: 03:00.0 [1022/7464] ops PCI: 03:00.0 [1022/7464] PCI: 03:00.1 [1022/7464] ops PCI: 03:00.1 [1022/7464] PCI: 03:00.2 [1022/7463] PCI: 03:01.0 [1022/7462] PCI: 03:05.0 [105a/3373] PCI: 03:06.0 [1002/4752] PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus returning with max=03 done Allocating resources... ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:01.0 24 <- [0xfe200000 - 0xfe1fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfe100000 - 0xfe1fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:09.0 10 <- [0xfe100000 - 0xfe10ffff] mem PCI: 01:09.0 18 <- [0xfe110000 - 0xfe11ffff] mem PCI: 01:09.1 10 <- [0xfe120000 - 0xfe12ffff] mem PCI: 01:09.1 18 <- [0xfe130000 - 0xfe13ffff] mem PCI: 01:0a.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:0a.0 14 <- [0xfe140000 - 0xfe14ffff] mem PCI: 01:0a.0 1c <- [0xfe150000 - 0xfe15ffff] mem PCI: 01:0a.1 10 <- [0x00001400 - 0x000014ff] io PCI: 01:0a.1 14 <- [0xfe160000 - 0xfe16ffff] mem PCI: 01:0a.1 1c <- [0xfe170000 - 0xfe17ffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:02.0 1c <- [0x00003000 - 0x00002fff] bus 2 io PCI: 00:02.0 24 <- [0xfe200000 - 0xfe1fffff] bus 2 prefmem PCI: 00:02.0 20 <- [0xfe200000 - 0xfe1fffff] bus 2 mem PCI: 00:03.0 1c <- [0x00002000 - 0x00002fff] bus 3 io PCI: 00:03.0 24 <- [0xfe200000 - 0xfe1fffff] bus 3 prefmem PCI: 00:03.0 20 <- [0xfd000000 - 0xfe0fffff] bus 3 mem ASSIGN RESOURCES, bus 3 PCI: 03:00.0 10 <- [0xfe020000 - 0xfe020fff] mem PCI: 03:00.1 10 <- [0xfe021000 - 0xfe021fff] mem PCI: 03:00.2 10 <- [0xfe025000 - 0xfe0250ff] mem PCI: 03:00.2 14 <- [0xfe026000 - 0xfe02601f] mem PCI: 03:01.0 10 <- [0xfe022000 - 0xfe022fff] mem PCI: 03:05.0 10 <- [0x00002480 - 0x000024bf] io PCI: 03:05.0 14 <- [0x000024c0 - 0x000024cf] io PCI: 03:05.0 18 <- [0x00002400 - 0x0000247f] io PCI: 03:05.0 1c <- [0xfe023000 - 0xfe023fff] mem PCI: 03:05.0 20 <- [0xfe000000 - 0xfe01ffff] mem PCI: 03:06.0 10 <- [0xfd000000 - 0xfdffffff] mem PCI: 03:06.0 14 <- [0x00002000 - 0x000020ff] io PCI: 03:06.0 18 <- [0xfe024000 - 0xfe024fff] mem ASSIGNED RESOURCES, bus 3 PCI: 00:04.1 20 <- [0x000038e0 - 0x000038ef] io PCI: 00:04.2 10 <- [0x000038c0 - 0x000038df] io PCI: 00:04.5 10 <- [0x00003000 - 0x000030ff] io PCI: 00:04.5 14 <- [0x00003880 - 0x000038bf] io PCI: 00:04.6 10 <- [0x00003400 - 0x000034ff] io PCI: 00:04.6 14 <- [0x00003800 - 0x0000387f] io ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling resourcess...DEV: 00:01.0 cmd <- 07 DEV: 00:01.1 cmd <- 00 DEV: 00:02.0 cmd <- 07 DEV: 00:02.1 cmd <- 00 DEV: 00:03.0 cmd <- 07 DEV: 00:04.0 cmd <- 0f DEV: 00:04.1 cmd <- 01 DEV: 00:04.2 cmd <- 01 DEV: 00:04.3 cmd <- 00 DEV: 00:04.5 cmd <- 01 DEV: 00:04.6 cmd <- 01 DEV: 00:18.0 cmd <- 00 DEV: 00:18.1 cmd <- 00 DEV: 00:18.2 cmd <- 00 DEV: 00:18.3 cmd <- 00 DEV: 00:19.0 cmd <- 00 DEV: 00:19.1 cmd <- 00 DEV: 00:19.2 cmd <- 00 DEV: 00:19.3 cmd <- 00 DEV: 01:09.0 cmd <- 02 DEV: 01:09.1 cmd <- 02 DEV: 01:0a.0 cmd <- 03 DEV: 01:0a.1 cmd <- 03 DEV: 03:00.0 cmd <- 02 DEV: 03:00.1 cmd <- 02 DEV: 03:00.2 cmd <- 02 DEV: 03:01.0 cmd <- 02 DEV: 03:05.0 cmd <- 03 DEV: 03:06.0 cmd <- 83 done. Initializing devices... PCI: 00:04.0 init lpc_init PCI: 00:04.1 init ide_init IDE1 IDE0 PCI: 00:04.3 init PCI: 03:00.0 init USB: Setting up controller.. done. PCI: 03:00.1 init USB: Setting up controller.. done. Devices initialized totalram: 1536M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB Setting fixed MTRRs(72-88) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB Setting variable MTRR 1, base: 1024MB, range: 512MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : AuthenticAMD Processor Type : 0x00 Processor Family : 0x0f Processor Model : 0x05 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x078bfbff MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0 done. CPU #0 Initialized clocks_per_usec: 1793 secondary_cpu_init Waiting for 2 CPUS to stop Initializing CPU #1 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB Setting fixed MTRRs(72-88) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB Setting variable MTRR 1, base: 1024MB, range: 512MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : AuthenticAMD Processor Type : 0x00 Processor Family : 0x0f Processor Model : 0x05 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x078bfbff MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 16777216 done. CPU #1 Initialized secondary_cpu_init 1/1 All AP CPUs stopped Checking IRQ routing tables... /root/xx/xx/freebios2/src/arch/i386/boot/pirq_routing.c: 29:check_pirq_routin g_table() - irq_routing_table located at: 0x0000a140 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...succeed Wrote the mp table end at: 00000020 - 0000014c Wrote linuxbios table at: 00000500 - 00000b08 checksum 707a Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Found ELF candiate at offset 0 Loading Etherboot version: 5.1.8 Dropping non PT_LOAD segment New segment addr 0x20000 size 0x34718 offset 0xb0 filesize 0x56d6 (cleaned up) New segment addr 0x20000 size 0x34718 offset 0xb0 filesize 0x56d6 Loading Segment: addr: 0x0000000000020000 memsz: 0x0000000000034718 filesz: 0x00 000000000056d6 Clearing Segment: addr: 0x00000000000256d6 memsz: 0x000000000002f042 Jumping to boot code at 0x20000 ROM segment 0x33cc length 0x9866 reloc 0x00020000 CPU 1857 Mhz Etherboot 5.1.8 (GPL) Tagged ELF (Multiboot) for [TG3] Relocating _text from: [000256e0,00054d50) to [5ffd0990,60000000) Probing pci nic... [TG3]Cannot find PowerManagement capability, aborting. [TG3]Ethernet addr: 00:E0:81:F0:18:CD Tigon3 [partno(BCM95704A7) rev 2002 PHY(5704)] (PCIX:100MHz:64-bit) Link is up at 100 Mbps, half duplex. Searching for server (DHCP)... ..Me: 192.168.1.198, Server: 192.168.1.1, Gateway 192.168.1.1 Loading 192.168.1.1:ram0_2.5_2.4.21_k8_lsi_mydisk4.elf ...(ELF)... ............. ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ ............................................................................ .................................................done Firmware type: LinuxBIOS Linux version 2.4.21 (root@tst2723_rh9) (gcc version 3.2.2 20030222 (Red Hat Lin ux 3.2.2-5)) #13 SMP Tue Jul 1 21:09:41 EDT 2003 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000000b68 (reserved) BIOS-e820: 0000000000000b68 - 00000000000a0000 (usable) BIOS-e820: 00000000000f0000 - 00000000000f0400 (reserved) BIOS-e820: 0000000000100000 - 0000000060000000 (usable) 640MB HIGHMEM available. 896MB LOWMEM available. hm, page 00000000 reserved twice. found SMP MP-table at 00000010 hm, page 00000000 reserved twice. hm, page 00001000 reserved twice. hm, page 00000000 reserved twice. hm, page 00001000 reserved twice. On node 0 totalpages: 393216 zone(0): 4096 pages. zone(1): 225280 pages. zone(2): 163840 pages. Intel MultiProcessor Specification v1.4 Virtual Wire compatibility mode. OEM ID: TYAN Product ID: S2880 APIC at: 0xFEE00000 Processor #0 Unknown CPU [15:5] APIC version 16 Processor #1 Unknown CPU [15:5] APIC version 16 I/O APIC #2 Version 17 at 0xFEC00000. Enabling APIC mode: Flat. Using 1 I/O APICs Processors: 2 Kernel command line: root=/dev/ram0 rw ram0_2.5_2.4.21_k8_lsi_mydisk4.elf -retad dr 0X5FFD0B34 Initializing CPU#0 Detected 1792.125 MHz processor. Calibrating delay loop... 3565.15 BogoMIPS Memory: 1547448k/1572864k available (1493k kernel code, 25028k reserved, 323k da ta, 284k init, 655360k highmem) Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) Inode cache hash table entries: 131072 (order: 8, 1048576 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer-cache hash table entries: 131072 (order: 7, 524288 bytes) Page-cache hash table entries: 524288 (order: 9, 2097152 bytes) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) Intel machine check architecture supported. Intel machine check reporting enabled on CPU#0. Enabling fast FPU save and restore... done. Enabling unmasked SIMD FPU exception support... done. Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX mtrr: v1.40 (20010327) Richard Gooch (rgooch(a)atnf.csiro.au) mtrr: detected mtrr type: Intel CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) Intel machine check reporting enabled on CPU#0. CPU0: AMD 02/05 stepping 08 per-CPU timeslice cutoff: 2925.71 usecs. enabled ExtINT on CPU#0 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Booting processor 1/1 eip 2000 Initializing CPU#1 masked ExtINT on CPU#1 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Calibrating delay loop... 3578.26 BogoMIPS CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) Intel machine check reporting enabled on CPU#1. CPU1: AMD 02/05 stepping 08 Total of 2 processors activated (7143.42 BogoMIPS). ENABLING IO-APIC IRQs Setting 2 in the phys_id_present_map ...changing IO-APIC physical APIC ID to 2 ... ok. ..TIMER: vector=0x31 pin1=2 pin2=0 testing the IO APIC....................... .................................... done. Using local APIC timer interrupts. calibrating APIC timer ... ..... CPU clock speed is 1792.0936 MHz. ..... host bus clock speed is 199.1214 MHz. cpu: 0, clocks: 1991214, slice: 663738 CPU0<T0:1991200,T1:1327456,D:6,S:663738,C:1991214> cpu: 1, clocks: 1991214, slice: 663738 CPU1<T0:1991200,T1:663712,D:12,S:663738,C:1991214> checking TSC synchronization across CPUs: passed. Waiting on wait_init_idle (map = 0x2) All processors have done init_idle CPU 0: Machine Check Exception: 0000000000000007 Bank 3: b40000000000083b at 000000fdfc000cfe Kernel panic: Unable to continue

1 0

NC-670
by Justin Cormack 02 Jul '03

02 Jul '03

Has anyone looked at doing a port for the NC-670? http://www.netcomipc.com.tw/02Embedded/htm/NC670.htm it is an embedded VIA Eden platform with some advantages over the consumer EPIA model, eg hardware watchdog, runs off 5V only, has CF socket, 4 serial ports etc. I will have a look at it when I get some more, and some more time. lspci: 00:00.0 Host bridge: VIA Technologies, Inc. VT8605 [ProSavage PM133] 00:01.0 PCI bridge: VIA Technologies, Inc. VT8605 [PM133 AGP] 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) 00:07.1 IDE interface: VIA Technologies, Inc. VT82C586B PIPC Bus Master IDE (rev 06) 00:07.2 USB Controller: VIA Technologies, Inc. USB (rev 1a) 00:07.3 USB Controller: VIA Technologies, Inc. USB (rev 1a) 00:07.4 Bridge: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) 00:07.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 50) 00:0f.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 08) 01:00.0 VGA compatible controller: S3 Inc. VT8603 [ProSavage PN133] AGP4X VGA Controller (Twister) (rev 02) lspci -vv 00:00.0 Host bridge: VIA Technologies, Inc. VT8605 [ProSavage PM133] Subsystem: VIA Technologies, Inc. VT8605 [ProSavage PM133] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 0 Region 0: Memory at e8000000 (32-bit, prefetchable) [size=64M] Capabilities: [a0] AGP version 2.0 Status: RQ=31 SBA+ 64bit- FW- Rate=x1,x2,x4 Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none> Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:01.0 PCI bridge: VIA Technologies, Inc. VT8605 [PM133 AGP] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 Memory behind bridge: ec000000-ec0fffff Prefetchable memory behind bridge: e0000000-e7ffffff BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B- Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) Subsystem: VIA Technologies, Inc. VT82C686/A PCI to ISA Bridge Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.1 IDE interface: VIA Technologies, Inc. VT82C586B PIPC Bus Master IDE (rev 06) (prog-if 8a [Master SecP PriP]) Subsystem: VIA Technologies, Inc. VT82C586B PIPC Bus Master IDE Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 Region 4: I/O ports at d000 [size=16] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.2 USB Controller: VIA Technologies, Inc. USB (rev 1a) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. (Wrong ID) USB Controller Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin D routed to IRQ 9 Region 4: I/O ports at d400 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.3 USB Controller: VIA Technologies, Inc. USB (rev 1a) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. (Wrong ID) USB Controller Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, cache line size 08 Interrupt: pin D routed to IRQ 9 Region 4: I/O ports at d800 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.4 Bridge: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) Subsystem: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin ? routed to IRQ 11 Capabilities: [68] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 50) Subsystem: VIA Technologies, Inc. VT82C686 AC97 Audio Controller Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin C routed to IRQ 11 Region 0: I/O ports at dc00 [size=256] Region 1: I/O ports at e000 [size=4] Region 2: I/O ports at e400 [size=4] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:0f.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 08) Subsystem: Intel Corp. EtherExpress PRO/100+ Server Adapter (PILA8470B) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (2000ns min, 14000ns max), cache line size 08 Interrupt: pin A routed to IRQ 11 Region 0: Memory at ec300000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at e800 [size=64] Region 2: Memory at ec100000 (32-bit, non-prefetchable) [size=1M] Expansion ROM at <unassigned> [disabled] [size=1M] Capabilities: [dc] Power Management version 2 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=2 PME- 01:00.0 VGA compatible controller: S3 Inc. VT8603 [ProSavage PN133] AGP4X VGA Controller (Twister) (rev 02) (prog-if 00 [VGA]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (1000ns min, 63750ns max), cache line size 08 Interrupt: pin A routed to IRQ 12 Region 0: Memory at ec000000 (32-bit, non-prefetchable) [size=512K] Region 1: Memory at e0000000 (32-bit, prefetchable) [size=128M] Expansion ROM at <unassigned> [disabled] [size=64K] Capabilities: [dc] Power Management version 2 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [80] AGP version 2.0 Status: RQ=31 SBA- 64bit- FW- Rate=x4 Command: RQ=0 SBA- AGP- 64bit- FW- Rate=x4

2 1

What information would I need?
by Joshua Wise 02 Jul '03

02 Jul '03

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Assuming I wanted to do a port to the ABIT KG7-RAID, what information would I need? I have experience writing bootloader-type things from working on an ARM bootloader. ~joshua - -- Joshua Wise | www.joshuawise.com GPG Key | 0xEA80E0B3 Quote | <lilo> I akilled *@* by mistake -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.1 (GNU/Linux) iD8DBQE/AyoxPn9tWOqA4LMRAo/LAJ98iK1mtwHzLgofgqsaQxbK7tJK8QCfZrTB Z8F1B4VStGJB1pZIbHjoI5A= =Z0n6 -----END PGP SIGNATURE-----

1 0

move to bitkeeper?
by ron minnich 01 Jul '03

01 Jul '03

sourceforge is really having trouble nowadays. Half my browsers think the web pages are to be downloaded for some reason; cvs updates are seeing 24-hour delays; and random outages are a daily occurence. I've noticed that lots of high-profile projects are now mastering on bitkeeper.com, including the linux kernel and the infiniband project. Any comments or objections to me at least looking into a move to bitkeeper.com? It has lots of advantages, not the least that it supports distributed repositories. Anyone have anything to say about this, pro or con? ron

8 10

RE: move to bitkeeper?
by ron minnich 30 Jun '03

30 Jun '03

On Mon, 30 Jun 2003, Gregg C Levine wrote: > Now the other question. Ron, which browsers are telling you this? I > can view all of the project pages without difficulty, on MSIE, and the > version of Netscape delivered on Slackware 8.0, also with the browsers > that came with Gnome. opera (latest) konqueror (3.0.5a-4) ron

2 1

[commit] epia-m again (fwd)
by ron minnich 30 Jun '03

30 Jun '03

---------- Forwarded message ---------- Date: Mon, 30 Jun 2003 16:09:02 +0800 From: Andrew Ip <aip(a)cwlinux.com> Subject: [commit] epia-m again Hi, Since I'm no cvs expert in un-remove file from the source tree, it took much longer than I thought. Also, Sourceforge is slow and unstable lately. My checkins weren't shown up from either cvs view and cvs co 'till I looked at it again this afternoon. Anyway, epia-m is just committed. -Andrew -- Andrew Ip Email: aip(a)cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en.

1 0

Problem CPU Clock
by Luis Pacheco 30 Jun '03

30 Jun '03

Hi there, I'm running linuxbios with motherboard pcchips 810mlr.. But there is an little problem.. :) I've an Athlon 2000+ XP but with linuxbios we puts the processor with an clock like an 1200+ XP :( Does anyone known howto to change that...? Thanks -- Luis André Pacheco http://www.neuralbit.com

4 6

Re: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD
by YhLu 28 Jun '03

28 Jun '03

Eric, I have some questions about the APIC. How can I change the Second Opteron's APIC_ID? DO I need to make the second CPU run and its process access (APIC_DEFAULT_BASE+APIC_ID) and set (1<<24) to it. Then When should start the process in auto.c or hardwaremain.c ( startup_other_cpus function)? I have tried to add one branch in auto.c and seems the second cpu start only from crt0.base. and it try copy LinBIOS and Jump Regards Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年6月25日 8:13 收件人: linuxbios(a)clustermatic.org 主题: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD The above combination works pretty well until I try to program the part, at which point the kernel takes an oops and dies. I'm wondering if anyone else has either: - seen this work - seen this fail thanks ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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