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39707 discussions

kernel 2.4.21 patch for sis630
by tu guangxiu 26 Jun '03

26 Jun '03

Dear lists, who have kernel 2.4.21 patch for sis630? patch of 2.4.19 has several rejects. thanks tu --------------------------------- Do you Yahoo!? SBC Yahoo! DSL - Now only $29.95 per month!

3 2

i can flash the doc successfully, but it doesn't boot
by Ivan 26 Jun '03

26 Jun '03

Hi all: I reinstall my rh8.0 today, and i try to flash the image(the one i download from cwlinux) to the doc on my m810lmr board, nothing error message(the same as before, all seem normal), and when i reboot, it cannot boot. I try another DOC, and the same problem. I'm sure no problem with the image. I got the same trouble when i upgrade my linux to rh9.0 before, so i changed something, then it ok, but i can't remmber what i have done..... Any advices? Thanks in advance! ivan --http://www.eyou.com --ÎÈ¶š¿É¿¿µÄÃâ·Ñµç×ÓÐÅÏä ÓïÒôÓÊŒþ ÒÆ¶¯ÊéÇ© ÈÕÀú·þÎñ ÍøÂçŽæŽ¢...ÒÚÓÊÎŽŸ¡

1 0

LinuxBios PPC-support.. U-Boot project
by David Eliasson 26 Jun '03

26 Jun '03

I read on the linuxbios webpage about PPC-support.. Aren t you guys aware of the U-boot project? They ve been running the GNU Linux kernel 2.4.19 and 2.4 21 in firmware for a while now.. Maybe I m just missing something, but I thought some merging of efforts might be in place.. http://sourceforge.net/projects/u-boot/ Regards /David

10 20

freebios2 + k8 users
by ron minnich 25 Jun '03

25 Jun '03

Just to make sure I'm in sync, I'm assuming you all are building fallback images only? Or are you building normal images? I'm building fallback but ... ron

2 1

re: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD
by YhLu 25 Jun '03

25 Jun '03

Ron, I use 16M ramdisk that will downloaded into Node with Kernel at the same time. So didn't use MTD etc. Regards Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年6月25日 9:08 收件人: Eric W. Biederman 抄送: linuxbios(a)clustermatic.org 主题: Re: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD On 25 Jun 2003, Eric W. Biederman wrote: > That is what I have working right now. just checking, you're running the 64-bit kernel? I guess I'll yank down the newest MTD cvs and try again. ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

re: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD
by YhLu 25 Jun '03

25 Jun '03

Ron, Did you use SMP support or not? I use NON-SMP support in Tyan S2880 and it die in the Kernel too. Regards Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年6月25日 8:13 收件人: linuxbios(a)clustermatic.org 主题: K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD The above combination works pretty well until I try to program the part, at which point the kernel takes an oops and dies. I'm wondering if anyone else has either: - seen this work - seen this fail thanks ron _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

K8 + 2.4.21 + SuSE 64-bit mode + Arima HDAMA + 49LF040 + MTD
by ron minnich 25 Jun '03

25 Jun '03

The above combination works pretty well until I try to program the part, at which point the kernel takes an oops and dies. I'm wondering if anyone else has either: - seen this work - seen this fail thanks ron

2 2

freebios2: pcibios_read_config_*
by ron minnich 25 Jun '03

25 Jun '03

these appear to be deprecated? Just checking as they are not in my freebios2 tree any more but code that uses them is still there. ron

2 2

romcc ramblings...
by ebiederman＠lnxi.com 25 Jun '03

25 Jun '03

Romcc is coming along quite nicely. I keep fixing a corner case here and there but it quite usable and getting more so. One area where it falls short is in it's handling of lots of small variables. The classic question is: If I declare my small variables to be chars will romcc be able to store them in both AL and AH? And unfortunately the answer is no. Using the AH, BH, CH, and DH at least when I tried it did not work well. Treating all of the registers the same seems to work much better. A similar question is can romcc pack 2 byte values in a random register? The answer again is no. But for a different reason extracting and reinserting the values requires an extra register, so it is not a transformation I want to perform automatically. With that being said I do think it is worth having romcc support keeping multiple values in a register. Otherwise I will wind up writing a bunch of macros like: #define LATENCY(MIN) (((MIN) >> 8) & 0xff) #define SET_LATENCY(MIN, LATENCY) ((MIN) = (((MIN) & ~(0xff << 8)) | (((LATENCY) & 0xFF) << 8))) #define CYCLE_TIME(MIN) ((MIN) & 0xff) #define SET_CYCLE_TIME(MIN, CYCLE_TIME) ((MIN) = (((MIN) & ~0xff) | ((CYCLE_TIME) & 0xFF))) Which look ugly are a bit of a pain to write. I looked an C actually has a mechanism to do this already. bit fields in structures. For doing I/O to the outside world they are not portable. So their use is discouraged. For internal values that are just going to be used internally by a program, say packing multiple values in a single register they are portable and a decent way to describe what is going on. So to keep 2 byte values in I register I could do: struct { unsigned latency:8; unsigned cycle_time:8; } min; I have not implemented this but I plan to. For both programmer control and ease of use it looks like a win. Eric

1 0

romcc ramblings...
by ebiederman＠lnxi.com 25 Jun '03

25 Jun '03

Romcc is coming along quite nicely. I keep fixing a corner case here and there but it quite usable and getting more so. One area where it falls short is in it's handling of lots of small variables. The classic question is: If I declare my small variables to be chars will romcc be able to store them in both AL and AH? And unfortunately the answer is no. Using the AH, BH, CH, and DH at least when I tried it did not work well. Treating all of the registers the same seems to work much better. A similar question is can romcc pack 2 byte values in a random register? The answer again is no. But for a different reason extracting and reinserting the values requires an extra register, so it is not a transformation I want to perform automatically. With that being said I do think it is worth having romcc support keeping multiple values in a register. Otherwise I will wind up writing a bunch of macros like: #define LATENCY(MIN) (((MIN) >> 8) & 0xff) #define SET_LATENCY(MIN, LATENCY) ((MIN) = (((MIN) & ~(0xff << 8)) | (((LATENCY) & 0xFF) << 8))) #define CYCLE_TIME(MIN) ((MIN) & 0xff) #define SET_CYCLE_TIME(MIN, CYCLE_TIME) ((MIN) = (((MIN) & ~0xff) | #((CYCLE_TIME) & 0xFF))) So many times while in your registers you have enough bits to hold everything you want to hold Theoretically

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