coreboot April 2017

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143 discussions

Re: [coreboot] Intel ME The Way of the Static Analysis
by ron minnich 27 Apr '17

27 Apr '17

It's the year of minix on the desktop! and the server! and the laptop! On Wed, Apr 26, 2017 at 1:58 PM Patrick Georgi via coreboot < coreboot(a)coreboot.org> wrote: > Fun tidbit: The ME is running MINIX3 (confirmed by a file in the > Google cache: > http://webcache.googleusercontent.com/search?q=cache:tCcU0NRwTnQJ:ftp://ftp… > ) > > 2017-04-26 22:47 GMT+02:00 Youness Alaoui <kakaroto(a)kakaroto.homelinux.net > >: > > Thanks for the links. > > This is the article that I had seen : > > http://blog.ptsecurity.com/2017/04/intel-me-way-of-static-analysis.html > > > > > > On Tue, Apr 25, 2017 at 10:38 AM, Shawn <citypw(a)gmail.com> wrote: > >> > >> slide: > >> https://www.troopers.de/downloads/troopers17/TR17_ME11_Static.pdf > >> > >> video: > >> https://www.youtube.com/watch?v=2_aokrfcoUk > >> > >> -- > >> coreboot mailing list: coreboot(a)coreboot.org > >> https://mail.coreboot.org/mailman/listinfo/coreboot > > > > > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > https://mail.coreboot.org/mailman/listinfo/coreboot > > > > -- > Google Germany GmbH, ABC-Str. 19, 20354 Hamburg > Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: > Hamburg > Geschäftsführer: Matthew Scott Sucherman, Paul Terence Manicle > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Intel ME The Way of the Static Analysis
by Patrick Georgi 26 Apr '17

26 Apr '17

Fun tidbit: The ME is running MINIX3 (confirmed by a file in the Google cache: http://webcache.googleusercontent.com/search?q=cache:tCcU0NRwTnQJ:ftp://ftp…) 2017-04-26 22:47 GMT+02:00 Youness Alaoui <kakaroto(a)kakaroto.homelinux.net>: > Thanks for the links. > This is the article that I had seen : > http://blog.ptsecurity.com/2017/04/intel-me-way-of-static-analysis.html > > > On Tue, Apr 25, 2017 at 10:38 AM, Shawn <citypw(a)gmail.com> wrote: >> >> slide: >> https://www.troopers.de/downloads/troopers17/TR17_ME11_Static.pdf >> >> video: >> https://www.youtube.com/watch?v=2_aokrfcoUk >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot -- Google Germany GmbH, ABC-Str. 19, 20354 Hamburg Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg Geschäftsführer: Matthew Scott Sucherman, Paul Terence Manicle

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Re: [coreboot] Intel ME The Way of the Static Analysis
by Youness Alaoui 26 Apr '17

26 Apr '17

Thanks for the links. This is the article that I had seen : http://blog.ptsecurity.com/2017/04/intel-me-way-of-static-analysis.html On Tue, Apr 25, 2017 at 10:38 AM, Shawn <citypw(a)gmail.com> wrote: > slide: > https://www.troopers.de/downloads/troopers17/TR17_ME11_Static.pdf > > video: > https://www.youtube.com/watch?v=2_aokrfcoUk > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] Coreboot on the Supermicro H8SCM-F
by Timothy Pearson 26 Apr '17

26 Apr '17

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 04/26/2017 02:25 PM, Rene Shuster wrote: > Maybe even FSF-endorsed. Great news! Spread the news. Once this port is complete I'll go ahead and do a security audit on the firmware / HW, then see if this might be something we want to add to our REACTS instance. Eagerly awaiting results... :-) - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJZAPSpAAoJEK+E3vEXDOFbyqQIALg2pyoarNPNg5HdQ8YIUeWk UDOBnkTRZFqrMoqIE220iZ/Wb6J8CK9nlGc8ZdtEj/dgMOLjWnmaAIlOO1bX94pb NKWRTvYEdlRWbE/rlD1qRhyfFuF+3hkFVVx3OnwqqQQUcbaxbK5DmyDvlyY3aOhy NQYRwDwHINxElEa94ncL7B7sYufM1lFDCqlmfOtUJzWKtgNnZUJ+DUFw/f4/tQA5 wqVZB1qBRQ6EkFHAsHK3sbBWl6LBt1AqvErxP8NnKcx4DSYTHHhwgWc/uvksTwvj wfko6+dycYM5FGleLPJIj6NxFn47PWYrB0G5emV66XdCBbyftJK/rQ9VNAfkfi4= =Ahe6 -----END PGP SIGNATURE-----

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[ANN] coreboot community meeting this Thursday, April 27th, 2017
by Paul Menzel 26 Apr '17

26 Apr '17

Dear coreboot folks, Please don’t miss the coreboot community meeting [1] this Thursday (tomorrow) on April 27th, 2017. Please add your topics to the pad [2]. Thanks, Paul [1] https://www.coreboot.org/Coreboot_community_meeting [2] https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics?

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Re: [coreboot] Unable to run QEMU for Intel Rangeley Mohon Peak
by Dhanasekar Jaganathan 26 Apr '17

26 Apr '17

Hi Martin, Thanks for the info. -Dhanasekar On Wed, Apr 26, 2017 at 7:00 AM, Martin Roth <gaumless(a)gmail.com> wrote: > Hi Dhanasekar, > > You built a BIOS for Mohon Peak, and it's not running on QEMU? I > wouldn't expect that to work. That's why we have the coreboot builds > that are specifically for QEMU. You wouldn't expect to be able to pull > the BIOS off of one board, drop it onto another board and have it > work, but that's roughly what it sounds like you're trying to do here. > > If you want to boot on QEMU for testing a payload or something, use > one of the QEMU builds. If you want to use the Mohon Peak build, > you'll either need real hardware, or a simulator that supports the > Rangeley/Avaton chips like windriver's simics, which is fairly > expensive. > > Martin > > On Tue, Apr 25, 2017 at 3:48 AM, Dhanasekar Jaganathan > <jdhanasekarmca(a)gmail.com> wrote: > > Hi All, > > > > I am trying to boot Intel Atom Rangeley Sever CPU (Mohon Peak) with > coreboot > > bios and GRUB2 as a Playload. > > > > After including GUB2 with Coreboot and running " qemu-system-x86_64 -bios > > build/coreboot.rom -serial stdio" command,I am getting following error, > > > > " warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit > 5]" > > > > Can you please help me to solve this issue ? > > > > > > Thanks, > > > > Dhanasekar > > > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > https://mail.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] Unable to run QEMU for Intel Rangeley Mohon Peak
by Martin Roth 26 Apr '17

26 Apr '17

Hi Dhanasekar, You built a BIOS for Mohon Peak, and it's not running on QEMU? I wouldn't expect that to work. That's why we have the coreboot builds that are specifically for QEMU. You wouldn't expect to be able to pull the BIOS off of one board, drop it onto another board and have it work, but that's roughly what it sounds like you're trying to do here. If you want to boot on QEMU for testing a payload or something, use one of the QEMU builds. If you want to use the Mohon Peak build, you'll either need real hardware, or a simulator that supports the Rangeley/Avaton chips like windriver's simics, which is fairly expensive. Martin On Tue, Apr 25, 2017 at 3:48 AM, Dhanasekar Jaganathan <jdhanasekarmca(a)gmail.com> wrote: > Hi All, > > I am trying to boot Intel Atom Rangeley Sever CPU (Mohon Peak) with coreboot > bios and GRUB2 as a Playload. > > After including GUB2 with Coreboot and running " qemu-system-x86_64 -bios > build/coreboot.rom -serial stdio" command,I am getting following error, > > " warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]" > > Can you please help me to solve this issue ? > > > Thanks, > > Dhanasekar > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] RFC: Changing CBMEM console to run as a persistent ring-buffer
by Julius Werner 25 Apr '17

25 Apr '17

Managed to get it working with serial input now. Found a few issues with my patch. Will send a new, tested version out. On Tue, Apr 25, 2017 at 11:48 AM, Julius Werner <jwerner(a)chromium.org> wrote: > Did you check that all implementations use unsigned? >> > > Yes, all the ones that I'm now aware of used unsigned, 32-bit. > > >> I am able to build it, I just had to figure out how and install some >>> dependencies. But I tried booting it on an HP Chromebook 14 2013 (falco) >>> and it doesn't seem to recognize my keyboard >>> >> Is it PS2 or USB? Is at_keyboard included in the payload? >> > > It's a matrixed laptop keyboard. I believe the embedded controller does > 8042 emulation, but I'm not sure honestly. I'm an ARM guy and this was the > one old x86 machine I have lying around. I can try USB if I get it to not > crash long enough to type something. > > even if it did, it probably wouldn't have a keyboard driver for them >>> either. I assume there's no way to make it run over the UART instead?) >>> >> terminal_input serial_com0 >> terminal_output serial_com0 >> In etc/grub.cfg >> > > I don't think I have an etc/grub.cfg... is there a way to compile that in > instead? > > >> Possibly the problem is that some module hangs. Can you try minimal GRUB >> without non-essential modules? >> >>> > How do I do that? Is there some configure flag? > > For reference, I did: > > ./autogen.sh > ./configure --with-platform=coreboot > make > make default_payload.elf > <cbfstool default_payload.elf into my coreboot image and flash it> >

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Re: [coreboot] RFC: Changing CBMEM console to run as a persistent ring-buffer
by Julius Werner 25 Apr '17

25 Apr '17

> > Did you check that all implementations use unsigned? > Yes, all the ones that I'm now aware of used unsigned, 32-bit. > I am able to build it, I just had to figure out how and install some >> dependencies. But I tried booting it on an HP Chromebook 14 2013 (falco) >> and it doesn't seem to recognize my keyboard >> > Is it PS2 or USB? Is at_keyboard included in the payload? > It's a matrixed laptop keyboard. I believe the embedded controller does 8042 emulation, but I'm not sure honestly. I'm an ARM guy and this was the one old x86 machine I have lying around. I can try USB if I get it to not crash long enough to type something. even if it did, it probably wouldn't have a keyboard driver for them >> either. I assume there's no way to make it run over the UART instead?) >> > terminal_input serial_com0 > terminal_output serial_com0 > In etc/grub.cfg > I don't think I have an etc/grub.cfg... is there a way to compile that in instead? > Possibly the problem is that some module hangs. Can you try minimal GRUB > without non-essential modules? > >> How do I do that? Is there some configure flag? For reference, I did: ./autogen.sh ./configure --with-platform=coreboot make make default_payload.elf <cbfstool default_payload.elf into my coreboot image and flash it>

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Re: [coreboot] RFC: Changing CBMEM console to run as a persistent ring-buffer
by Vladimir 'phcoder' Serbinenko 25 Apr '17

25 Apr '17

On Tue, Apr 25, 2017, 20:15 Julius Werner <jwerner(a)chromium.org> wrote: > I'm very concerned with compatibility. You can't guarantee that coreboot >> and payload match. And in case of mismatch you get a memory corruption that >> is very hard to trace. Can we please change signature of cbmem entry? > > > I would rather allow older implementations to continue working as best as > possible. Changing the signature would mean that an old payload (or 'cbmem' > command line tool, etc.) couldn't interoperate at all with the console. The > changes I made are as backwards-compatible as possible: in many cases (e.g. > before the console rolled over once) the old payload will continue working > just fine. If the console did roll over, the old payload can no longer > append lines and may print existing contents out of order. It will never > access invalid memory, though. (You may have been worried about bit 31 I'm > setting in the "cursor" field, but all existing implementations were > already required to check (cursor < size) before trusting the cursor to be > accessible since the old console would continue counting characters even > after the buffer filled up.) > Did you check that all implementations use unsigned? > > >> You mentioned having trouble building GRUB. Can you detail those? >> What do you mean by not having hardware supported by grub-coreboot? >> Grub-coreboot should work on all coreboot-supported boards. >> > > I am able to build it, I just had to figure out how and install some > dependencies. But I tried booting it on an HP Chromebook 14 2013 (falco) > and it doesn't seem to recognize my keyboard > Is it PS2 or USB? Is at_keyboard included in the payload? > and will reboot a few seconds after displaying the GRUB console. (Most of > the devices I have are ARM unfortunately, which I'm assuming it doesn't > support since all the coreboot code is in i386 directories? > Arm is in separate branch due to freeze. > even if it did, it probably wouldn't have a keyboard driver for them > either. I assume there's no way to make it run over the UART instead?) > terminal_input serial_com0 terminal_output serial_com0 In etc/grub.cfg Possibly the problem is that some module hangs. Can you try minimal GRUB without non-essential modules? >

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coreboot April 2017