coreboot April 2017

coreboot@coreboot.org

65 participants
143 discussions

Re: [coreboot] [SeaBIOS] RFC: Changing CBMEM console to run as a persistent ring-buffer
by Gerd Hoffmann 11 Apr '17

11 Apr '17

Hi, > The change may also cause some hiccups if you're using a newer version > of coreboot with an older version of cbmem (or SeaBIOS or whatever > else reads the console): seabios doesn't read the log, instead it'll append its own messages. Which I expect will continue to work fine, except when it hits the end of the log buffer, where seabios will simply stop logging instead of rolling over. cheers, Gerd

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RFC: Changing CBMEM console to run as a persistent ring-buffer
by Julius Werner 11 Apr '17

11 Apr '17

Hi folks, I'm planning to make some changes to coreboot's CBMEM console with https://review.coreboot.org/#/c/18301 that should make it easier to debug problems spanning multiple reboots. I'm trying my best to avoid breaking previous behavior and keeping it compatible with older code, but there'll be some edge cases so Aaron suggested I announce it here. The basic idea is to turn the console into a persistent ring buffer. If coreboot finds an already initialized console in memory during boot, it will just continue appending to it rather than begin writing from the start of the buffer again. This means that if you run cbmem -c, the most recent boot will always be at the bottom of the output, and you can scroll further up to see logs from the boot before that (assuming you didn't lose DRAM power or something). It may also give some runtime firmware components (like we have on ARM64) a good place to log stuff and persist crash dumps in the future. The console buffer will fill up eventually with enough reboots, so when that happens we will start discarding the oldest lines from the log. This means the behavior if the log buffer is too small for even a single full boot will become slightly different: we'll only keep the latest lines, whereas previously we would only keep the earliest lines and a counter of dropped characters. I don't think this should be an issue though, since we normally should have enough buffer to fit a whole boot anyway (the default is currently 128KB which ought to be enough for any board). The change may also cause some hiccups if you're using a newer version of coreboot with an older version of cbmem (or SeaBIOS or whatever else reads the console): it will not crash and it will still print the whole log, but if the log has rolled over (into "ring buffer mode") it will print lines out of order. This is unfortunately the best I can do with the way current readers are implemented. I'm of course also updating the code for cbmem so as soon as you deploy the new version it will be able to display buffers from both old and new coreboot versions correctly. (I'll send patches to align SeaBIOS and the Linux memconsole driver in the same manner as soon as the coreboot patch is approved.) Let me know if you have any concerns about this.

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ASUS KGPE-D16 Automated Test Failure [master]
by Raptor Engineering Automated Coreboot Test Stand 11 Apr '17

11 Apr '17

The ASUS KGPE-D16 fails verification for branch master as of commit f170e71630bff4b181dbd5b209d9fb3f8ce35131 The following tests failed: BOOT_FAILURE Commits since last successful test: See attached log for details This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification

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Re: [coreboot] What's the relationship between ACPI and SMM?
by Duncan Laurie 10 Apr '17

10 Apr '17

On Sun, Apr 2, 2017 at 10:43 PM, Iru Cai <mytbk920423(a)gmail.com> wrote: > Hello, > > I'm trying to write some ACPI code to support an EC. I don't know if I > need to write an smihandler.c for the boards. > > I saw some mainboard code. Older boards such as lenovo/x200 have no > smihandler.c, but newer boards such as lenovo/x220 have. Also, I don't know > much about things like GPE, SCI, ..., even after I look at the ACPI > specification. > > So can some one sort out what happens when there is a event (e.g. Lid > open/close), and what the EC and ACPI OS should do. What needs to be added > in the mainboard code? > > A few years ago I tried to describe how this works for a presentation at linux.conf.au, you may find slides 35-44 of this slide deck helpful: https://docs.google.com/presentation/d/1Cyz2gyyxg7hZBeCp_LSDGbEhsqy6OqsJTBL… -duncan

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Re: [coreboot] Coreboot gamers?
by Patrick Rudolph 09 Apr '17

09 Apr '17

None of the features you listed are implemented as there's no public documentation how to change those values. It might be possible to decrease the critical temperature limit, which would reduce CPU clock speed once it gets too hot. Have a look at the t420 mainboard specific configuration. Regards, Patrick On April 9, 2017 6:15:18 PM GMT+02:00, Pok Gu <pokgoo002(a)gmail.com> wrote: >I was wondering how to overclock the CPU multiplier or BCLK or adjust >vcore voltage using coreboot as most gamer motherboard will do. I'm >using >T420 with coreboot, and sometimes the temperature goes too high. I'm >thinking about lowing vcore may help a bit? > >Cheers >Pok > >2017-04-04 22:28 GMT+08:00 Taiidan(a)gmx.com <Taiidan(a)gmx.com>: > >> On 04/03/2017 08:25 AM, Denis 'GNUtoo' Carikli wrote: >> >> On Sun, 2 Apr 2017 16:05:42 -0400 >>> "Taiidan(a)gmx.com" <Taiidan(a)gmx.com> wrote: >>> >>> Hey any other coreboot gamers? >>>> >>> Hi, >>> >>> What are your specs, games do you play >>>> and on what settings? >>>> >>> I don't play often, and some of the times, it's to test if the GPU >>> still works fine. I only play free software games, and I don't have >>> enough time to investigate games that are not packaged in the >GNU/Linux >>> distribution[1] I use. >>> >>> As the games I test/play: >>> - Xonotic >>> - Supertuxkart >>> >>> I like a lot some other games, but they are probably not relevant >here >>> because they are not that demanding with reguard to computer >>> specifications. >>> For instance Battle for wesnoth doesn't even require 3D >acceleration... >>> >>> I purchased my D16 specifically for IOMMU-GFX VM gaming, I have a >>>> 6274 with a geforce gtx 780 and the new highly multithreaded games >>>> work great on it - right now I am playing battlefield 1 and wargame >>>> red dragon on high settings. I do want to get a 6386 or dual 6328's >>>> so that I can play older games though due to my CPU's crappy single >>>> thread performance. >>>> >>> In the computers I have[2], the i945 thinkpads are too old to be >able >>> to play recent supertuxkart versions on my distribution[1]. >>> I didn't test gaming extensively yet on the Lenovo Thinkpad X200 as >I >>> would need to go buy more RAM to do that: 2G of RAM isn't enough to >>> some of the more demanding games I care about. >>> >> You could get an ExpressCard eGPU for your x200 or x220's, I used to >do >> that and it works decently. >> >>> >>> I don't have my desktops here, and I don't remember the GPU models, >I >>> only know that they are supported by nouveau and work with free >>> software firmwares. I use fanless GPUs to avoid them making too much >>> noise. >>> The nice side effect is that nouveau doesn't need to handle power >>> management to make use of them efficently. >>> >>> I tested supertuxkart on the: >>> - Asus F2A85-M PRO >>> - Asus M4A785T-M >>> >>> While I'm able to play, the ports are not complete yet and might >>> require additional hardware such as: >>> - USB Ethernet card in the case of the F2A85M PRO >>> - USB Sound card in the case of the M4A785T-M >>> >> I have always wondered what comes in to the porting choices of >people, how >> come you are porting a 7xx series chipset board instead of an 8xx or >9xx? >> (as they are better, newer and support IOMMU) >> Or why leah had the KGPE-D16 ported and not one of the better newer >(2014) >> Supermicro boards with dual northbridge (so way more pci-e lanes to >go >> around) and onboard SR-IOV nics. (82576L vs D16's 82574L) >> Thanks >> >>> >>> Does anyone use Crossfire xDMA? It has dual 2.0 x16 slots and PCI-e >>>> ACS so it should work (and people have reported it does with the >>>> vendor bios) >>>> >>> It would be interesting to see how the free software linux drivers >>> handles it too: >>> - Nouveau doesn't seem to support[3]. >>> - Radeon doesn't seem to support it either[4]. >>> >> I game in a windows VM, so I would be attaching both cards to it. I >would >> be getting radeon as nvidia doesn't like FOSS or IOMMU-GFX on their >> "consumer" platforms (see the code 43 "bug" they introduced) >> >>> >>> However I wonder if SLI/Crossfire is still stricly required to be >able >>> to efficently use several GPU in a computer: >>> It might be interesting to see if there are (less efficent?) ways to >>> use several GPUs in the same game with GPU offloading / render >nodes. >>> >>> I personally have 2 nvidia GPUs so it might be worth investigating >it. >>> >>> I would need to add support for the F2A85-M pro for the second pcie >16x >>> slot first though. >>> >>> References: >>> ----------- >>> [1]Parabola: https://www.parabola.nu/ >>> [2]https://www.coreboot.org/User:GNUtoo#My_hardware >>> [3]https://nouveau.freedesktop.org/wiki/FeatureMatrix/ >>> [4]https://www.x.org/wiki/RadeonFeature/ >>> [5]https://wiki.archlinux.org/index.php/PRIME#PRIME_GPU_offloading >>> >>> Denis. >>> >> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot >>

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Coreboot gamers?
by Taiidan＠gmx.com 09 Apr '17

09 Apr '17

Hey any other coreboot gamers? What are your specs, games do you play and on what settings? Me: I purchased my D16 specifically for IOMMU-GFX VM gaming, I have a 6274 with a geforce gtx 780 and the new highly multithreaded games work great on it - right now I am playing battlefield 1 and wargame red dragon on high settings. I do want to get a 6386 or dual 6328's so that I can play older games though due to my CPU's crappy single thread performance. Does anyone use Crossfire xDMA? It has dual 2.0 x16 slots and PCI-e ACS so it should work (and people have reported it does with the vendor bios)

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Re: [coreboot] INTEL VBT (Video BIOS Table)
by Naveed Ghori 09 Apr '17

09 Apr '17

Please check. Link not working for me. ________________________________ From: coreboot [coreboot-bounces(a)coreboot.org] on behalf of Zoran Stojsavljevic [zoran.stojsavljevic(a)gmail.com] Sent: Saturday, 8 April 2017 9:48 PM To: coreboot Subject: [coreboot] INTEL VBT (Video BIOS Table) Here it is: https://en.wikipedia.org/wiki/Coreboot/VBT Feel absolutely free to review it, to add/modify/discuss/hit me with the baseball bat, yell/scream/sob at me... :-) Best Regards, Zoran

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ASUS KGPE-D16 Automated Test Failure [master]
by Raptor Engineering Automated Coreboot Test Stand 08 Apr '17

08 Apr '17

The ASUS KGPE-D16 fails verification for branch master as of commit acc599b839dff95d062883ef3a5ff6f1f9fc256c The following tests failed: BOOT_FAILURE Commits since last successful test: acc599b AGESA: Add helpers to track heap relocation e522258 AGESA f14: Fix memory clock register decoding See attached log for details This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification

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INTEL VBT (Video BIOS Table)
by Zoran Stojsavljevic 08 Apr '17

08 Apr '17

Here it is: https://en.wikipedia.org/wiki/Coreboot/VBT Feel absolutely free to review it, to add/modify/discuss/hit me with the baseball bat, yell/scream/sob at me... :-) Best Regards, Zoran

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Re: [coreboot] do i have to install gcc-multilib, in order to build coreboot 4.5?
by Nico Huber 08 Apr '17

08 Apr '17

Hi Zoran, On 07.04.2017 21:42, Zoran Stojsavljevic wrote: > You see, Nico... Here! > >> VBT is documented by intel-gpu-tools. There's intel_vbt_decode (former > intel_bios_decode) available >> https://cgit.freedesktop.org/xorg/app/intel-gpu-tools/tree/ > tools/intel_vbt_decode.c that will print all >> tables in human readable form. >> Regards Patrick > > I needed to spend two hours to assemble the entire context for: > intel_vbt_decode.c > <https://cgit.freedesktop.org/xorg/app/intel-gpu-tools/tree/tools/intel_vbt_…> > . > And to install 3+ > packages (Fedora 25 wise). And much much more. To get VBT in the human > readable form... > > I assume, all the people using Coreboot are at least Linux intermediate > users. At least/minimum?! regarding users that build coreboot by themselves, I'd expect that. > Maybe, I am mistaken, after all??? > > Please, enlighten me? I'm not sure what you are asking for? enlighten about what? intel- gpu-tools? If you are stuck with that somewhere, you have to be more specific. Nico PS. intel-gpu-tools comes prepackaged for my distribution (ArchLinux).

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coreboot April 2017