coreboot February 2013

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Patch merged into coreboot/master: 580fa2b console: Only print romstage messages with EARLY_CONSOLE enabled.
by gerrit＠coreboot.org 08 Feb '13

08 Feb '13

the following patch was just integrated into master: commit 580fa2bf316d4796e5ed76cbbd3e454479fb0688 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 21:51:15 2013 +0800 console: Only print romstage messages with EARLY_CONSOLE enabled. Revise console source file dependency (especially for EARLY_CONSOLE) and interpret printk/console_init according to EARLY_CONSOLE setting (no-ops if EARLY_CONSOLE is not defined). Verified to boot on x86/qemu and armv7/snow. Disabling EARLY_CONSOLE correctly stops romstage messages on x86/qemu (armv7/snow needs more changes to work). Change-Id: Idbbd3a26bc1135c9d3ae282aad486961fb60e0ea Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2300 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Thu Feb 7 12:04:16 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 8 02:02:26 2013, giving +2 See http://review.coreboot.org/2300 for details. -gerrit

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Patch merged into coreboot/master: f7fcb20 console: Always allow setting "EARLY_CONSOLE" configuration.
by gerrit＠coreboot.org 08 Feb '13

08 Feb '13

the following patch was just integrated into master: commit f7fcb2056f2ddf151517366a4caf2b6c52b0d920 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Thu Feb 7 13:41:56 2013 +0800 console: Always allow setting "EARLY_CONSOLE" configuration. Early console should always be allowed to be turned on / off (for generating production and debug versions), and should not be enforced by "select" Kconfig rule. A new "DEFAULT_EARLY_CONSOLE" is introduced for devices to select if they prefer early console output by default. Verified Kconfig value on qemu/x86 (default y by CACHE_AS_RAM), snow/x86 (default y by EXYNOS5 config), and intel/jarrell (default n). Change-Id: Ib1cc76d4ec115a302b95e7317224f1a40d1ab035 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2307 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Thu Feb 7 13:18:39 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 8 02:01:15 2013, giving +2 See http://review.coreboot.org/2307 for details. -gerrit

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Patch merged into coreboot/master: 31bb2df exynos/snow: Configure UART peripheral during console initialization.
by gerrit＠coreboot.org 08 Feb '13

08 Feb '13

the following patch was just integrated into master: commit 31bb2df5086bfde706378b1d80bd53fec69697a2 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Thu Feb 7 19:30:40 2013 +0800 exynos/snow: Configure UART peripheral during console initialization. For Exynos platforms, the UART component on pinmux must be first selected and configured. This should be done as part of UART console initialization. Note, that the current implementation hard-codes the device index as UART3, while the base port can be assigned to different device in Kconfig. This will be fixed later. Verified to work on armv7/snow. Change-Id: Ie63e76e2dac09fec1132573d1b0027fce55333a1 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2315 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Thu Feb 7 15:41:36 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 8 01:59:42 2013, giving +2 See http://review.coreboot.org/2315 for details. -gerrit

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Patch merged into coreboot/master: ad173ea console: Revise serial console configuration names.
by gerrit＠coreboot.org 08 Feb '13

08 Feb '13

the following patch was just integrated into master: commit ad173ea70bee9ca0dc8eb5b79be8497a51dbe1c8 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 21:24:12 2013 +0800 console: Revise serial console configuration names. The console drivers (especially serial drivers) in Kconfig were named in different styles. This change will rename configuration names to a better naming style. - EARLY_CONSOLE: Enable output in pre-ram stage. (Renamed from EARLY_SERIAL_CONSOLE because it also supports non-serial) - CONSOLE_SERIAL: Enable serial output console, from one of the serial drivers. (Renamed from SERIAL_CONSOLE because other non-serial drivers are named as CONSOLE_XXX like CONSOLE_CBMEM) - CONSOLE_SERIAL_UART: Device-specific UART driver. (Renamed from CONSOLE_SERIAL_NONSTANDARD_MEM because it may be not memory-mapped) - HAVE_UART_SPECIAL: A dependency for CONSOLE_SERIAL_UART. Verified to boot on x86/qemu and armv7/snow, and still seeing console messages in romstage for both platforms. Change-Id: I4bea3c8fea05bbb7d78df6bc22f82414ac66f973 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2299 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 8 01:51:31 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 8 01:56:15 2013, giving +2 See http://review.coreboot.org/2299 for details. -gerrit

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Patch set updated for coreboot: e8ed3ac console: Revise serial console configuration names.
by David Hendricks 08 Feb '13

08 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2299 -gerrit commit e8ed3ac0ff76e024a861aec34c85ead47e4c25a4 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Feb 6 21:24:12 2013 +0800 console: Revise serial console configuration names. The console drivers (especially serial drivers) in Kconfig were named in different styles. This change will rename configuration names to a better naming style. - EARLY_CONSOLE: Enable output in pre-ram stage. (Renamed from EARLY_SERIAL_CONSOLE because it also supports non-serial) - CONSOLE_SERIAL: Enable serial output console, from one of the serial drivers. (Renamed from SERIAL_CONSOLE because other non-serial drivers are named as CONSOLE_XXX like CONSOLE_CBMEM) - CONSOLE_SERIAL_UART: Device-specific UART driver. (Renamed from CONSOLE_SERIAL_NONSTANDARD_MEM because it may be not memory-mapped) - HAVE_UART_SPECIAL: A dependency for CONSOLE_SERIAL_UART. Verified to boot on x86/qemu and armv7/snow, and still seeing console messages in romstage for both platforms. Change-Id: I4bea3c8fea05bbb7d78df6bc22f82414ac66f973 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/Kconfig | 4 ++++ src/arch/armv7/lib/romstage_console.c | 6 +++--- src/console/Kconfig | 39 ++++++++++++++++++----------------- src/console/Makefile.inc | 4 ++-- src/console/console.c | 2 +- src/cpu/Kconfig | 2 +- src/cpu/samsung/Kconfig | 5 ++++- src/include/console/console.h | 4 ++-- src/mainboard/google/snow/Kconfig | 5 ++--- src/mainboard/google/snow/bootblock.c | 4 ++-- 10 files changed, 41 insertions(+), 34 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 92bdf11..32a63d8 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -277,6 +277,10 @@ config HAVE_UART_MEMORY_MAPPED bool default n +config HAVE_UART_SPECIAL + bool + default n + config HAVE_ACPI_RESUME bool default n diff --git a/src/arch/armv7/lib/romstage_console.c b/src/arch/armv7/lib/romstage_console.c index 42a9664..b0ac34e 100644 --- a/src/arch/armv7/lib/romstage_console.c +++ b/src/arch/armv7/lib/romstage_console.c @@ -20,7 +20,7 @@ #include <console/console.h> #include <console/vtxprintf.h> // TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250) -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL #include <uart.h> #endif #if CONFIG_USBDEBUG @@ -33,7 +33,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL_UART uart_tx_byte(byte); #endif #if CONFIG_USBDEBUG @@ -46,7 +46,7 @@ void console_tx_byte(unsigned char byte) static void _console_tx_flush(void) { -#if CONFIG_SERIAL_CONSOLE +#if CONFIG_CONSOLE_SERIAL_UART uart_tx_flush(); #endif #if CONFIG_USBDEBUG diff --git a/src/console/Kconfig b/src/console/Kconfig index b1f41de..e57d568 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -1,20 +1,21 @@ menu "Console" -config SERIAL_CONSOLE - bool "Serial port console output" - default y - help - Send coreboot debug output to a serial port -config EARLY_SERIAL_CONSOLE - bool - depends on SERIAL_CONSOLE +config EARLY_CONSOLE + bool "Enable early (pre-RAM) console output." default n help - Use serial console during early (pre-RAM) boot stages + Use console during early (pre-RAM) boot stages + +config CONSOLE_SERIAL + bool "Serial port console output" + default y + help + Send coreboot debug output to a serial port (should be one or more of + CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART) config CONSOLE_SERIAL8250 bool "Serial port console output (I/O mapped, 8250-compatible)" - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL depends on HAVE_UART_IO_MAPPED default y help @@ -22,21 +23,21 @@ config CONSOLE_SERIAL8250 config CONSOLE_SERIAL8250MEM bool "Serial port console output (memory mapped, 8250-compatible)" - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL depends on HAVE_UART_MEMORY_MAPPED help Send coreboot debug output to a memory mapped serial port console. -config CONSOLE_SERIAL_NONSTANDARD_MEM - bool "Serial port console output (memory-mapped, device-specific)" - depends on SERIAL_CONSOLE - depends on HAVE_UART_MEMORY_MAPPED +config CONSOLE_SERIAL_UART + bool "Serial port console output (device-specific UART)" + depends on CONSOLE_SERIAL + depends on HAVE_UART_SPECIAL + default y help - Send coreboot debug output to a memory mapped serial port console - on a device-specific UART. + Send coreboot debug output to a device-specific serial port console. choice - prompt "Serial port" + prompt "Serial port for 8250" default CONSOLE_SERIAL_COM1 depends on CONSOLE_SERIAL8250 @@ -72,7 +73,7 @@ config TTYS0_BASE choice prompt "Baud rate" default CONSOLE_SERIAL_115200 - depends on SERIAL_CONSOLE + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_115200 bool "115200" diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index dd826d6..8e6037a 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,13 +10,13 @@ smm-y += vtxprintf.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-y += vtxprintf.c -romstage-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +romstage-$(CONFIG_EARLY_CONSOLE) += console.c romstage-y += post.c romstage-y += die.c # TODO Add vtxprintf.c only when early console is required. bootblock-y += vtxprintf.c -bootblock-$(CONFIG_EARLY_SERIAL_CONSOLE) += console.c +bootblock-$(CONFIG_EARLY_CONSOLE) += console.c bootblock-y += die.c ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c diff --git a/src/console/console.c b/src/console/console.c index 4c47d7f..d4b4b88 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -107,7 +107,7 @@ void console_init(void) enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL uart_init(); #endif #if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index ddc46cf..c2c3816 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -16,7 +16,7 @@ source src/cpu/x86/Kconfig config CACHE_AS_RAM bool - select EARLY_SERIAL_CONSOLE + select EARLY_CONSOLE default !ROMCC config DCACHE_RAM_BASE diff --git a/src/cpu/samsung/Kconfig b/src/cpu/samsung/Kconfig index abfc049..c905b2a 100644 --- a/src/cpu/samsung/Kconfig +++ b/src/cpu/samsung/Kconfig @@ -5,7 +5,10 @@ config CPU_SAMSUNG_EXYNOS config CPU_SAMSUNG_EXYNOS5 depends on ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS - select EARLY_SERIAL_CONSOLE + select HAVE_UART_SPECIAL + # TODO remove EARLY_CONSOLE when we can run ramstage without early UART + # init. + select EARLY_CONSOLE bool default n diff --git a/src/include/console/console.h b/src/include/console/console.h index 375e5a4..edd49e0 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -24,8 +24,8 @@ #include <console/loglevel.h> #include <console/post_codes.h> -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> +#if CONFIG_CONSOLE_SERIAL +#include <uart.h> #endif #if CONFIG_USBDEBUG #include <usbdebug.h> diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index a0c76d6..bee987d 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS5 select HAVE_UART_MEMORY_MAPPED - select CONSOLE_SERIAL_NONSTANDARD_MEM # enable serial debugging # select EC_GOOGLE_CHROMEEC select BOARD_ROMSIZE_KB_4096 select DRIVER_MAXIM_MAX77686 @@ -71,7 +70,7 @@ config NR_DRAM_BANKS choice prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_NONSTANDARD_MEM + depends on CONSOLE_SERIAL_UART config CONSOLE_SERIAL_UART0 bool "UART0" @@ -97,7 +96,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_NONSTANDARD_MEM + depends on CONSOLE_SERIAL_UART default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index bcfe440..b57b6c3 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#if CONFIG_EARLY_SERIAL_CONSOLE +#if CONFIG_EARLY_CONSOLE #include <types.h> #include <arch/io.h> #include <cbfs.h> @@ -40,7 +40,7 @@ void bootblock_mainboard_init(void) arm_ratios = get_arm_clk_ratios(); system_clock_init(mem, arm_ratios); -#if CONFIG_EARLY_SERIAL_CONSOLE +#if CONFIG_EARLY_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); printk(BIOS_INFO, "\n\n\n%s: UART initialized\n", __func__);

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Patch merged into coreboot/master: 1c31879 Revert "armv7/snow: Move clock initialization from bootblock to romstage."
by gerrit＠coreboot.org 08 Feb '13

08 Feb '13

the following patch was just integrated into master: commit 1c3187932d1399bef60788759f75a60179a6a474 Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri Feb 8 01:25:04 2013 +0100 Revert "armv7/snow: Move clock initialization from bootblock to romstage." This reverts commit 9029f4b63f6d0e29bf1608e666cdb025de45ca24 This patch needs to go at the end of the UART patch set. Sorry 'bout the confusion! Change-Id: I5702c7d6130daf95776f2c15d24e5d253691cefd Reviewed-on: http://review.coreboot.org/2319 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 8 01:32:28 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 8 01:35:48 2013, giving +2 See http://review.coreboot.org/2319 for details. -gerrit

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New patch to review for coreboot: cb2c6f7 Revert "armv7/snow: Move clock initialization from bootblock to romstage."
by David Hendricks 08 Feb '13

08 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2319 -gerrit commit cb2c6f7f27fc0d47bc6e5cb847c9ae7f63f6b689 Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri Feb 8 01:25:04 2013 +0100 Revert "armv7/snow: Move clock initialization from bootblock to romstage." This reverts commit 9029f4b63f6d0e29bf1608e666cdb025de45ca24 This patch needs to go at the end of the UART patch set. Sorry 'bout the confusion! Change-Id: I5702c7d6130daf95776f2c15d24e5d253691cefd --- src/mainboard/google/snow/Makefile.inc | 4 ++++ src/mainboard/google/snow/bootblock.c | 11 ++++++++++- src/mainboard/google/snow/romstage.c | 9 +-------- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc index b56a1a4..04bf543 100644 --- a/src/mainboard/google/snow/Makefile.inc +++ b/src/mainboard/google/snow/Makefile.inc @@ -17,6 +17,10 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +# needed for system_clock_init() +bootblock-y += mainboard.c +bootblock-y += memory.c + romstage-y += mainboard.c romstage-y += memory.c romstage-y += romstage.c diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 18306cc..bcfe440 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -23,14 +23,23 @@ #include <cbfs.h> #include <uart.h> #include <console/console.h> +#include <cpu/samsung/exynos5250/clk.h> +#include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/periph.h> -#include <cpu/samsung/exynos5250/pinmux.h> +#include <cpu/samsung/exynos5250/clock_init.h> #endif void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { + struct mem_timings *mem; + struct arm_clk_ratios *arm_ratios; + + mem = get_mem_timings(); + arm_ratios = get_arm_clk_ratios(); + system_clock_init(mem, arm_ratios); + #if CONFIG_EARLY_SERIAL_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index c0bb6f4..b8e5116 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -26,7 +26,6 @@ #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/setup.h> -#include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> #include <arch/stages.h> @@ -49,19 +48,13 @@ static int board_wakeup_permitted(void) void main(void) { struct mem_timings *mem; - struct arm_clk_ratios *arm_ratios; int ret; void *entry; - /* Clock must be initialized before console_init, otherwise you may need - * to re-initialize serial console drivers again. */ - mem = get_mem_timings(); - arm_ratios = get_arm_clk_ratios(); - system_clock_init(mem, arm_ratios); - console_init(); printk(BIOS_INFO, "hello from romstage\n"); + mem = get_mem_timings(); if (!mem) { printk(BIOS_CRIT, "Unable to auto-detect memory timings\n"); while(1);

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Patch merged into coreboot/master: 9029f4b armv7/snow: Move clock initialization from bootblock to romstage.
by gerrit＠coreboot.org 07 Feb '13

07 Feb '13

the following patch was just integrated into master: commit 9029f4b63f6d0e29bf1608e666cdb025de45ca24 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Thu Feb 7 21:38:41 2013 +0800 armv7/snow: Move clock initialization from bootblock to romstage. Exynos system clock can be initialized before RAM init, not necessary to be in the very beginning (boot block). This helps reducing bootblock dependency. Verified to boot on armv7/snow. Change-Id: Ic863e222871a157ba4279a673775b1e18c6eac0d Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2308 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Thu Feb 7 22:53:38 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Thu Feb 7 22:54:02 2013, giving +2 See http://review.coreboot.org/2308 for details. -gerrit

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Patch set updated for coreboot: 2d595b5 armv7/snow: Move clock initialization from bootblock to romstage.
by David Hendricks 07 Feb '13

07 Feb '13

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2308 -gerrit commit 2d595b5690c7d18fef25b28d7aa2982f17cba66e Author: Hung-Te Lin <hungte(a)chromium.org> Date: Thu Feb 7 21:38:41 2013 +0800 armv7/snow: Move clock initialization from bootblock to romstage. Exynos system clock can be initialized before RAM init, not necessary to be in the very beginning (boot block). This helps reducing bootblock dependency. Verified to boot on armv7/snow. Change-Id: Ic863e222871a157ba4279a673775b1e18c6eac0d Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/mainboard/google/snow/Makefile.inc | 4 ---- src/mainboard/google/snow/bootblock.c | 11 +---------- src/mainboard/google/snow/romstage.c | 9 ++++++++- 3 files changed, 9 insertions(+), 15 deletions(-) diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc index 04bf543..b56a1a4 100644 --- a/src/mainboard/google/snow/Makefile.inc +++ b/src/mainboard/google/snow/Makefile.inc @@ -17,10 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -# needed for system_clock_init() -bootblock-y += mainboard.c -bootblock-y += memory.c - romstage-y += mainboard.c romstage-y += memory.c romstage-y += romstage.c diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index bcfe440..18306cc 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -23,23 +23,14 @@ #include <cbfs.h> #include <uart.h> #include <console/console.h> -#include <cpu/samsung/exynos5250/clk.h> -#include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/periph.h> -#include <cpu/samsung/exynos5250/clock_init.h> +#include <cpu/samsung/exynos5250/pinmux.h> #endif void bootblock_mainboard_init(void); void bootblock_mainboard_init(void) { - struct mem_timings *mem; - struct arm_clk_ratios *arm_ratios; - - mem = get_mem_timings(); - arm_ratios = get_arm_clk_ratios(); - system_clock_init(mem, arm_ratios); - #if CONFIG_EARLY_SERIAL_CONSOLE exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); uart_init(); diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index b8e5116..c0bb6f4 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -26,6 +26,7 @@ #include <cpu/samsung/exynos5250/dmc.h> #include <cpu/samsung/exynos5250/setup.h> +#include <cpu/samsung/exynos5250/clock_init.h> #include <console/console.h> #include <arch/stages.h> @@ -48,13 +49,19 @@ static int board_wakeup_permitted(void) void main(void) { struct mem_timings *mem; + struct arm_clk_ratios *arm_ratios; int ret; void *entry; + /* Clock must be initialized before console_init, otherwise you may need + * to re-initialize serial console drivers again. */ + mem = get_mem_timings(); + arm_ratios = get_arm_clk_ratios(); + system_clock_init(mem, arm_ratios); + console_init(); printk(BIOS_INFO, "hello from romstage\n"); - mem = get_mem_timings(); if (!mem) { printk(BIOS_CRIT, "Unable to auto-detect memory timings\n"); while(1);

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Patch merged into coreboot/master: 632d6fe YABEL: use system {in, out}[bwl] on x86
by gerrit＠coreboot.org 07 Feb '13

07 Feb '13

the following patch was just integrated into master: commit 632d6fe3fc8b71e00438bddf972ff2936447a03c Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Feb 7 15:53:54 2013 +0100 YABEL: use system {in,out}[bwl] on x86 The prototypes that were recently defined only work for the internal implementations. Change-Id: Ib34bb75a0b882533da550b9cd17cd777c2463e02 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Reviewed-on: http://review.coreboot.org/2318 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Feb 7 16:09:16 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Feb 7 18:16:55 2013, giving +2 See http://review.coreboot.org/2318 for details. -gerrit

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coreboot February 2013