Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2383
-gerrit
commit b5cd09f89299c7798fa46c89e94dae860a9696b0
Author: Zheng Bao <fishbaozi(a)gmail.com>
Date: Wed Feb 13 19:01:55 2013 +0800
AMD S3: Remove hardcoded size of volatile storage
The size of volatile storage for S3 can be configured.
The space is divided into several parts. Make sure the
sum of each part is not above the limit.
Change-Id: I9152797cf0045c8da48109a9d760e417717686db
Signed-off-by: Zheng Bao <zheng.bao(a)amd.com>
Signed-off-by: zheng Bao <fishbaozi(a)gmail.com>
---
src/cpu/amd/agesa/s3_resume.h | 5 +++++
src/southbridge/amd/Makefile.inc | 2 +-
src/southbridge/amd/agesa/hudson/Kconfig | 8 ++++++++
src/southbridge/amd/cimx/sb700/Kconfig | 7 +++++++
src/southbridge/amd/cimx/sb800/Kconfig | 8 ++++++++
src/southbridge/amd/cimx/sb900/Kconfig | 8 ++++++++
6 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h
index 39ad30a..9f66d6a 100644
--- a/src/cpu/amd/agesa/s3_resume.h
+++ b/src/cpu/amd/agesa/s3_resume.h
@@ -28,6 +28,11 @@
#define S3_DATA_MTRR_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_VOLATILE_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
+#if (S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_VOLATILE_SIZE
+#error "Pleaes expand your S3_VOLATILE_SIZE"
+#endif
+
+
typedef enum {
S3DataTypeNonVolatile=0, ///< NonVolatile Data Type
S3DataTypeVolatile ///< Volatile Data Type
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc
index 1b2cb1f..b6af980 100644
--- a/src/southbridge/amd/Makefile.inc
+++ b/src/southbridge/amd/Makefile.inc
@@ -22,7 +22,7 @@ ifeq ($(CONFIG_CPU_AMD_AGESA), y)
$(obj)/coreboot_s3nv.rom: $(obj)/config.h
echo " S3 NVRAM $(CONFIG_S3_VOLATILE_POS) (S3 storage area)"
# force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
- LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp
+ printf %d $(CONFIG_S3_VOLATILE_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1; i++) {printf "%c", 255}}' > $@.tmp
mv $@.tmp $@
cbfs-files-y += s3nv
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 92e5960..c652670 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -212,6 +212,14 @@ config S3_VOLATILE_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volitile storage at cold boot stage.
+config S3_VOLATILE_SIZE
+ hex "S3 volatile storage size"
+ default 0x8000
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volitile storage at cold boot stage.
+
config HUDSON_LEGACY_FREE
bool "System is legacy free"
help
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig
index f139450..4105393 100644
--- a/src/southbridge/amd/cimx/sb700/Kconfig
+++ b/src/southbridge/amd/cimx/sb700/Kconfig
@@ -68,5 +68,12 @@ config S3_VOLATILE_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volitile storage at cold boot stage.
+config S3_VOLATILE_SIZE
+ hex "S3 volatile storage size"
+ default 0x8000
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volitile storage at cold boot stage.
endif #SOUTHBRIDGE_AMD_CIMX_SB700
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 1f3ee9a..9add77b 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -130,6 +130,14 @@ config S3_VOLATILE_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volitile storage at cold boot stage.
+config S3_VOLATILE_SIZE
+ hex "S3 volatile storage size"
+ default 0x8000
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volitile storage at cold boot stage.
+
config SB800_IMC_FWM
bool "Add IMC firmware"
default n
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index acc369e..862589c 100755
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -61,5 +61,13 @@ config S3_VOLATILE_POS
For a system with S3 feature, the BIOS needs to save some data to
non-volitile storage at cold boot stage.
+config S3_VOLATILE_SIZE
+ hex "S3 volatile storage size"
+ default 0x8000
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volitile storage at cold boot stage.
+
endif #SOUTHBRIDGE_AMD_CIMX_SB900
Christian Gmeiner (christian.gmeiner(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2382
-gerrit
commit d78acfa0fe23318d75f5cb9d6f66a110ee6dccf0
Author: Christian Gmeiner <christian.gmeiner(a)gmail.com>
Date: Wed Feb 13 12:20:14 2013 +0100
OT200: add CMOS support
Change-Id: Ia25dc5b4f0ed3a2dd7cc67b7d3174db3a6eff70e
Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com>
---
src/mainboard/bachmann/ot200/Kconfig | 1 +
src/mainboard/bachmann/ot200/cmos.layout | 61 ++++++++++++++++++++++++++++++++
2 files changed, 62 insertions(+)
diff --git a/src/mainboard/bachmann/ot200/Kconfig b/src/mainboard/bachmann/ot200/Kconfig
index 5d185c0..0bf4a70 100644
--- a/src/mainboard/bachmann/ot200/Kconfig
+++ b/src/mainboard/bachmann/ot200/Kconfig
@@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select DRIVERS_I2C_IDREG
select PLL_MANUAL_CONFIG
select CORE_GLIU_500_266
+ select HAVE_OPTION_TABLE
config MAINBOARD_DIR
string
diff --git a/src/mainboard/bachmann/ot200/cmos.layout b/src/mainboard/bachmann/ot200/cmos.layout
new file mode 100644
index 0000000..90ade93
--- /dev/null
+++ b/src/mainboard/bachmann/ot200/cmos.layout
@@ -0,0 +1,61 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2013 Bachmann electronic GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+entries
+
+#start-bit length config config-ID name
+# -----------------------------------------------------------------
+# RTC reserved
+0 384 r 0 reserved_memory
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+384 3 e 1 baud_rate
+387 4 e 2 debug_level
+
+# -----------------------------------------------------------------
+# coreboot config options: check sums
+1008 16 h 0 check_sum
+
+enumerations
+
+#ID value text
+1 0 115200
+1 1 57600
+1 2 38400
+1 3 19200
+1 4 9600
+1 5 4800
+1 6 2400
+1 7 1200
+2 0 Emergency
+2 1 Alert
+2 2 Critical
+2 3 Error
+2 4 Warning
+2 5 Notice
+2 6 Info
+2 7 Debug
+2 8 Spew
+
+checksums
+
+checksum 400 1007 1008
+
+
Christian Gmeiner (christian.gmeiner(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2382
-gerrit
commit 5d30c3e15edc280722d36c50f25ba0f3882d348d
Author: Christian Gmeiner <christian.gmeiner(a)gmail.com>
Date: Wed Feb 13 11:51:45 2013 +0100
OT200: add CMOS support
Change-Id: Ia25dc5b4f0ed3a2dd7cc67b7d3174db3a6eff70e
Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com>
---
src/mainboard/bachmann/ot200/Kconfig | 1 +
src/mainboard/bachmann/ot200/cmos.layout | 61 ++++++++++++++++++++++++++++++++
2 files changed, 62 insertions(+)
diff --git a/src/mainboard/bachmann/ot200/Kconfig b/src/mainboard/bachmann/ot200/Kconfig
index 5d185c0..0bf4a70 100644
--- a/src/mainboard/bachmann/ot200/Kconfig
+++ b/src/mainboard/bachmann/ot200/Kconfig
@@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select DRIVERS_I2C_IDREG
select PLL_MANUAL_CONFIG
select CORE_GLIU_500_266
+ select HAVE_OPTION_TABLE
config MAINBOARD_DIR
string
diff --git a/src/mainboard/bachmann/ot200/cmos.layout b/src/mainboard/bachmann/ot200/cmos.layout
new file mode 100644
index 0000000..1fbc84e
--- /dev/null
+++ b/src/mainboard/bachmann/ot200/cmos.layout
@@ -0,0 +1,61 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2013 Bachmann electronic GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+entries
+
+#start-bit length config config-ID name
+# -----------------------------------------------------------------
+# RTC reserved
+0 384 r 0 reserved_memory
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+384 3 e 1 baud_rate
+387 4 e 2 debug_level
+
+# -----------------------------------------------------------------
+# coreboot config options: check sums
+1008 16 h 0 check_sum
+
+enumerations
+
+#ID value text
+1 0 115200
+1 1 57600
+1 2 38400
+1 3 19200
+1 4 9600
+1 5 4800
+1 6 2400
+1 7 1200
+2 0 Emergency
+2 1 Alert
+2 2 Critical
+2 3 Error
+2 4 Warning
+2 5 Notice
+2 6 Info
+2 7 Debug
+2 8 Spew
+
+checksums
+
+checksum 400 1007 1008
+
+
Christian Gmeiner (christian.gmeiner(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2381
-gerrit
commit 2863f92c923e49592c72432777b30b27e200ac34
Author: Christian Gmeiner <christian.gmeiner(a)gmail.com>
Date: Wed Feb 13 11:07:38 2013 +0100
console: Make use of CONFIG_USE_OPTION_TABLE
It makes much more sense to use CONFIG_USE_OPTION_TABLE instead
of CONFIG_HAVE_CMOS_DEFAULT. As we want to read the used
debug_level from our CMOS. This change makes it possible to
change log_debug via nvramtool and make use of the new
value after a reboot/poweroff.
CONFIG_HAVE_CMOS_DEFAULT does have an other meaning
Change-Id: I438dd01a2b4171dba2b73f2001511c71f4317725
Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com>
---
src/console/console.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/console/console.c b/src/console/console.c
index 34a26ec..afbba9d 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -30,7 +30,7 @@
* storage can be used. This will benefit machines without CMOS as well as those
* without a battery-backed CMOS (e.g. some laptops).
*/
-#if CONFIG_HAVE_CMOS_DEFAULT
+#if CONFIG_USE_OPTION_TABLE
#include <pc80/mc146818rtc.h>
#else
static inline int get_option(void *dest, const char *name) { return -1; }
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2380
-gerrit
commit 919313ae088d1705d51f1fc997b44ac0cdac5427
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Tue Feb 12 22:57:04 2013 -0800
armv7/exynos: remove some stale files leftover from initial import
This removes some files leftover from the initial import.
Change-Id: I325793ecb902b3b9430dcf531714ce025d201de6
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/arch/armv7/boot/wakeup.S | 94 -------
src/arch/armv7/ldscript_failover.lb | 74 ------
src/arch/armv7/ldscript_fallback_cbfs.lb | 51 ----
src/arch/armv7/lib/bootm.c | 405 -----------------------------
src/cpu/samsung/exynos5-common/sys_proto.h | 32 ---
src/cpu/samsung/exynos5250/sys_proto.h | 27 --
src/cpu/samsung/s5p-common/Makefile.uboot | 49 ----
7 files changed, 732 deletions(-)
diff --git a/src/arch/armv7/boot/wakeup.S b/src/arch/armv7/boot/wakeup.S
deleted file mode 100644
index 8ae337c..0000000
--- a/src/arch/armv7/boot/wakeup.S
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Rudolf Marek <r.marek(a)assembler.cz>
- * Copyright (C) 2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define WAKEUP_BASE 0x600
-#define RELOCATED(x) (x - __wakeup + WAKEUP_BASE)
-
-/* CR0 bits */
-#define PE (1 << 0)
-
- .code32
- .globl __wakeup
-__wakeup:
- /* First prepare the jmp to the resume vector */
- mov 0x4(%esp), %eax /* vector */
- /* last 4 bits of linear addr are taken as offset */
- andw $0x0f, %ax
- movw %ax, (__wakeup_offset)
- mov 0x4(%esp), %eax
- /* the rest is taken as segment */
- shr $4, %eax
- movw %ax, (__wakeup_segment)
-
- /* Then overwrite coreboot with our backed up memory */
- cld
- movl 8(%esp), %esi
- movl 12(%esp), %edi
- movl 16(%esp), %ecx
- shrl $2, %ecx
- rep movsl
-
- /* Activate the right segment descriptor real mode. */
- ljmp $0x28, $RELOCATED(1f)
-1:
-.code16
- /* 16 bit code from here on... */
-
- /* Load the segment registers w/ properly configured
- * segment descriptors. They will retain these
- * configurations (limits, writability, etc.) once
- * protected mode is turned off.
- */
- mov $0x30, %ax
- mov %ax, %ds
- mov %ax, %es
- mov %ax, %fs
- mov %ax, %gs
- mov %ax, %ss
-
- /* Turn off protection */
- movl %cr0, %eax
- andl $~PE, %eax
- movl %eax, %cr0
-
- /* Now really going into real mode */
- ljmp $0, $RELOCATED(1f)
-1:
- movw $0x0, %ax
- movw %ax, %ds
- movw %ax, %es
- movw %ax, %ss
- movw %ax, %fs
- movw %ax, %gs
-
- /* This is a FAR JMP to the OS waking vector. The C code changed
- * the address to be correct.
- */
- .byte 0xea
-
-__wakeup_offset = RELOCATED(.)
- .word 0x0000
-
-__wakeup_segment = RELOCATED(.)
- .word 0x0000
-
- .globl __wakeup_size
-__wakeup_size = ( . - __wakeup)
-
diff --git a/src/arch/armv7/ldscript_failover.lb b/src/arch/armv7/ldscript_failover.lb
deleted file mode 100644
index 9a3b9ae..0000000
--- a/src/arch/armv7/ldscript_failover.lb
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Advanced Micro Devices, Inc.
- * Copyright (C) 2008-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-MEMORY {
- rom : ORIGIN = 0xffff0000, LENGTH = 64K
-}
-
-TARGET(binary)
-SECTIONS
-{
- /* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
- * with Startup IPI message without RAM. Align .rom to next 4 byte
- * boundary anyway, so no pad byte appears between _rom and _start.
- */
- .bogus ROMLOC_MIN : {
- . = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4);
- ROMLOC = .;
- } >rom = 0xff
-
- /* This section might be better named .setup */
- .rom ROMLOC : {
- _rom = .;
- ap_sipi_vector = .;
- *(.rom.text);
- *(.rom.data);
- *(.rom.data.*);
- *(.rodata.*);
- _erom = .;
- } >rom = 0xff
-
- /* Allocation reserves extra 16 bytes here. Alignment requirements
- * may cause the total size of a section to change when the start
- * address gets applied.
- */
- ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -
- (CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
-
- /* Post-check proper SIPI vector. */
- _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
- "Bad SIPI vector alignment");
- _bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
- "Address mismatch on AP_SIPI_VECTOR");
-
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- *(.iplt)
- *(.rel.*)
- *(.igot.*)
- }
-}
diff --git a/src/arch/armv7/ldscript_fallback_cbfs.lb b/src/arch/armv7/ldscript_fallback_cbfs.lb
deleted file mode 100644
index 148f4e3..0000000
--- a/src/arch/armv7/ldscript_fallback_cbfs.lb
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-
-TARGET(binary)
-SECTIONS
-{
- . = CONFIG_ROMBASE;
-
- /* cut _start into last 64k*/
- _x = .;
- . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x;
-
- /* This section might be better named .setup */
- .rom . : {
- _rom = .;
- *(.text);
- *(.rodata);
- *(.rodata.*);
- *(.data.*);
- . = ALIGN(16);
- _erom = .;
- }
-
- /DISCARD/ : {
- *(.comment)
- *(.note)
- *(.comment.*)
- *(.note.*)
- }
- _bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0, "Do not use global variables in romstage");
-}
diff --git a/src/arch/armv7/lib/bootm.c b/src/arch/armv7/lib/bootm.c
deleted file mode 100644
index afe1b70..0000000
--- a/src/arch/armv7/lib/bootm.c
+++ /dev/null
@@ -1,405 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger(a)sysgo.de>
- *
- * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <image.h>
-#include <u-boot/zlib.h>
-#include <arch/byteorder.h>
-#include <fdt.h>
-#include <libfdt.h>
-#include <fdt_support.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
- defined (CONFIG_CMDLINE_TAG) || \
- defined (CONFIG_INITRD_TAG) || \
- defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG)
-static void setup_start_tag (bd_t *bd);
-
-# ifdef CONFIG_SETUP_MEMORY_TAGS
-static void setup_memory_tags (bd_t *bd);
-# endif
-static void setup_commandline_tag (bd_t *bd, char *commandline);
-
-# ifdef CONFIG_INITRD_TAG
-static void setup_initrd_tag (bd_t *bd, ulong initrd_start,
- ulong initrd_end);
-# endif
-static void setup_end_tag (bd_t *bd);
-
-# if defined (CONFIG_VFD) || defined (CONFIG_LCD)
-# if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
-static void setup_videolfb_tag (gd_t *gd);
-# endif
-# endif
-
-static struct tag *params;
-#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
-
-static ulong get_sp(void);
-#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
-static int bootm_linux_fdt(int machid, bootm_headers_t *images);
-#endif
-
-void arch_lmb_reserve(struct lmb *lmb)
-{
- ulong sp;
-
- /*
- * Booting a (Linux) kernel image
- *
- * Allocate space for command line and board info - the
- * address should be as high as possible within the reach of
- * the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
- * memory, which means far enough below the current stack
- * pointer.
- */
- sp = get_sp();
- debug("## Current stack ends at 0x%08lx ", sp);
-
- /* adjust sp by 1K to be safe */
- sp -= 1024;
- lmb_reserve(lmb, sp,
- gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
-}
-
-static void announce_and_cleanup(void)
-{
- printf("\nStarting kernel ...\n\n");
- bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
-
-#ifdef CONFIG_USB_DEVICE
- {
- extern void udc_disconnect(void);
- udc_disconnect();
- }
-#endif
- cleanup_before_linux();
-}
-
-int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
-{
- bd_t *bd = gd->bd;
- char *s;
- int machid = bd->bi_arch_number;
- void (*kernel_entry)(int zero, int arch, uint params);
-
-#ifdef CONFIG_CMDLINE_TAG
- char *commandline = getenv ("bootargs");
-#endif
-
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
-
- s = getenv ("machid");
- if (s) {
- machid = simple_strtoul (s, NULL, 16);
- printf ("Using machid 0x%x from environment\n", machid);
- }
-
- bootstage_mark(BOOTSTAGE_ID_RUN_OS);
-
-#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
- if (images->ft_len)
- return bootm_linux_fdt(machid, images);
-#endif
-
- kernel_entry = (void (*)(int, int, uint))images->ep;
-
- debug ("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong) kernel_entry);
-
-#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
- defined (CONFIG_CMDLINE_TAG) || \
- defined (CONFIG_INITRD_TAG) || \
- defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG)
- setup_start_tag (bd);
-#ifdef CONFIG_SERIAL_TAG
- setup_serial_tag (¶ms);
-#endif
-#ifdef CONFIG_REVISION_TAG
- setup_revision_tag (¶ms);
-#endif
-#ifdef CONFIG_SETUP_MEMORY_TAGS
- setup_memory_tags (bd);
-#endif
-#ifdef CONFIG_CMDLINE_TAG
- setup_commandline_tag (bd, commandline);
-#endif
-#ifdef CONFIG_INITRD_TAG
- if (images->rd_start && images->rd_end)
- setup_initrd_tag (bd, images->rd_start, images->rd_end);
-#endif
-#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
-#if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
- setup_videolfb_tag ((gd_t *) gd);
-#endif
-#endif
- setup_end_tag (bd);
-#endif
-
- announce_and_cleanup();
-
- kernel_entry(0, machid, bd->bi_boot_params);
- /* does not return */
-
- return 1;
-}
-
-#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
-static int fixup_memory_node(void *blob)
-{
- bd_t *bd = gd->bd;
- int bank;
- u64 start[CONFIG_NR_DRAM_BANKS];
- u64 size[CONFIG_NR_DRAM_BANKS];
-
- for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- start[bank] = bd->bi_dram[bank].start;
- size[bank] = bd->bi_dram[bank].size;
- }
-
- return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-}
-
-static int bootm_linux_fdt(int machid, bootm_headers_t *images)
-{
- ulong rd_len;
- void (*kernel_entry)(int zero, int dt_machid, void *dtblob);
- ulong of_size = images->ft_len;
- char **of_flat_tree = &images->ft_addr;
- ulong *initrd_start = &images->initrd_start;
- ulong *initrd_end = &images->initrd_end;
- struct lmb *lmb = &images->lmb;
- int ret;
-
- kernel_entry = (void (*)(int, int, void *))images->ep;
-
- boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
-
- rd_len = images->rd_end - images->rd_start;
- ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
- initrd_start, initrd_end);
- if (ret)
- return ret;
-
-#ifdef CONFIG_OF_BOARD_SETUP
- /* Try to reserve 1024 bytes for board fixups */
- if (!fdt_open_into(*of_flat_tree, *of_flat_tree, of_size + 1024))
- of_size += 1024;
- /* Call the board-specific fixup routine */
- ft_board_setup(*of_flat_tree, gd->bd);
-#endif
-#ifdef CONFIG_OF_UPDATE_FDT_BEFORE_BOOT
- /* this must be earlier than boot_relocate_fdt */
- ret = fit_update_fdt_before_boot(*of_flat_tree, &of_size);
- if (ret)
- return ret;
-#endif
-
- ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size);
- if (ret)
- return ret;
-
- debug("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong) kernel_entry);
-
- fdt_chosen(*of_flat_tree, 1);
-
- fixup_memory_node(*of_flat_tree);
-
- fdt_fixup_ethernet(*of_flat_tree);
-
- fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
-
- announce_and_cleanup();
-
- kernel_entry(0, machid, *of_flat_tree);
- /* does not return */
-
- return 1;
-}
-#endif
-
-#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
- defined (CONFIG_CMDLINE_TAG) || \
- defined (CONFIG_INITRD_TAG) || \
- defined (CONFIG_SERIAL_TAG) || \
- defined (CONFIG_REVISION_TAG)
-static void setup_start_tag (bd_t *bd)
-{
- params = (struct tag *) bd->bi_boot_params;
-
- params->hdr.tag = ATAG_CORE;
- params->hdr.size = tag_size (tag_core);
-
-#if defined (ATAG_CORE_FLAGS) && \
- defined (ATAG_PAGE_SIZE) && \
- defined (ATAG_CORE_RDEV)
- params->u.core.flags = ATAG_CORE_FLAGS;
- params->u.core.pagesize = ATAG_PAGE_SIZE;
- params->u.core.rootdev = ATAG_CORE_RDEV;
-#else
- params->u.core.flags = 0;
- params->u.core.pagesize = 0;
- params->u.core.rootdev = 0;
-#endif
-
- params = tag_next (params);
-}
-
-
-#ifdef CONFIG_SETUP_MEMORY_TAGS
-static void setup_memory_tags (bd_t *bd)
-{
- int i;
-
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- params->hdr.tag = ATAG_MEM;
- params->hdr.size = tag_size (tag_mem32);
-
- params->u.mem.start = bd->bi_dram[i].start;
- params->u.mem.size = bd->bi_dram[i].size;
-
- params = tag_next (params);
- }
-}
-#endif /* CONFIG_SETUP_MEMORY_TAGS */
-
-
-static void setup_commandline_tag (bd_t *bd, char *commandline)
-{
- char *p;
-
- if (!commandline)
- return;
-
- /* eat leading white space */
- for (p = commandline; *p == ' '; p++);
-
- /* skip non-existent command lines so the kernel will still
- * use its default command line.
- */
- if (*p == '\0')
- return;
-
- params->hdr.tag = ATAG_CMDLINE;
- params->hdr.size =
- (sizeof (struct tag_header) + strlen (p) + 1 + 4) >> 2;
-
- strcpy (params->u.cmdline.cmdline, p);
-
- params = tag_next (params);
-}
-
-
-#ifdef CONFIG_INITRD_TAG
-static void setup_initrd_tag (bd_t *bd, ulong initrd_start, ulong initrd_end)
-{
- /* an ATAG_INITRD node tells the kernel where the compressed
- * ramdisk can be found. ATAG_RDIMG is a better name, actually.
- */
- params->hdr.tag = ATAG_INITRD2;
- params->hdr.size = tag_size (tag_initrd);
-
- params->u.initrd.start = initrd_start;
- params->u.initrd.size = initrd_end - initrd_start;
-
- params = tag_next (params);
-}
-#endif /* CONFIG_INITRD_TAG */
-
-#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
-#if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
-extern ulong calc_fbsize (void);
-static void setup_videolfb_tag (gd_t *gd)
-{
- /* An ATAG_VIDEOLFB node tells the kernel where and how large
- * the framebuffer for video was allocated (among other things).
- * Note that a _physical_ address is passed !
- *
- * We only use it to pass the address and size, the other entries
- * in the tag_videolfb are not of interest.
- */
- params->hdr.tag = ATAG_VIDEOLFB;
- params->hdr.size = tag_size (tag_videolfb);
-
- params->u.videolfb.lfb_base = (u32) gd->fb_base;
- /* Fb size is calculated according to parameters for our panel
- */
- params->u.videolfb.lfb_size = calc_fbsize();
-
- params = tag_next (params);
-}
-#endif /* CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED */
-#endif /* CONFIG_VFD || CONFIG_LCD */
-
-#ifdef CONFIG_SERIAL_TAG
-void setup_serial_tag (struct tag **tmp)
-{
- struct tag *params = *tmp;
- struct tag_serialnr serialnr;
- void get_board_serial(struct tag_serialnr *serialnr);
-
- get_board_serial(&serialnr);
- params->hdr.tag = ATAG_SERIAL;
- params->hdr.size = tag_size (tag_serialnr);
- params->u.serialnr.low = serialnr.low;
- params->u.serialnr.high= serialnr.high;
- params = tag_next (params);
- *tmp = params;
-}
-#endif
-
-#ifdef CONFIG_REVISION_TAG
-void setup_revision_tag(struct tag **in_params)
-{
- u32 rev = 0;
- u32 get_board_rev(void);
-
- rev = get_board_rev();
- params->hdr.tag = ATAG_REVISION;
- params->hdr.size = tag_size (tag_revision);
- params->u.revision.rev = rev;
- params = tag_next (params);
-}
-#endif /* CONFIG_REVISION_TAG */
-
-static void setup_end_tag (bd_t *bd)
-{
- params->hdr.tag = ATAG_NONE;
- params->hdr.size = 0;
-}
-#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
-
-static ulong get_sp(void)
-{
- ulong ret;
-
- asm("mov %0, sp" : "=r"(ret) : );
- return ret;
-}
diff --git a/src/cpu/samsung/exynos5-common/sys_proto.h b/src/cpu/samsung/exynos5-common/sys_proto.h
deleted file mode 100644
index 11f1636..0000000
--- a/src/cpu/samsung/exynos5-common/sys_proto.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electrnoics
- * Minkyu Kang <mk7.kang(a)samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
-
-u32 get_device_type(void);
-void invalidate_dcache(u32);
-void l2_cache_disable(void);
-void l2_cache_enable(void);
-
-#endif
diff --git a/src/cpu/samsung/exynos5250/sys_proto.h b/src/cpu/samsung/exynos5250/sys_proto.h
deleted file mode 100644
index f25dcd1..0000000
--- a/src/cpu/samsung/exynos5250/sys_proto.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * (C) Copyright 2012 Samsung Electronics
- * Minkyu Kang <mk7.kang(a)samsung.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#ifndef __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__
-#define __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__
-
-#include <asm/arch-exynos/sys_proto.h>
-
-#endif /* __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__ */
diff --git a/src/cpu/samsung/s5p-common/Makefile.uboot b/src/cpu/samsung/s5p-common/Makefile.uboot
deleted file mode 100644
index f975f3f..0000000
--- a/src/cpu/samsung/s5p-common/Makefile.uboot
+++ /dev/null
@@ -1,49 +0,0 @@
-#
-# Copyright (C) 2009 Samsung Electronics
-# Minkyu Kang <mk7.kang(a)samsung.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libs5p-common.o
-
-COBJS-y += cpu_info.o
-COBJS-y += timer.o
-COBJS-y += sromc.o
-COBJS-y += wdt.o
-COBJS-$(CONFIG_PWM) += pwm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2350
-gerrit
commit aa819837cd0ebd7324de2175d39e6b7ae9f4e912
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Sun Feb 10 15:59:22 2013 -0800
snow: add kconfig option to select stack location
This patch allows us to select where to place our stack. The user
may select to leave it in IRAM or switch to DRAM once in ramstage.
By default the stack will stay in IRAM, but facilities are kept in
to allow for the stack in DRAM.
IRAM is always used up thru romstage. Both options seem to work for
ramstage and beyond (for what testing we've been able to do...).
(credit to Gabe for this one, I'm just putting it up on gerrit)
Change-Id: I2e447d6359d52e4615e1cd7811e6f167e3dc314b
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/arch/armv7/Kconfig | 4 ++++
src/arch/armv7/coreboot_ram.ld | 3 ++-
src/cpu/samsung/exynos5250/Kconfig | 21 +++++++++++++++++++++
src/mainboard/google/snow/ramstage.c | 17 ++++++++++++++++-
4 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig
index 488ca97..fe36d79 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/armv7/Kconfig
@@ -49,4 +49,8 @@ config ARM_DCACHE_POLICY_WRITETHROUGH
bool
default n
+config STACK_SIZE
+ hex
+ default 0x1000
+
endmenu
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index 0644e36..779353b 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -96,7 +96,8 @@ SECTIONS
_end = .;
/* coreboot really "ends" here. Only heap and stack are placed after
- * this line.
+ * this line. Note: Depending on the SoC, the stack may actually reside
+ * somewhere else (ie SRAM).
*/
. = ALIGN(CONFIG_STACK_SIZE);
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 2869d76..52feda5 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -77,6 +77,27 @@ config IRAM_STACK
hex
default 0x02077f00
+choice
+ prompt "Stack location"
+
+config STACK_IN_IRAM
+ bool "Place stack in IRAM"
+ default y
+
+config STACK_IN_DRAM
+ bool "Place stack in DRAM in ramstage"
+
+endchoice
+
+config STACK_ADDR
+ hex "Stack address"
+ depends on STACK_IN_IRAM
+ default IRAM_STACK
+
+config STACK_SIZE
+ hex
+ default 0x1000
+
# FIXME: other magic numbers that should probably go away
config XIP_ROM_SIZE
hex
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index a3e9236..b5bf3b7 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -17,6 +17,7 @@
* MA 02111-1307 USA
*/
+#include <lib.h>
#include <console/console.h>
#if CONFIG_WRITE_HIGH_TABLES
@@ -24,7 +25,7 @@
#endif
void hardwaremain(int boot_complete);
-void main(void)
+static void real_main(void)
{
console_init();
printk(BIOS_INFO, "hello from ramstage\n");
@@ -39,3 +40,17 @@ void main(void)
hardwaremain(0);
}
+
+void main(void)
+{
+#if CONFIG_STACK_IN_DRAM
+ __asm__ __volatile__(
+ "mov sp, %0\n\r"
+ "mov pc, %1\n\r"
+ :
+ :"r"(_estack), "r"(&real_main)
+ );
+#else
+ real_main();
+#endif
+}
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2350
-gerrit
commit 72f433f8e04a8c3149f0a112b842d416412f237f
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Sun Feb 10 15:59:22 2013 -0800
snow: switch to stack in DRAM once in ramstage
This patch allows us to select where to place our stack. The user
may select to leave it in IRAM or switch to DRAM once in ramstage.
By default the stack will stay in IRAM, but facilities are kept in
to allow for the stack in DRAM.
IRAM is always used up thru romstage. Both options seem to work for
ramstage and beyond (for what testing we've been able to do...).
(credit to Gabe for this one, I'm just putting it up on gerrit)
Change-Id: I2e447d6359d52e4615e1cd7811e6f167e3dc314b
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/arch/armv7/Kconfig | 4 ++++
src/arch/armv7/coreboot_ram.ld | 3 ++-
src/cpu/samsung/exynos5250/Kconfig | 21 +++++++++++++++++++++
src/mainboard/google/snow/ramstage.c | 17 ++++++++++++++++-
4 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig
index 488ca97..fe36d79 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/armv7/Kconfig
@@ -49,4 +49,8 @@ config ARM_DCACHE_POLICY_WRITETHROUGH
bool
default n
+config STACK_SIZE
+ hex
+ default 0x1000
+
endmenu
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index 0644e36..779353b 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -96,7 +96,8 @@ SECTIONS
_end = .;
/* coreboot really "ends" here. Only heap and stack are placed after
- * this line.
+ * this line. Note: Depending on the SoC, the stack may actually reside
+ * somewhere else (ie SRAM).
*/
. = ALIGN(CONFIG_STACK_SIZE);
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 2869d76..52feda5 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -77,6 +77,27 @@ config IRAM_STACK
hex
default 0x02077f00
+choice
+ prompt "Stack location"
+
+config STACK_IN_IRAM
+ bool "Place stack in IRAM"
+ default y
+
+config STACK_IN_DRAM
+ bool "Place stack in DRAM in ramstage"
+
+endchoice
+
+config STACK_ADDR
+ hex "Stack address"
+ depends on STACK_IN_IRAM
+ default IRAM_STACK
+
+config STACK_SIZE
+ hex
+ default 0x1000
+
# FIXME: other magic numbers that should probably go away
config XIP_ROM_SIZE
hex
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index a3e9236..b5bf3b7 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -17,6 +17,7 @@
* MA 02111-1307 USA
*/
+#include <lib.h>
#include <console/console.h>
#if CONFIG_WRITE_HIGH_TABLES
@@ -24,7 +25,7 @@
#endif
void hardwaremain(int boot_complete);
-void main(void)
+static void real_main(void)
{
console_init();
printk(BIOS_INFO, "hello from ramstage\n");
@@ -39,3 +40,17 @@ void main(void)
hardwaremain(0);
}
+
+void main(void)
+{
+#if CONFIG_STACK_IN_DRAM
+ __asm__ __volatile__(
+ "mov sp, %0\n\r"
+ "mov pc, %1\n\r"
+ :
+ :"r"(_estack), "r"(&real_main)
+ );
+#else
+ real_main();
+#endif
+}
the following patch was just integrated into master:
commit b25208fc8bce4142c420afcacd3c16e649fa2a5c
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Tue Feb 12 15:30:17 2013 -0800
armv7: use start and size parameters in mmu_setup()
mmu_setup() was originally written in U-Boot to utilize board-specific
global data. Since we're trying to avoid that, we added start and size
parameters so that board-specific info can be passed in via mainboard
code. Let's start using it that way.
Change-Id: I7d7de0e42bd918c9f9f0c177acaf56c110bf8353
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Reviewed-on: http://review.coreboot.org/2378
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Wed Feb 13 01:15:11 2013, giving +1
See http://review.coreboot.org/2378 for details.
-gerrit