coreboot February 2013

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New patch to review for coreboot: 835de6b libpayload: add support for the exynos5 UART
by Ronald G. Minnich 15 Feb '13

15 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2414 -gerrit commit 835de6b1872042c9957cdadc43cb656680cdb0b9 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Feb 15 09:44:28 2013 -0800 libpayload: add support for the exynos5 UART This CL adds *limited* support for the exynos5 uart. IO operations are supported; because of the plethora of other hardware that it would bring in, we've decided for now to leave out configuration operations such as setting baud rate. Set it right in coreboot and leave it alone. We support read, write, and test for input as in the existing serial.c. Add two new variables, EXYNOS5_SERIAL_CONSOLE -- enable it EXYNOS5_SERIAL_BASE -- set the base in Config.in, add options for selecting the UART and setting its base address; a reasonable default is configured. Set that default into sysinfo if EXYNOS5_SERIAL_CONSOLE is set. Compile the UART in if EXYNOS5_SERIAL_CONSOLE is set. Add the slightly truncated code from coreboot; don't bother with an include file, only this one file needs to see the structs. This is one case where an include file would do more harm than good. Change-Id: Iff1f601a8ba5e69d63eb10763e748c92a03a3df8 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- payloads/libpayload/Config.in | 12 ++- payloads/libpayload/arch/armv7/sysinfo.c | 3 + payloads/libpayload/drivers/Makefile.inc | 1 + payloads/libpayload/drivers/exynos5250_uart.c | 128 ++++++++++++++++++++++++++ 4 files changed, 143 insertions(+), 1 deletion(-) diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index a14291d..ccc9449 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -70,7 +70,7 @@ choice config ARCH_ARMV7 bool "ARMv7" help - Support the x86 architecture + Support the ARMV7 architecture config ARCH_POWERPC bool "PowerPC" @@ -168,6 +168,16 @@ config SERIAL_CONSOLE bool "See output on the serial port console" default y +config EXYNOS5_SERIAL_CONSOLE + bool "Exynos 5xxx serial console" + depends on ARCH_ARMV7 + default n + +config EXYNOS5_SERIAL_BASE + hex "Base for the Exynos5 serial port" + depends on EXYNOS5_SERIAL_CONSOLE + default 0x12c30000 + config SERIAL_IOBASE hex "I/O base for the serial port (default 0x3f8)" depends on SERIAL_CONSOLE diff --git a/payloads/libpayload/arch/armv7/sysinfo.c b/payloads/libpayload/arch/armv7/sysinfo.c index 5aa5175..fc527d2 100644 --- a/payloads/libpayload/arch/armv7/sysinfo.c +++ b/payloads/libpayload/arch/armv7/sysinfo.c @@ -37,6 +37,9 @@ */ struct sysinfo_t lib_sysinfo = { .cpu_khz = 200, +#ifdef CONFIG_SERIAL_CONSOLE + .ser_base = CONFIG_EXYNOS5_SERIAL_BASE, +#endif }; int lib_get_sysinfo(void) diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index e3bb995..71c2519 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -34,6 +34,7 @@ libc-$(CONFIG_PCI) += pci.c libc-$(CONFIG_SPEAKER) += speaker.c libc-$(CONFIG_SERIAL_CONSOLE) += serial.c +libc-$(CONFIG_EXYNOS5_SERIAL_CONSOLE) += exynos5250_uart.c libc-$(CONFIG_PC_KEYBOARD) += keyboard.c diff --git a/payloads/libpayload/drivers/exynos5250_uart.c b/payloads/libpayload/drivers/exynos5250_uart.c new file mode 100644 index 0000000..522a911 --- /dev/null +++ b/payloads/libpayload/drivers/exynos5250_uart.c @@ -0,0 +1,128 @@ +/* + * (C) Copyright 2013 Google, Inc. + * (C) Copyright 2009 SAMSUNG Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * based on drivers/serial/s3c64xx.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/* + * this is a seriously cut-down UART implementation, the assumption + * being that you should let coreboot set it up. It's quite + * messy to keep doing UART setup everywhere on these ARM SOCs. + */ + +#include <libpayload-config.h> +#include <libpayload.h> + +/* baudrate rest value */ +union br_rest { + unsigned short slot; /* udivslot */ + unsigned char value; /* ufracval */ +}; + +struct s5p_uart { + unsigned int ulcon; + unsigned int ucon; + unsigned int ufcon; + unsigned int umcon; + unsigned int utrstat; + unsigned int uerstat; + unsigned int ufstat; + unsigned int umstat; + unsigned char utxh; + unsigned char res1[3]; + unsigned char urxh; + unsigned char res2[3]; + unsigned int ubrdiv; + union br_rest rest; + unsigned char res3[0xffd0]; +}; + +#define MEMBASE (struct s5p_uart *)(phys_to_virt(lib_sysinfo.serial->baseaddr)) +#define RX_FIFO_COUNT_MASK 0xff +#define RX_FIFO_FULL_MASK (1 << 8) +#define TX_FIFO_FULL_MASK (1 << 24) + +/* + * Initialise the serial port. + * This hardware is really complex, and we're not going to pretend + * it's a good idea to mess with it here. So, take what coreboot did + * and leave it at that. + */ +void serial_init(void) +{ +} + +static int exynos5_uart_err_check(int op) +{ + struct s5p_uart *uart = MEMBASE; + unsigned int mask; + + /* + * UERSTAT + * Break Detect [3] + * Frame Err [2] : receive operation + * Parity Err [1] : receive operation + * Overrun Err [0] : receive operation + */ + if (op) + mask = 0x8; + else + mask = 0xf; + + return readl(&uart->uerstat) & mask; +} + +int serial_havechar(void) +{ + struct s5p_uart *uart = MEMBASE; + return (readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK | + RX_FIFO_FULL_MASK)); +} + +int serial_getchar(void) +{ + struct s5p_uart *uart = MEMBASE; + + /* wait for character to arrive */ + while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK | + RX_FIFO_FULL_MASK))) { + if (exynos5_uart_err_check(0)) + return 0; + } + + return readb(&uart->urxh) & 0xff; +} + +/* + * Output a single byte to the serial port. + */ +void serial_putchar(unsigned int c) +{ + struct s5p_uart *uart = MEMBASE; + + /* wait for room in the tx FIFO */ + while ((readl(uart->ufstat) & TX_FIFO_FULL_MASK)) { + if (exynos5_uart_err_check(1)) + return; + } + + writeb(c, &uart->utxh); +}

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New patch to review for coreboot: 9c93926 libpayload: get sample to cross-build for ARMV7 (finally!)
by Ronald G. Minnich 15 Feb '13

15 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2413 -gerrit commit 9c93926ae484e708ef1f381749d9a35bcd14b664 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Feb 15 08:48:25 2013 -0800 libpayload: get sample to cross-build for ARMV7 (finally!) libpayload was not capable of cross-building payloads. This is a proposed change to make it work. Add a top-level file that is specifically designed for payloads: payloadbuild.inc. Change the payload (e.g. sample/Makefile) Makefile to 1. define the top level in a variable, top 2. include $(top)/.xcompile to get the variables (I think we may want the option of including/not including this file in a payload Makefile -- do we?) 3. include $(top)/payloadbuild.inc You don't want to include all the *.inc files that libpayload itself builds in a payload, because that brings in lots of stuff you really don't want. Hence a special file, payloadbuild.inc, oriented to building payloads. I add a segment in the ldscript for the GNU issues with arm (for some sense of what a mess this is, see, e.g., http://stackoverflow.com/questions/9752000/exidx-start-and-exidx-end-what-d… to make an empty array for exception indexes. We may need to fix this up more later. I'm not sure it's bad to have an empty array, however. Also make abort() a function, not a macro, because the runtime wants a function. At this point, we've finally get a building payload, although we fail on a missing serial port (that's next). In this case, a certain amount of bikeshedding is expected *and* encouraged. Change-Id: If1ec0276b13f6d5f05cb88bb413791c4d90b7392 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- payloads/libpayload/arch/armv7/libpayload.ldscript | 5 +++++ payloads/libpayload/include/stdlib.h | 4 +++- payloads/libpayload/libc/lib.c | 5 +++++ payloads/libpayload/sample/Makefile | 8 ++++++-- 4 files changed, 19 insertions(+), 3 deletions(-) diff --git a/payloads/libpayload/arch/armv7/libpayload.ldscript b/payloads/libpayload/arch/armv7/libpayload.ldscript index 5f65bd7..98ba97a 100644 --- a/payloads/libpayload/arch/armv7/libpayload.ldscript +++ b/payloads/libpayload/arch/armv7/libpayload.ldscript @@ -61,6 +61,11 @@ SECTIONS *(.data.*) } + .ARM.exidx : { + __exidx_start = .; + __exidx_end = .; + } + _edata = .; .bss : { diff --git a/payloads/libpayload/include/stdlib.h b/payloads/libpayload/include/stdlib.h index cf37c80..97961d5 100644 --- a/payloads/libpayload/include/stdlib.h +++ b/payloads/libpayload/include/stdlib.h @@ -139,7 +139,9 @@ void srand(unsigned int seed); */ void halt(void) __attribute__ ((noreturn)); void exit(int status) __attribute__ ((noreturn)); -#define abort() halt() /**< Alias for the halt() function */ + +/* needed as a symbol for ARM runtime */ +void abort(void) __attribute__ ((noreturn)); /** @} */ diff --git a/payloads/libpayload/libc/lib.c b/payloads/libpayload/libc/lib.c index 616a7c6..85b8a3e 100644 --- a/payloads/libpayload/libc/lib.c +++ b/payloads/libpayload/libc/lib.c @@ -126,3 +126,8 @@ char *getenv(const char *name) return NULL; } +void abort(void) +{ + halt(); +} + diff --git a/payloads/libpayload/sample/Makefile b/payloads/libpayload/sample/Makefile index 1a32f3b..3d0b69c 100644 --- a/payloads/libpayload/sample/Makefile +++ b/payloads/libpayload/sample/Makefile @@ -27,10 +27,14 @@ ## SUCH DAMAGE. ## +top=.. +include $(top)/.xcompile +include $(top)/payloadbuild.inc + # Sample libpayload Makefile. LIBPAYLOAD_DIR := ../install/libpayload -XCC := CC=$(CC) $(LIBPAYLOAD_DIR)/bin/lpgcc -XAS := AS=$(AS) $(LIBPAYLOAD_DIR)/bin/lpas +XCC := CC='$(CC)' $(LIBPAYLOAD_DIR)/bin/lpgcc +XAS := AS='$(AS)' $(LIBPAYLOAD_DIR)/bin/lpas CFLAGS := -Wall -Werror -Os TARGET := hello OBJS := $(TARGET).o

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New patch to review for coreboot: a3ec4e7 libpayload: only compile drivers/serial.c on machines that use it.
by Ronald G. Minnich 15 Feb '13

15 Feb '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2412 -gerrit commit a3ec4e725ebee245539629373f707b6b4eb760dd Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Fri Feb 15 08:13:29 2013 -0800 libpayload: only compile drivers/serial.c on machines that use it. Create a new serial console variable, X86_SERIAL_CONSOLE which is only enabled when SERIAL_CONSOLE and ARCH_X86 are defined. Builds for x86 and ARM. Change-Id: I607253c418de015975a839e3c33577842885ec0c Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> --- payloads/libpayload/Config.in | 7 ++++++- payloads/libpayload/drivers/Makefile.inc | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in index a14291d..0a6fbe8 100644 --- a/payloads/libpayload/Config.in +++ b/payloads/libpayload/Config.in @@ -168,9 +168,14 @@ config SERIAL_CONSOLE bool "See output on the serial port console" default y +config X86_SERIAL_CONSOLE + bool + depends on ARCH_X86 && SERIAL_CONSOLE + default y + config SERIAL_IOBASE hex "I/O base for the serial port (default 0x3f8)" - depends on SERIAL_CONSOLE + depends on X86_SERIAL_CONSOLE default 0x3f8 config SERIAL_SET_SPEED diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index e3bb995..60e0fab 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -33,7 +33,7 @@ libc-$(CONFIG_PCI) += pci.c libc-$(CONFIG_SPEAKER) += speaker.c -libc-$(CONFIG_SERIAL_CONSOLE) += serial.c +libc-$(CONFIG_X86_SERIAL_CONSOLE) += serial.c libc-$(CONFIG_PC_KEYBOARD) += keyboard.c

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Patch merged into coreboot/master: b97ee89 OT200: add CMOS support
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit b97ee89684265e735e3da7bdcd7d19ee81fa1ae3 Author: Christian Gmeiner <christian.gmeiner(a)gmail.com> Date: Thu Feb 14 12:08:30 2013 +0100 OT200: add CMOS support nvramtool works as expected. root@CHGM-DEV-OT200:~# /home/vis/nvramtool -a baud_rate = 19200 debug_level = Emergency Change-Id: Ia25dc5b4f0ed3a2dd7cc67b7d3174db3a6eff70e Signed-off-by: Christian Gmeiner <christian.gmeiner(a)gmail.com> Reviewed-on: http://review.coreboot.org/2382 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Thu Feb 14 11:57:52 2013, giving +1 See http://review.coreboot.org/2382 for details. -gerrit

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Patch merged into coreboot/master: 8deb5c6 libpayload: Use the same type for 32 bit data in readl as in uint32_t.
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit 8deb5c6e0fde0b326881c7684056fe9ec4f310e9 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Feb 14 17:35:49 2013 -0800 libpayload: Use the same type for 32 bit data in readl as in uint32_t. The compiler gets mad when the types are equivalent size but not necessarily interchangeable because of strict aliasing checks. Since uint32_t is likely to be used when trying to read 32 bit data, it makes sense for them to be the compatible. Signed-off-by: Gabe Black <gabeblack(a)google.com> Change-Id: If73d794866055dc026fc06d6268e692adac0f835 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2411 Tested-by: build bot (Jenkins) Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 15 02:55:18 2013, giving +1 Reviewed-By: Gabe Black <gabeblack(a)chromium.org> at Fri Feb 15 06:26:24 2013, giving +2 See http://review.coreboot.org/2411 for details. -gerrit

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Patch merged into coreboot/master: 1a29c1e libpayload: fix compiler flags
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit 1a29c1e7665c22476b74d469952d7e689d475cdf Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Feb 14 15:26:09 2013 -0800 libpayload: fix compiler flags lpgcc was unconditionally setting -m32. Most of the flags it sets in the common case are right, however: no need to duplicate them everywhere, and we only want to change the common ones in one place, so it would be a shame to duplicate _CFLAGS all over the place. So add another variable, _ARCHEXTRA, which can be used to add special flags to _CFLAGS. We onlu use it at present for the x86; this may change. This allows us to get through compiling on arm and x86. Change-Id: I12f1620982c4ee10f76b3953e4225f13db31531e Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2399 Tested-by: build bot (Jenkins) Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 15 00:53:42 2013, giving +1 Reviewed-By: Gabe Black <gabeblack(a)chromium.org> at Fri Feb 15 06:26:44 2013, giving +2 See http://review.coreboot.org/2399 for details. -gerrit

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Patch merged into coreboot/master: 2cc105c libpayload: get time to compile cross-arch
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit 2cc105c741357e7dc13a456726456bdbb6fcb5e6 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Feb 14 15:09:21 2013 -0800 libpayload: get time to compile cross-arch Get rid of the nest of includes, and make separate sections for each architecture. Also gets rid of the "there's X86 and there's everything else" structure of this file. Change-Id: I4232f50f048fa05e911e5de3aa9ec1530931b461 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2397 Tested-by: build bot (Jenkins) Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 15 00:38:06 2013, giving +1 Reviewed-By: Gabe Black <gabeblack(a)chromium.org> at Fri Feb 15 06:26:34 2013, giving +2 See http://review.coreboot.org/2397 for details. -gerrit

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Patch merged into coreboot/master: c1ee864 libpayload: make functions static that are unused outside memory.c
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit c1ee8641cb350de289fd77e9e9231bda46d6a386 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Feb 14 14:36:46 2013 -0800 libpayload: make functions static that are unused outside memory.c The default_ functions in memory.c are only used to initialize a weak variable. They should not be used outside memory.c. Make them invisible. Remove the declaration from libpayload.h. For real this time. Change-Id: Id54c1fd172c78748f01a958ce4065dd0eb53bbc3 Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2394 Tested-by: build bot (Jenkins) Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 15 00:29:51 2013, giving +1 Reviewed-By: Gabe Black <gabeblack(a)chromium.org> at Fri Feb 15 06:26:53 2013, giving +2 See http://review.coreboot.org/2394 for details. -gerrit

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Patch merged into coreboot/master: f2e10cb libpayload: Use an appropriate range of memory when looking for cb tables.
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit f2e10cb544996872298c95ed23241149e3eab418 Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Thu Feb 14 17:31:37 2013 -0800 libpayload: Use an appropriate range of memory when looking for cb tables. These live at the bottom of memory on x86, but that's IO mapped on the exynos. The particular range used will likely need to be configurable, but this will make it work in one more case than it used to. Change-Id: I4d4963b9732cf538d00f8effb4398f30cbbde6aa Signed-off-by: Gabe Black <gabeblack(a)google.com> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/2410 Tested-by: build bot (Jenkins) Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Build-Tested: build bot (Jenkins) at Fri Feb 15 02:47:36 2013, giving +1 Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Fri Feb 15 03:19:06 2013, giving +2 See http://review.coreboot.org/2410 for details. -gerrit

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Patch merged into coreboot/master: ba1008e Exynos: Drop dead code in cpu.h
by gerrit＠coreboot.org 15 Feb '13

15 Feb '13

the following patch was just integrated into master: commit ba1008e33f35a8c1174f76c8d0bdba0fec519561 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Feb 14 17:10:39 2013 -0800 Exynos: Drop dead code in cpu.h Change-Id: Ibb5fa27a0d45ddd8f57e8e8c28961d204e2ef1e3 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2409 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Feb 15 02:40:01 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Fri Feb 15 02:44:00 2013, giving +2 See http://review.coreboot.org/2409 for details. -gerrit

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coreboot February 2013