coreboot August 2012

coreboot@coreboot.org

30 participants
321 discussions

Re: [coreboot] Data exchange between coreboot - seabios - option rom
by Christian Gmeiner 21 Aug '12

21 Aug '12

2012/8/21 Christian Gmeiner <christian.gmeiner(a)gmail.com>: > Hi all, > > my vacation is over and I need to look in some stuff deeper to finally > get the combination coreboot/seabios fully working. The only missing part > aside from a lot of testing is the video bios stuff. Here I am working on > a patch series to extend seabios vga option rom to support flat panels. > > I would like to to use EPI (http://www.epi-standard.org/) for the description > of the panels. Due EOL changes my target hardware supports different > kind of flat panels (with different timings). I can detect what panel is used > with the help of an i2c eeprom. So the normal CBFS will be extended by > n EPI raw files. And here the troubles begins :) > > 1) Can I add symbolic links during runtime > > It would be fine if somewhere during the boot (coreboot or seabios) I > can readout > the needed bytes from the eeprom, decide which EPI file to use and create > something line a symlink to the choosen one. > > panel.epi -> 640_480_panel_name.epi > As I found out this can be done via nvram. So coreboot set the filename of the EPI file to use and seabios/... etc can simply use it. > 2) Can I load a CBFS file in the option rom? > > The idea is to load the EPI raw file and provide it via VBE (vbe_104f15) BIOS > call. So the geode lx option rom can read out the timing informations via VBE > and setup the video mode. > It could also be possible to store the EPI data at a defined memory area where the option rom can simply check for existing identifiers and checksum. Any hints are really welcome. --- Christian Gmeiner, MSc

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Data exchange between coreboot - seabios - option rom
by Christian Gmeiner 21 Aug '12

21 Aug '12

Hi all, my vacation is over and I need to look in some stuff deeper to finally get the combination coreboot/seabios fully working. The only missing part aside from a lot of testing is the video bios stuff. Here I am working on a patch series to extend seabios vga option rom to support flat panels. I would like to to use EPI (http://www.epi-standard.org/) for the description of the panels. Due EOL changes my target hardware supports different kind of flat panels (with different timings). I can detect what panel is used with the help of an i2c eeprom. So the normal CBFS will be extended by n EPI raw files. And here the troubles begins :) 1) Can I add symbolic links during runtime It would be fine if somewhere during the boot (coreboot or seabios) I can readout the needed bytes from the eeprom, decide which EPI file to use and create something line a symlink to the choosen one. panel.epi -> 640_480_panel_name.epi 2) Can I load a CBFS file in the option rom? The idea is to load the EPI raw file and provide it via VBE (vbe_104f15) BIOS call. So the geode lx option rom can read out the timing informations via VBE and setup the video mode. The result should be something like this: http://www.youtube.com/watch?v=83CDqJMblkw greets --- Christian Gmeiner, MSc

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Patch set updated for coreboot: c68e1cb AMD Hudson: Move the combining firmware from Python to sh.
by Zheng Bao 21 Aug '12

21 Aug '12

Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1417 -gerrit commit c68e1cb7b9d70441e5712b265901256c7cc1a5b4 Author: zbao <fishbaozi(a)gmail.com> Date: Tue Aug 21 19:24:02 2012 +0800 AMD Hudson: Move the combining firmware from Python to sh. Maybe sooner or later python is not a default tools to build coreboot. Most of the work is done by awk now. GNU extension of gawk is not used, isn't? printf, cat, awk, test, mv are the external tools. If XHCI, IMC or GEC firmware is not available and not defined, this script can skip integrating them. Change-Id: I9944b22b0b755672a46d472c355d138abafd6393 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: zbao <fishbaozi(a)gmail.com> --- src/southbridge/amd/agesa/hudson/Makefile.inc | 10 +++- src/southbridge/amd/agesa/hudson/hudson_fwm.py | 64 ---------------------- src/southbridge/amd/agesa/hudson/hudson_fwm.sh | 74 ++++++++++++++++++++++++++ 3 files changed, 82 insertions(+), 66 deletions(-) diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 19ffae1..422c815 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -14,8 +14,14 @@ romstage-y += early_setup.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c -$(obj)/hudson.bin: - python $(src)/southbridge/amd/agesa/hudson/hudson_fwm.py $(CONFIG_HUDSON_FWM_POSITION) $@ $(CONFIG_HUDSON_XHCI_FWM_FILE) $(CONFIG_HUDSON_IMC_FWM_FILE) "" +$(obj)/hudson.bin: $(top)/$(call strip_quotes $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ + $(top)/$(call strip_quotes $(CONFIG_HUDSON_IMC_FWM_FILE)) \ + $(top)/$(call strip_quotes $(CONFIG_HUDSON_GEC_FWM_FILE)) + echo " Hudson FW $@" + $(src)/southbridge/amd/agesa/hudson/hudson_fwm.sh $(CONFIG_HUDSON_FWM_POSITION) $@ \ + "$(CONFIG_HUDSON_XHCI_FWM_FILE)" \ + "$(CONFIG_HUDSON_IMC_FWM_FILE)" \ + "$(CONFIG_HUDSON_GEC_FWM_FILE)" #Add quotes to avoid skipping NULL string. ifeq ($(CONFIG_HUDSON_FWM), y) cbfs-files-y += hudson/fwm diff --git a/src/southbridge/amd/agesa/hudson/hudson_fwm.py b/src/southbridge/amd/agesa/hudson/hudson_fwm.py deleted file mode 100644 index ad60b3b..0000000 --- a/src/southbridge/amd/agesa/hudson/hudson_fwm.py +++ /dev/null @@ -1,64 +0,0 @@ -import sys, os, re -import struct -from Queue import Queue - -def main(start_addr, file_name, xhci_name, imc_name, gec_name): - fwm_sig = 0x55AA55AA # Hudson-2/3/4 firmware signature - fwm_header_len = 0x10 # 55AA55AA, imc_off, gec_off, xhci_off - - if not os.path.exists(xhci_name): - print "XHCI firmware %s does not exist\n" % xhci_name - sys.exit(1) - if not os.path.exists(imc_name): - print "IMC firmware %s does not exist\n" % imc_name - sys.exit(1) - - f = open(file_name, "w") - print "write to file " + file_name - - imc_offset = 0x10000 # 64K Bytes offset, hardcoded - imc_addr = start_addr + imc_offset; #startaddr + 0x10000 - gec_offset = 0 #TODO - gec_addr = 0 #TODO - xhci_addr = start_addr + fwm_header_len #ROMSIG take 0x10 bytes - - format="I" # one unsigned integer - data=struct.pack(format, fwm_sig) - f.write(data) - data=struct.pack(format, imc_addr) - f.write(data) - data=struct.pack(format, gec_addr) - f.write(data) - data=struct.pack(format, xhci_addr) - f.write(data) - - fwm_content = open(xhci_name).read() - f.write(fwm_content) - - imc_content = open(imc_name).read() - f.seek(0) - f.seek(imc_offset) - f.write(imc_content) -# if os.path.exists(gec_name): -# gec_conent = open(gec_name).read() -# f.seek(0) -# f.seek(gec_offset) -# f.write(gec_content) - - f.close() - print "done\n" - - -if __name__ == '__main__': - if (len(sys.argv) < 6): - print "\nUsage: %s <rom_addr> <rom_file> <xhci_rom> <imc_rom> <gec_rom>\n" % sys.argv[0] - print "Example: %s 0xFFF20000 hudson.bin xhci.bin imc.bin gec.bin\n" % sys.argv[0] - sys.exit(1) - rom_addr = int(sys.argv[1], 16) - rom_file = sys.argv[2] - xhci_file = sys.argv[3] - imc_file = sys.argv[4] - gec_file = sys.argv[5] - print "%x %s %s %s %s" % (rom_addr, rom_file, xhci_file, imc_file, gec_file) - - main(rom_addr, rom_file, xhci_file, imc_file, gec_file) diff --git a/src/southbridge/amd/agesa/hudson/hudson_fwm.sh b/src/southbridge/amd/agesa/hudson/hudson_fwm.sh new file mode 100755 index 0000000..a1f64a6 --- /dev/null +++ b/src/southbridge/amd/agesa/hudson/hudson_fwm.sh @@ -0,0 +1,74 @@ +#!/bin/sh + +filesize() +{ + fwm=`echo $1` #strip quotes + if [ -z $fwm ]; then + size=0 + else + [ -r $fwm ] || { echo "$$fwm not found"; exit 1; }; + size=`ls -l $fwm | awk '{print $5}'`; + fi +} + +# ROMSIG At ROMBASE + 0x20000: +# +-----------+---------------+----------------+------------+ +# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | +# +-----------+---------------+----------------+------------+ +# In our coreboot implementation, we concatenate the ROM images +# next to the ROMSIG. EC ROM should be 64K aligned. +# Final hudson.bin: +# +-----------+---------------+----------------+------------+ +# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | +# +-----------+---------------+----------------+------------+ +# | USB3 ROM | +# +---------------------------------------------------------+ +# | GEC ROM | +# +---------------------------------------------------------+ +# | EC ROM | +# +---------------------------------------------------------+ +# +print_romsig() +{ + echo $1 $2 $3 $4 | + LC_ALL=C awk ' + function print_raw_dword(number) + { + #printf ("%x\n", number) + printf ("%c%c%c%c", number % 0x100, number/0x100 % 0x100, number/0x10000 % 0x100, number/0x1000000); + } + { # $1=ROMSIG address, $2=EC_ROM_size, $3=GEC_ROM_size, $4=USB3_ROM_size + print_raw_dword(0x55AA55AA); + imc_offset = $1 + 16 + $3 + 65535; + imc_offset = imc_offset - (imc_offset) % 65536; #align 64K + if ($2) print_raw_dword(imc_offset); else print_raw_dword(0); + if ($3) print_raw_dword($1 + 16 + $3); else print_raw_dword(0); + if ($4) print_raw_dword($1 + 16); else print_raw_dword(0); + } ' +} + +#main +#param: +# $1=$(CONFIG_HUDSON_FWM_POSITION) +# $2=$obj +# $3=$(CONFIG_HUDSON_XHCI_FWM_FILE) +# $4=$(CONFIG_HUDSON_IMC_FWM_FILE) +# $5=$(CONFIG_HUDSON_GEC_FWM_FILE) +base=`printf %d $1` + +filesize $3 +xhci_size=$size +filesize $4 +imc_size=$size +filesize $5 +gec_size=$size + +print_romsig $base $imc_size $gec_size $xhci_size > $2.tmp +[ -z $3 ] || cat $3 >> $2.tmp +[ -z $5 ] || cat $5 >> $2.tmp +if [ ! -z $4 ]; then + ls -l $2.tmp | awk '{ print $5 }' | LC_ALL=C awk '{for (i=$1; i<($1+65535) - ($1+65535)%65536; i++) {printf "%c", 255}}' >> $2.tmp # align 64K + cat $4 >> $2.tmp +fi + +mv $2.tmp $2

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Patch set updated for coreboot: 49edf85 AMD Hudson: Move the combining firmware from Python to sh.
by Zheng Bao 21 Aug '12

21 Aug '12

Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1417 -gerrit commit 49edf85c763368b465de44747b23c8a916f47416 Author: zbao <fishbaozi(a)gmail.com> Date: Tue Aug 21 19:17:40 2012 +0800 AMD Hudson: Move the combining firmware from Python to sh. Maybe sooner or later python is not a default tools to build coreboot. Most of the work is done by awk now. GNU extension of gawk is not used, isn't? printf, cat, awk, test, mv are the external tools. If XHCI, IMC or GEC firmware is not available and not defined, this script can skip integrating them. Change-Id: I9944b22b0b755672a46d472c355d138abafd6393 Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: zbao <fishbaozi(a)gmail.com> --- src/southbridge/amd/agesa/hudson/Makefile.inc | 7 ++- src/southbridge/amd/agesa/hudson/hudson_fwm.py | 64 ---------------------- src/southbridge/amd/agesa/hudson/hudson_fwm.sh | 74 ++++++++++++++++++++++++++ 3 files changed, 79 insertions(+), 66 deletions(-) diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 19ffae1..ca58255 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -14,8 +14,11 @@ romstage-y += early_setup.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c -$(obj)/hudson.bin: - python $(src)/southbridge/amd/agesa/hudson/hudson_fwm.py $(CONFIG_HUDSON_FWM_POSITION) $@ $(CONFIG_HUDSON_XHCI_FWM_FILE) $(CONFIG_HUDSON_IMC_FWM_FILE) "" +$(obj)/hudson.bin: $(top)/$(call strip_quotes $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ + $(top)/$(call strip_quotes $(CONFIG_HUDSON_IMC_FWM_FILE)) \ + $(top)/$(call strip_quotes $(CONFIG_HUDSON_GEC_FWM_FILE)) + echo " Hudson FW $@" + $(src)/southbridge/amd/agesa/hudson/hudson_fwm.sh $(CONFIG_HUDSON_FWM_POSITION) $@ "$(CONFIG_HUDSON_XHCI_FWM_FILE)" "$(CONFIG_HUDSON_IMC_FWM_FILE)" "$(CONFIG_HUDSON_GEC_FWM_FILE)" #Add quotes to avoid skipping NULL string. ifeq ($(CONFIG_HUDSON_FWM), y) cbfs-files-y += hudson/fwm diff --git a/src/southbridge/amd/agesa/hudson/hudson_fwm.py b/src/southbridge/amd/agesa/hudson/hudson_fwm.py deleted file mode 100644 index ad60b3b..0000000 --- a/src/southbridge/amd/agesa/hudson/hudson_fwm.py +++ /dev/null @@ -1,64 +0,0 @@ -import sys, os, re -import struct -from Queue import Queue - -def main(start_addr, file_name, xhci_name, imc_name, gec_name): - fwm_sig = 0x55AA55AA # Hudson-2/3/4 firmware signature - fwm_header_len = 0x10 # 55AA55AA, imc_off, gec_off, xhci_off - - if not os.path.exists(xhci_name): - print "XHCI firmware %s does not exist\n" % xhci_name - sys.exit(1) - if not os.path.exists(imc_name): - print "IMC firmware %s does not exist\n" % imc_name - sys.exit(1) - - f = open(file_name, "w") - print "write to file " + file_name - - imc_offset = 0x10000 # 64K Bytes offset, hardcoded - imc_addr = start_addr + imc_offset; #startaddr + 0x10000 - gec_offset = 0 #TODO - gec_addr = 0 #TODO - xhci_addr = start_addr + fwm_header_len #ROMSIG take 0x10 bytes - - format="I" # one unsigned integer - data=struct.pack(format, fwm_sig) - f.write(data) - data=struct.pack(format, imc_addr) - f.write(data) - data=struct.pack(format, gec_addr) - f.write(data) - data=struct.pack(format, xhci_addr) - f.write(data) - - fwm_content = open(xhci_name).read() - f.write(fwm_content) - - imc_content = open(imc_name).read() - f.seek(0) - f.seek(imc_offset) - f.write(imc_content) -# if os.path.exists(gec_name): -# gec_conent = open(gec_name).read() -# f.seek(0) -# f.seek(gec_offset) -# f.write(gec_content) - - f.close() - print "done\n" - - -if __name__ == '__main__': - if (len(sys.argv) < 6): - print "\nUsage: %s <rom_addr> <rom_file> <xhci_rom> <imc_rom> <gec_rom>\n" % sys.argv[0] - print "Example: %s 0xFFF20000 hudson.bin xhci.bin imc.bin gec.bin\n" % sys.argv[0] - sys.exit(1) - rom_addr = int(sys.argv[1], 16) - rom_file = sys.argv[2] - xhci_file = sys.argv[3] - imc_file = sys.argv[4] - gec_file = sys.argv[5] - print "%x %s %s %s %s" % (rom_addr, rom_file, xhci_file, imc_file, gec_file) - - main(rom_addr, rom_file, xhci_file, imc_file, gec_file) diff --git a/src/southbridge/amd/agesa/hudson/hudson_fwm.sh b/src/southbridge/amd/agesa/hudson/hudson_fwm.sh new file mode 100755 index 0000000..a1f64a6 --- /dev/null +++ b/src/southbridge/amd/agesa/hudson/hudson_fwm.sh @@ -0,0 +1,74 @@ +#!/bin/sh + +filesize() +{ + fwm=`echo $1` #strip quotes + if [ -z $fwm ]; then + size=0 + else + [ -r $fwm ] || { echo "$$fwm not found"; exit 1; }; + size=`ls -l $fwm | awk '{print $5}'`; + fi +} + +# ROMSIG At ROMBASE + 0x20000: +# +-----------+---------------+----------------+------------+ +# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | +# +-----------+---------------+----------------+------------+ +# In our coreboot implementation, we concatenate the ROM images +# next to the ROMSIG. EC ROM should be 64K aligned. +# Final hudson.bin: +# +-----------+---------------+----------------+------------+ +# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | +# +-----------+---------------+----------------+------------+ +# | USB3 ROM | +# +---------------------------------------------------------+ +# | GEC ROM | +# +---------------------------------------------------------+ +# | EC ROM | +# +---------------------------------------------------------+ +# +print_romsig() +{ + echo $1 $2 $3 $4 | + LC_ALL=C awk ' + function print_raw_dword(number) + { + #printf ("%x\n", number) + printf ("%c%c%c%c", number % 0x100, number/0x100 % 0x100, number/0x10000 % 0x100, number/0x1000000); + } + { # $1=ROMSIG address, $2=EC_ROM_size, $3=GEC_ROM_size, $4=USB3_ROM_size + print_raw_dword(0x55AA55AA); + imc_offset = $1 + 16 + $3 + 65535; + imc_offset = imc_offset - (imc_offset) % 65536; #align 64K + if ($2) print_raw_dword(imc_offset); else print_raw_dword(0); + if ($3) print_raw_dword($1 + 16 + $3); else print_raw_dword(0); + if ($4) print_raw_dword($1 + 16); else print_raw_dword(0); + } ' +} + +#main +#param: +# $1=$(CONFIG_HUDSON_FWM_POSITION) +# $2=$obj +# $3=$(CONFIG_HUDSON_XHCI_FWM_FILE) +# $4=$(CONFIG_HUDSON_IMC_FWM_FILE) +# $5=$(CONFIG_HUDSON_GEC_FWM_FILE) +base=`printf %d $1` + +filesize $3 +xhci_size=$size +filesize $4 +imc_size=$size +filesize $5 +gec_size=$size + +print_romsig $base $imc_size $gec_size $xhci_size > $2.tmp +[ -z $3 ] || cat $3 >> $2.tmp +[ -z $5 ] || cat $5 >> $2.tmp +if [ ! -z $4 ]; then + ls -l $2.tmp | awk '{ print $5 }' | LC_ALL=C awk '{for (i=$1; i<($1+65535) - ($1+65535)%65536; i++) {printf "%c", 255}}' >> $2.tmp # align 64K + cat $4 >> $2.tmp +fi + +mv $2.tmp $2

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Patch merged into coreboot/master: eb39fd2 Support use of the compression option when adding payloads to cbfs.
by gerrit＠coreboot.org 21 Aug '12

21 Aug '12

the following patch was just integrated into master: commit eb39fd223f11259c12c6e44629b8f34de4312a77 Author: Dave Frodin <dave.frodin(a)se-eng.com> Date: Tue Aug 14 11:01:53 2012 -0600 Support use of the compression option when adding payloads to cbfs. Change-Id: Ie77e8e1628d34f1a9e7a57e994bf2882c5e55e25 Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Tue Aug 21 10:58:12 2012, giving +2 See http://review.coreboot.org/1452 for details. -gerrit

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Patch merged into coreboot/master: 3cc2c6d Change to allow coreboot to use "add-payload" instead of "add" for payload images.
by gerrit＠coreboot.org 21 Aug '12

21 Aug '12

the following patch was just integrated into master: commit 3cc2c6d9b2afb8e0489b521252946b3a6a84e6bf Author: Dave Frodin <dave.frodin(a)se-eng.com> Date: Tue Aug 14 10:59:17 2012 -0600 Change to allow coreboot to use "add-payload" instead of "add" for payload images. The current code does some argument manipulation to detect when a stage is being added to cbfs. This same manipulation needs to be done when adding a payload. Change-Id: Ief4c4a81446c9437923cbbb1ce3fa90729317587 Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Tue Aug 21 10:55:42 2012, giving +2 See http://review.coreboot.org/1451 for details. -gerrit

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New patch to review for coreboot: 6b35914 Auto-declare chip_operations
by Kyösti Mälkki 21 Aug '12

21 Aug '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1471 -gerrit commit 6b359140bea8ac94fdfdfe4b8d8dc1757350fe5e Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Aug 21 11:37:11 2012 +0300 Auto-declare chip_operations The name is derived directly from the device path. Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/amd/agesa/family10/chip.h | 2 -- src/cpu/amd/agesa/family12/chip.h | 2 -- src/cpu/amd/agesa/family14/chip.h | 2 -- src/cpu/amd/agesa/family15/chip.h | 2 -- src/cpu/amd/agesa/family15tn/chip.h | 2 -- src/cpu/amd/sc520/chip.h | 2 -- src/cpu/amd/socket_754/chip.h | 2 -- src/cpu/amd/socket_939/chip.h | 2 -- src/cpu/amd/socket_940/chip.h | 2 -- src/cpu/amd/socket_AM2/chip.h | 2 -- src/cpu/amd/socket_AM2r2/chip.h | 2 -- src/cpu/amd/socket_AM3/chip.h | 2 -- src/cpu/amd/socket_ASB2/chip.h | 2 -- src/cpu/amd/socket_C32/chip.h | 2 -- src/cpu/amd/socket_F/chip.h | 2 -- src/cpu/amd/socket_F_1207/chip.h | 2 -- src/cpu/amd/socket_S1G1/chip.h | 2 -- src/cpu/intel/ep80579/chip.h | 2 -- src/cpu/intel/model_206ax/chip.h | 2 -- src/cpu/intel/slot_1/chip.h | 2 -- src/cpu/intel/slot_2/chip.h | 2 -- src/cpu/intel/socket_441/chip.h | 2 -- src/cpu/intel/socket_BGA956/chip.h | 2 -- src/cpu/intel/socket_FC_PGA370/chip.h | 2 -- src/cpu/intel/socket_LGA771/chip.h | 2 -- src/cpu/intel/socket_PGA370/chip.h | 2 -- src/cpu/intel/socket_mFCBGA479/chip.h | 2 -- src/cpu/intel/socket_mFCPGA478/chip.h | 2 -- src/cpu/intel/socket_mPGA478/chip.h | 2 -- src/cpu/intel/socket_mPGA479M/chip.h | 2 -- src/cpu/intel/socket_mPGA603/chip.h | 2 -- src/cpu/intel/socket_mPGA604/chip.h | 2 -- src/cpu/intel/socket_rPGA989/chip.h | 2 -- src/drivers/generic/debug/chip.h | 2 -- src/drivers/generic/ioapic/chip.h | 1 - src/drivers/i2c/adm1026/chip.h | 2 -- src/drivers/i2c/adm1027/chip.h | 2 -- src/drivers/i2c/adt7463/chip.h | 2 -- src/drivers/i2c/i2cmux/chip.h | 2 -- src/drivers/i2c/i2cmux2/chip.h | 2 -- src/drivers/i2c/lm63/chip.h | 2 -- src/drivers/i2c/w83793/chip.h | 2 -- src/drivers/i2c/w83795/chip.h | 2 -- src/drivers/ics/954309/chip.h | 2 -- src/ec/lenovo/h8/chip.h | 1 - src/ec/lenovo/pmh7/chip.h | 2 -- src/ec/smsc/mec1308/chip.h | 3 --- src/mainboard/emulation/qemu-x86/chip.h | 2 -- src/northbridge/amd/agesa/family10/chip.h | 1 - src/northbridge/amd/agesa/family10/root_complex/chip.h | 1 - src/northbridge/amd/agesa/family12/chip.h | 1 - src/northbridge/amd/agesa/family12/root_complex/chip.h | 1 - src/northbridge/amd/agesa/family14/chip.h | 1 - src/northbridge/amd/agesa/family14/root_complex/chip.h | 1 - src/northbridge/amd/agesa/family15/chip.h | 1 - src/northbridge/amd/agesa/family15/root_complex/chip.h | 1 - src/northbridge/amd/agesa/family15tn/chip.h | 1 - src/northbridge/amd/agesa/family15tn/root_complex/chip.h | 1 - src/northbridge/amd/amdfam10/chip.h | 1 - src/northbridge/amd/amdfam10/root_complex/chip.h | 1 - src/northbridge/amd/amdk8/chip.h | 1 - src/northbridge/amd/amdk8/root_complex/chip.h | 1 - src/northbridge/amd/cimx/rd890/chip.h | 3 --- src/northbridge/amd/gx1/chip.h | 1 - src/northbridge/amd/gx2/chip.h | 1 - src/northbridge/amd/lx/chip.h | 1 - src/northbridge/intel/e7501/chip.h | 1 - src/northbridge/intel/e7505/chip.h | 2 -- src/northbridge/intel/e7520/chip.h | 1 - src/northbridge/intel/e7525/chip.h | 1 - src/northbridge/intel/i3100/chip.h | 1 - src/northbridge/intel/i440bx/chip.h | 1 - src/northbridge/intel/i440lx/chip.h | 1 - src/northbridge/intel/i5000/chip.h | 1 - src/northbridge/intel/i82810/chip.h | 1 - src/northbridge/intel/i82830/chip.h | 1 - src/northbridge/intel/i855/chip.h | 1 - src/northbridge/intel/i945/chip.h | 1 - src/northbridge/intel/sandybridge/chip.h | 1 - src/northbridge/intel/sch/chip.h | 1 - src/northbridge/rdc/r8610/chip.h | 1 - src/northbridge/via/cn400/chip.h | 1 - src/northbridge/via/cn700/chip.h | 1 - src/northbridge/via/cx700/chip.h | 1 - src/northbridge/via/vt8601/chip.h | 1 - src/northbridge/via/vt8623/chip.h | 1 - src/northbridge/via/vx800/chip.h | 1 - src/southbridge/amd/agesa/hudson/chip.h | 2 -- src/southbridge/amd/amd8111/chip.h | 3 --- src/southbridge/amd/cimx/sb700/chip.h | 2 -- src/southbridge/amd/cimx/sb800/chip.h | 2 -- src/southbridge/amd/cimx/sb900/chip.h | 2 -- src/southbridge/amd/cs5530/chip.h | 2 -- src/southbridge/amd/cs5535/chip.h | 2 -- src/southbridge/amd/cs5536/chip.h | 2 -- src/southbridge/amd/rs690/chip.h | 2 -- src/southbridge/amd/rs780/chip.h | 2 -- src/southbridge/amd/sb600/chip.h | 2 -- src/southbridge/amd/sb700/chip.h | 2 -- src/southbridge/amd/sb800/chip.h | 2 -- src/southbridge/amd/sr5650/chip.h | 2 -- src/southbridge/broadcom/bcm5785/chip.h | 2 -- src/southbridge/intel/bd82x6x/chip.h | 2 -- src/southbridge/intel/esb6300/chip.h | 1 - src/southbridge/intel/i3100/chip.h | 1 - src/southbridge/intel/i82371eb/chip.h | 2 -- src/southbridge/intel/i82801ax/chip.h | 2 -- src/southbridge/intel/i82801bx/chip.h | 2 -- src/southbridge/intel/i82801cx/chip.h | 1 - src/southbridge/intel/i82801dx/chip.h | 2 -- src/southbridge/intel/i82801ex/chip.h | 1 - src/southbridge/intel/i82801gx/chip.h | 2 -- src/southbridge/intel/pxhd/chip.h | 1 - src/southbridge/intel/sch/chip.h | 2 -- src/southbridge/nvidia/ck804/chip.h | 2 -- src/southbridge/nvidia/mcp55/chip.h | 2 -- src/southbridge/ricoh/rl5c476/chip.h | 2 -- src/southbridge/sis/sis966/chip.h | 2 -- src/southbridge/ti/pci1x2x/chip.h | 2 -- src/southbridge/ti/pci7420/chip.h | 2 -- src/southbridge/ti/pcixx12/chip.h | 2 -- src/southbridge/via/vt8231/chip.h | 2 -- src/southbridge/via/vt8235/chip.h | 2 -- src/southbridge/via/vt8237r/chip.h | 2 -- src/southbridge/via/vt82c686/chip.h | 2 -- src/superio/fintek/f71805f/chip.h | 2 -- src/superio/fintek/f71859/chip.h | 2 -- src/superio/fintek/f71863fg/chip.h | 2 -- src/superio/fintek/f71872/chip.h | 2 -- src/superio/fintek/f71889/chip.h | 2 -- src/superio/fintek/f81865f/chip.h | 2 -- src/superio/intel/i3100/chip.h | 2 -- src/superio/ite/it8661f/chip.h | 2 -- src/superio/ite/it8671f/chip.h | 2 -- src/superio/ite/it8673f/chip.h | 2 -- src/superio/ite/it8705f/chip.h | 2 -- src/superio/ite/it8712f/chip.h | 2 -- src/superio/ite/it8716f/chip.h | 2 -- src/superio/ite/it8718f/chip.h | 2 -- src/superio/ite/it8721f/chip.h | 2 -- src/superio/ite/it8772f/chip.h | 2 -- src/superio/nsc/pc8374/chip.h | 3 --- src/superio/nsc/pc87309/chip.h | 2 -- src/superio/nsc/pc87351/chip.h | 3 --- src/superio/nsc/pc87360/chip.h | 3 --- src/superio/nsc/pc87366/chip.h | 2 -- src/superio/nsc/pc87382/chip.h | 1 - src/superio/nsc/pc87384/chip.h | 1 - src/superio/nsc/pc87392/chip.h | 2 -- src/superio/nsc/pc87417/chip.h | 2 -- src/superio/nsc/pc87427/chip.h | 2 -- src/superio/nsc/pc97307/chip.h | 2 -- src/superio/nsc/pc97317/chip.h | 2 -- src/superio/nuvoton/wpcm450/chip.h | 3 --- src/superio/renesas/m3885x/chip.h | 2 -- src/superio/smsc/fdc37m60x/chip.h | 2 -- src/superio/smsc/fdc37n972/chip.h | 2 -- src/superio/smsc/kbc1100/chip.h | 3 --- src/superio/smsc/lpc47b272/chip.h | 3 --- src/superio/smsc/lpc47b397/chip.h | 3 --- src/superio/smsc/lpc47m10x/chip.h | 3 --- src/superio/smsc/lpc47m15x/chip.h | 3 --- src/superio/smsc/lpc47n217/chip.h | 3 --- src/superio/smsc/lpc47n227/chip.h | 2 -- src/superio/smsc/mec1308/chip.h | 3 --- src/superio/smsc/sch4037/chip.h | 3 --- src/superio/smsc/sio1036/chip.h | 3 --- src/superio/smsc/sio10n268/chip.h | 2 -- src/superio/smsc/smscsuperio/chip.h | 2 -- src/superio/via/vt1211/chip.h | 2 -- src/superio/winbond/w83627dhg/chip.h | 2 -- src/superio/winbond/w83627ehg/chip.h | 2 -- src/superio/winbond/w83627hf/chip.h | 2 -- src/superio/winbond/w83627thg/chip.h | 2 -- src/superio/winbond/w83627uhg/chip.h | 2 -- src/superio/winbond/w83697hf/chip.h | 2 -- src/superio/winbond/w83977f/chip.h | 2 -- src/superio/winbond/w83977tf/chip.h | 2 -- util/sconfig/main.c | 8 ++++++++ 179 files changed, 8 insertions(+), 326 deletions(-) diff --git a/src/cpu/amd/agesa/family10/chip.h b/src/cpu/amd/agesa/family10/chip.h index d5a749b..4f9fa77 100644 --- a/src/cpu/amd/agesa/family10/chip.h +++ b/src/cpu/amd/agesa/family10/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_agesa_family10_ops; - struct cpu_amd_agesa_family10_config { }; diff --git a/src/cpu/amd/agesa/family12/chip.h b/src/cpu/amd/agesa/family12/chip.h index f63a87f..0eaa0e2 100644 --- a/src/cpu/amd/agesa/family12/chip.h +++ b/src/cpu/amd/agesa/family12/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_agesa_family12_ops; - struct cpu_amd_agesa_family12_config { }; diff --git a/src/cpu/amd/agesa/family14/chip.h b/src/cpu/amd/agesa/family14/chip.h index d67184e..59c7cfe 100644 --- a/src/cpu/amd/agesa/family14/chip.h +++ b/src/cpu/amd/agesa/family14/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_agesa_family14_ops; - struct cpu_amd_agesa_family14_config { }; diff --git a/src/cpu/amd/agesa/family15/chip.h b/src/cpu/amd/agesa/family15/chip.h index 0171e7f..e6daaef 100644 --- a/src/cpu/amd/agesa/family15/chip.h +++ b/src/cpu/amd/agesa/family15/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_agesa_family15_ops; - struct cpu_amd_agesa_family15_config { }; diff --git a/src/cpu/amd/agesa/family15tn/chip.h b/src/cpu/amd/agesa/family15tn/chip.h index cf8294f..5ad93c5 100644 --- a/src/cpu/amd/agesa/family15tn/chip.h +++ b/src/cpu/amd/agesa/family15tn/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_agesa_family15tn_ops; - struct cpu_amd_agesa_family15tn_config { }; diff --git a/src/cpu/amd/sc520/chip.h b/src/cpu/amd/sc520/chip.h index b16db54..64f3a85 100644 --- a/src/cpu/amd/sc520/chip.h +++ b/src/cpu/amd/sc520/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_sc520_ops; - struct cpu_amd_sc520_config { }; diff --git a/src/cpu/amd/socket_754/chip.h b/src/cpu/amd/socket_754/chip.h index d9f3600..197145f 100644 --- a/src/cpu/amd/socket_754/chip.h +++ b/src/cpu/amd/socket_754/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_754_ops; - struct cpu_amd_socket_754_config { }; diff --git a/src/cpu/amd/socket_939/chip.h b/src/cpu/amd/socket_939/chip.h index 2a635b7..ca93451 100644 --- a/src/cpu/amd/socket_939/chip.h +++ b/src/cpu/amd/socket_939/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_939_ops; - struct cpu_amd_socket_939_config { }; diff --git a/src/cpu/amd/socket_940/chip.h b/src/cpu/amd/socket_940/chip.h index 7154dd1..8b96614 100644 --- a/src/cpu/amd/socket_940/chip.h +++ b/src/cpu/amd/socket_940/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_940_ops; - struct cpu_amd_socket_940_config { }; diff --git a/src/cpu/amd/socket_AM2/chip.h b/src/cpu/amd/socket_AM2/chip.h index 6b3290c..5d9e875 100644 --- a/src/cpu/amd/socket_AM2/chip.h +++ b/src/cpu/amd/socket_AM2/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_AM2_ops; - struct cpu_amd_socket_AM2_config { }; diff --git a/src/cpu/amd/socket_AM2r2/chip.h b/src/cpu/amd/socket_AM2r2/chip.h index fe49ad2..1c93a99 100644 --- a/src/cpu/amd/socket_AM2r2/chip.h +++ b/src/cpu/amd/socket_AM2r2/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_socket_AM2r2_ops; - struct cpu_amd_socket_AM2r2_config { }; diff --git a/src/cpu/amd/socket_AM3/chip.h b/src/cpu/amd/socket_AM3/chip.h index 16e0935..70f6b1f 100644 --- a/src/cpu/amd/socket_AM3/chip.h +++ b/src/cpu/amd/socket_AM3/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_socket_AM3_ops; - struct cpu_amd_socket_AM3_config { }; diff --git a/src/cpu/amd/socket_ASB2/chip.h b/src/cpu/amd/socket_ASB2/chip.h index 3a53696..5939c2b 100644 --- a/src/cpu/amd/socket_ASB2/chip.h +++ b/src/cpu/amd/socket_ASB2/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_socket_ASB2_ops; - struct cpu_amd_socket_ASB2_config { }; diff --git a/src/cpu/amd/socket_C32/chip.h b/src/cpu/amd/socket_C32/chip.h index 0e06de5..e9d57c7 100644 --- a/src/cpu/amd/socket_C32/chip.h +++ b/src/cpu/amd/socket_C32/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_socket_C32_ops; - struct cpu_amd_socket_C32_config { }; diff --git a/src/cpu/amd/socket_F/chip.h b/src/cpu/amd/socket_F/chip.h index ce2fde0..cb582d3 100644 --- a/src/cpu/amd/socket_F/chip.h +++ b/src/cpu/amd/socket_F/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_F_ops; - struct cpu_amd_socket_F_config { }; diff --git a/src/cpu/amd/socket_F_1207/chip.h b/src/cpu/amd/socket_F_1207/chip.h index 95b13e2..3f7d824 100644 --- a/src/cpu/amd/socket_F_1207/chip.h +++ b/src/cpu/amd/socket_F_1207/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_amd_socket_F_1207_ops; - struct cpu_amd_socket_F_1207_config { }; diff --git a/src/cpu/amd/socket_S1G1/chip.h b/src/cpu/amd/socket_S1G1/chip.h index 826c706..3109da2 100644 --- a/src/cpu/amd/socket_S1G1/chip.h +++ b/src/cpu/amd/socket_S1G1/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_amd_socket_S1G1_ops; - struct cpu_amd_socket_S1G1_config { }; diff --git a/src/cpu/intel/ep80579/chip.h b/src/cpu/intel/ep80579/chip.h index 6383c86..08e7529 100644 --- a/src/cpu/intel/ep80579/chip.h +++ b/src/cpu/intel/ep80579/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_intel_ep80579_ops; - struct cpu_intel_ep80579_config { }; diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index 96b4c5d..85cbe1b 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -17,8 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_intel_model_206ax_ops; - /* Magic value used to locate this chip in the device tree */ #define SPEEDSTEP_APIC_MAGIC 0xACAC diff --git a/src/cpu/intel/slot_1/chip.h b/src/cpu/intel/slot_1/chip.h index 6721d6e..8650f90 100644 --- a/src/cpu/intel/slot_1/chip.h +++ b/src/cpu/intel/slot_1/chip.h @@ -18,7 +18,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_intel_slot_1_ops; - struct cpu_intel_slot_1_config { }; diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h index 0f504db..d7bb2b1 100644 --- a/src/cpu/intel/slot_2/chip.h +++ b/src/cpu/intel/slot_2/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_slot_2_ops; - struct cpu_intel_slot_2_config { }; diff --git a/src/cpu/intel/socket_441/chip.h b/src/cpu/intel/socket_441/chip.h index 264dafa..70c4ac8 100644 --- a/src/cpu/intel/socket_441/chip.h +++ b/src/cpu/intel/socket_441/chip.h @@ -17,7 +17,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_intel_socket_441_ops; - struct cpu_intel_socket_441_config { }; diff --git a/src/cpu/intel/socket_BGA956/chip.h b/src/cpu/intel/socket_BGA956/chip.h index 68ec1d2..399200d 100644 --- a/src/cpu/intel/socket_BGA956/chip.h +++ b/src/cpu/intel/socket_BGA956/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_BGA956_ops; - struct cpu_intel_socket_BGA956_config { }; diff --git a/src/cpu/intel/socket_FC_PGA370/chip.h b/src/cpu/intel/socket_FC_PGA370/chip.h index c1195c2..7148d47 100644 --- a/src/cpu/intel/socket_FC_PGA370/chip.h +++ b/src/cpu/intel/socket_FC_PGA370/chip.h @@ -18,7 +18,5 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -extern struct chip_operations cpu_intel_socket_FC_PGA370_ops; - struct cpu_intel_socket_FC_PGA370_config { }; diff --git a/src/cpu/intel/socket_LGA771/chip.h b/src/cpu/intel/socket_LGA771/chip.h index d3f312e..fc51d77 100644 --- a/src/cpu/intel/socket_LGA771/chip.h +++ b/src/cpu/intel/socket_LGA771/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_LGA771_ops; - struct cpu_intel_socket_LGA771_config { }; diff --git a/src/cpu/intel/socket_PGA370/chip.h b/src/cpu/intel/socket_PGA370/chip.h index 469b662..c2c70ec 100644 --- a/src/cpu/intel/socket_PGA370/chip.h +++ b/src/cpu/intel/socket_PGA370/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_PGA370_ops; - struct cpu_intel_socket_PGA370_config { }; diff --git a/src/cpu/intel/socket_mFCBGA479/chip.h b/src/cpu/intel/socket_mFCBGA479/chip.h index 9dee4a9..57e432c 100644 --- a/src/cpu/intel/socket_mFCBGA479/chip.h +++ b/src/cpu/intel/socket_mFCBGA479/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mFCBGA479_ops; - struct cpu_intel_socket_mFCBGA479_config { }; diff --git a/src/cpu/intel/socket_mFCPGA478/chip.h b/src/cpu/intel/socket_mFCPGA478/chip.h index b747698..50268f5 100644 --- a/src/cpu/intel/socket_mFCPGA478/chip.h +++ b/src/cpu/intel/socket_mFCPGA478/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mFCPGA478_ops; - struct cpu_intel_socket_mFCPGA478_config { }; diff --git a/src/cpu/intel/socket_mPGA478/chip.h b/src/cpu/intel/socket_mPGA478/chip.h index 8cc29b1..3dafc9a 100644 --- a/src/cpu/intel/socket_mPGA478/chip.h +++ b/src/cpu/intel/socket_mPGA478/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mPGA478_ops; - struct cpu_intel_socket_mPGA478_config { }; diff --git a/src/cpu/intel/socket_mPGA479M/chip.h b/src/cpu/intel/socket_mPGA479M/chip.h index 57e9bd5..c0c5cd4 100644 --- a/src/cpu/intel/socket_mPGA479M/chip.h +++ b/src/cpu/intel/socket_mPGA479M/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mPGA479M_ops; - struct cpu_intel_socket_mPGA479M_config { }; diff --git a/src/cpu/intel/socket_mPGA603/chip.h b/src/cpu/intel/socket_mPGA603/chip.h index 0170297..b39982a 100644 --- a/src/cpu/intel/socket_mPGA603/chip.h +++ b/src/cpu/intel/socket_mPGA603/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mPGA603_ops; - struct cpu_intel_socket_mPGA603_config { }; diff --git a/src/cpu/intel/socket_mPGA604/chip.h b/src/cpu/intel/socket_mPGA604/chip.h index 636d797..3a09b82 100644 --- a/src/cpu/intel/socket_mPGA604/chip.h +++ b/src/cpu/intel/socket_mPGA604/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_mPGA604_ops; - struct cpu_intel_socket_mPGA604_config { }; diff --git a/src/cpu/intel/socket_rPGA989/chip.h b/src/cpu/intel/socket_rPGA989/chip.h index f843e74..ee3b396 100644 --- a/src/cpu/intel/socket_rPGA989/chip.h +++ b/src/cpu/intel/socket_rPGA989/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations cpu_intel_socket_rPGA989_ops; - struct cpu_intel_socket_rPGA989_config { }; diff --git a/src/drivers/generic/debug/chip.h b/src/drivers/generic/debug/chip.h index 78ce215..661fd54 100644 --- a/src/drivers/generic/debug/chip.h +++ b/src/drivers/generic/debug/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_generic_debug_ops; - struct drivers_generic_debug_config { }; diff --git a/src/drivers/generic/ioapic/chip.h b/src/drivers/generic/ioapic/chip.h index f6b298f..ad6ff0b 100644 --- a/src/drivers/generic/ioapic/chip.h +++ b/src/drivers/generic/ioapic/chip.h @@ -20,7 +20,6 @@ #ifndef DRIVERS_GENERIC_IOAPIC_CHIP_H #define DRIVERS_GENERIC_IOAPIC_CHIP_H -extern struct chip_operations drivers_generic_ioapic_ops; struct drivers_generic_ioapic_config { u32 version; u8 apicid; diff --git a/src/drivers/i2c/adm1026/chip.h b/src/drivers/i2c/adm1026/chip.h index 4ccca76..f8324ad 100644 --- a/src/drivers/i2c/adm1026/chip.h +++ b/src/drivers/i2c/adm1026/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_adm1026_ops; - struct drivers_i2c_adm1026_config { }; diff --git a/src/drivers/i2c/adm1027/chip.h b/src/drivers/i2c/adm1027/chip.h index 94c4e88..8836817 100644 --- a/src/drivers/i2c/adm1027/chip.h +++ b/src/drivers/i2c/adm1027/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_adm1027_ops; - struct drivers_i2c_adm1027_config { }; diff --git a/src/drivers/i2c/adt7463/chip.h b/src/drivers/i2c/adt7463/chip.h index fdb22b9..351d548 100644 --- a/src/drivers/i2c/adt7463/chip.h +++ b/src/drivers/i2c/adt7463/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_adt7463_ops; - struct drivers_i2c_adt7463_config { }; diff --git a/src/drivers/i2c/i2cmux/chip.h b/src/drivers/i2c/i2cmux/chip.h index ffaf879..0cfd837 100644 --- a/src/drivers/i2c/i2cmux/chip.h +++ b/src/drivers/i2c/i2cmux/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_i2cmux_ops; - struct drivers_i2c_i2cmux_config { }; diff --git a/src/drivers/i2c/i2cmux2/chip.h b/src/drivers/i2c/i2cmux2/chip.h index f6fd35f..dafa1d7 100644 --- a/src/drivers/i2c/i2cmux2/chip.h +++ b/src/drivers/i2c/i2cmux2/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_i2cmux2_ops; - struct drivers_i2c_i2cmux2_config { }; diff --git a/src/drivers/i2c/lm63/chip.h b/src/drivers/i2c/lm63/chip.h index 5c55846..1c5bc7a 100644 --- a/src/drivers/i2c/lm63/chip.h +++ b/src/drivers/i2c/lm63/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_lm63_ops; - struct drivers_i2c_lm63_config { }; diff --git a/src/drivers/i2c/w83793/chip.h b/src/drivers/i2c/w83793/chip.h index dc3cd75..65a50bb 100644 --- a/src/drivers/i2c/w83793/chip.h +++ b/src/drivers/i2c/w83793/chip.h @@ -1,5 +1,3 @@ -extern struct chip_operations drivers_i2c_w83793_ops; - struct drivers_i2c_w83793_config { u8 mfc; u8 fanin; diff --git a/src/drivers/i2c/w83795/chip.h b/src/drivers/i2c/w83795/chip.h index 2900636..b5162c1 100644 --- a/src/drivers/i2c/w83795/chip.h +++ b/src/drivers/i2c/w83795/chip.h @@ -1,4 +1,2 @@ -extern struct chip_operations drivers_i2c_w83795_ops; - struct drivers_i2c_w83795_config { }; diff --git a/src/drivers/ics/954309/chip.h b/src/drivers/ics/954309/chip.h index 8dfc3e0..66cc2c6 100644 --- a/src/drivers/ics/954309/chip.h +++ b/src/drivers/ics/954309/chip.h @@ -19,8 +19,6 @@ * MA 02110-1301 USA */ -extern struct chip_operations drivers_ics_954309_ops; - struct drivers_ics_954309_config { u8 reg0; u8 reg1; diff --git a/src/ec/lenovo/h8/chip.h b/src/ec/lenovo/h8/chip.h index 3a75f3b..1b14aa9 100644 --- a/src/ec/lenovo/h8/chip.h +++ b/src/ec/lenovo/h8/chip.h @@ -20,7 +20,6 @@ #ifndef EC_LENOVO_H8EC_CHIP_H #define EC_LENOVO_H8EC_CHIP_H -extern struct chip_operations ec_lenovo_h8_ops; struct ec_lenovo_h8_config { u8 config0; diff --git a/src/ec/lenovo/pmh7/chip.h b/src/ec/lenovo/pmh7/chip.h index 725a5d5..c7e1de6 100644 --- a/src/ec/lenovo/pmh7/chip.h +++ b/src/ec/lenovo/pmh7/chip.h @@ -20,8 +20,6 @@ #ifndef EC_LENOVO_PMH7_CHIP_H #define EC_LENOVO_PMH7_CHIP_H -extern struct chip_operations ec_lenovo_pmh7_ops; - struct ec_lenovo_pmh7_config { int backlight_enable:1; int dock_event_enable:1; diff --git a/src/ec/smsc/mec1308/chip.h b/src/ec/smsc/mec1308/chip.h index 3a8eae8..1768185 100644 --- a/src/ec/smsc/mec1308/chip.h +++ b/src/ec/smsc/mec1308/chip.h @@ -27,7 +27,4 @@ struct ec_smsc_mec1308_config u16 mailbox_port; }; -struct chip_operations; -extern struct chip_operations ec_smsc_mec1308_ops; - #endif /* _EC_SMSC_MEC1308_CHIP_H */ diff --git a/src/mainboard/emulation/qemu-x86/chip.h b/src/mainboard/emulation/qemu-x86/chip.h index ff9301f..0aa8173 100644 --- a/src/mainboard/emulation/qemu-x86/chip.h +++ b/src/mainboard/emulation/qemu-x86/chip.h @@ -1,4 +1,2 @@ struct mainboard_emulation_qemu_x86_config {}; -extern struct chip_operations mainboard_emulation_qemu_x86_ops; - diff --git a/src/northbridge/amd/agesa/family10/chip.h b/src/northbridge/amd/agesa/family10/chip.h index c0ac56e..f95d5b1 100644 --- a/src/northbridge/amd/agesa/family10/chip.h +++ b/src/northbridge/amd/agesa/family10/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family10_config { }; -extern struct chip_operations northbridge_amd_agesa_family10_ops; diff --git a/src/northbridge/amd/agesa/family10/root_complex/chip.h b/src/northbridge/amd/agesa/family10/root_complex/chip.h index 15a2e1a..80adb8e 100644 --- a/src/northbridge/amd/agesa/family10/root_complex/chip.h +++ b/src/northbridge/amd/agesa/family10/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family10_root_complex_config { }; -extern struct chip_operations northbridge_amd_agesa_family10_root_complex_ops; diff --git a/src/northbridge/amd/agesa/family12/chip.h b/src/northbridge/amd/agesa/family12/chip.h index 462610d..39efd52 100644 --- a/src/northbridge/amd/agesa/family12/chip.h +++ b/src/northbridge/amd/agesa/family12/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family12_config { }; -extern struct chip_operations northbridge_amd_agesa_family12_ops; diff --git a/src/northbridge/amd/agesa/family12/root_complex/chip.h b/src/northbridge/amd/agesa/family12/root_complex/chip.h index 9159925..556f343 100644 --- a/src/northbridge/amd/agesa/family12/root_complex/chip.h +++ b/src/northbridge/amd/agesa/family12/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family12_root_complex_config { }; -extern struct chip_operations northbridge_amd_agesa_family12_root_complex_ops; diff --git a/src/northbridge/amd/agesa/family14/chip.h b/src/northbridge/amd/agesa/family14/chip.h index 26a1aad..46ea78a 100644 --- a/src/northbridge/amd/agesa/family14/chip.h +++ b/src/northbridge/amd/agesa/family14/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family14_config { }; -extern struct chip_operations northbridge_amd_agesa_family14_ops; diff --git a/src/northbridge/amd/agesa/family14/root_complex/chip.h b/src/northbridge/amd/agesa/family14/root_complex/chip.h index 234f931..cf95179 100644 --- a/src/northbridge/amd/agesa/family14/root_complex/chip.h +++ b/src/northbridge/amd/agesa/family14/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family14_root_complex_config { }; -extern struct chip_operations northbridge_amd_agesa_family14_root_complex_ops; diff --git a/src/northbridge/amd/agesa/family15/chip.h b/src/northbridge/amd/agesa/family15/chip.h index cec1fc4..b06318b 100644 --- a/src/northbridge/amd/agesa/family15/chip.h +++ b/src/northbridge/amd/agesa/family15/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15_config { }; -extern struct chip_operations northbridge_amd_agesa_family15_ops; diff --git a/src/northbridge/amd/agesa/family15/root_complex/chip.h b/src/northbridge/amd/agesa/family15/root_complex/chip.h index 06b3510..8f670f6 100644 --- a/src/northbridge/amd/agesa/family15/root_complex/chip.h +++ b/src/northbridge/amd/agesa/family15/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15_root_complex_config { }; -extern struct chip_operations northbridge_amd_agesa_family15_root_complex_ops; diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h index d836171..091de82 100644 --- a/src/northbridge/amd/agesa/family15tn/chip.h +++ b/src/northbridge/amd/agesa/family15tn/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15tn_config { }; -extern struct chip_operations northbridge_amd_agesa_family15tn_ops; diff --git a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h b/src/northbridge/amd/agesa/family15tn/root_complex/chip.h index 802bb95..0306fdd 100644 --- a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h +++ b/src/northbridge/amd/agesa/family15tn/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_agesa_family15tn_root_complex_config { }; -extern struct chip_operations northbridge_amd_agesa_family15tn_root_complex_ops; diff --git a/src/northbridge/amd/amdfam10/chip.h b/src/northbridge/amd/amdfam10/chip.h index e055475..a8161cb 100644 --- a/src/northbridge/amd/amdfam10/chip.h +++ b/src/northbridge/amd/amdfam10/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_amdfam10_config { }; -extern struct chip_operations northbridge_amd_amdfam10_ops; diff --git a/src/northbridge/amd/amdfam10/root_complex/chip.h b/src/northbridge/amd/amdfam10/root_complex/chip.h index ed42c0f..8c93020 100644 --- a/src/northbridge/amd/amdfam10/root_complex/chip.h +++ b/src/northbridge/amd/amdfam10/root_complex/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_amdfam10_root_complex_config { }; -extern struct chip_operations northbridge_amd_amdfam10_root_complex_ops; diff --git a/src/northbridge/amd/amdk8/chip.h b/src/northbridge/amd/amdk8/chip.h index 26d4e53..a2331f4 100644 --- a/src/northbridge/amd/amdk8/chip.h +++ b/src/northbridge/amd/amdk8/chip.h @@ -2,4 +2,3 @@ struct northbridge_amd_amdk8_config { }; -extern struct chip_operations northbridge_amd_amdk8_ops; diff --git a/src/northbridge/amd/amdk8/root_complex/chip.h b/src/northbridge/amd/amdk8/root_complex/chip.h index 0b49ca8..a9b6b5b 100644 --- a/src/northbridge/amd/amdk8/root_complex/chip.h +++ b/src/northbridge/amd/amdk8/root_complex/chip.h @@ -2,4 +2,3 @@ struct northbridge_amd_amdk8_root_complex_config { }; -extern struct chip_operations northbridge_amd_amdk8_root_complex_ops; diff --git a/src/northbridge/amd/cimx/rd890/chip.h b/src/northbridge/amd/cimx/rd890/chip.h index c2f985b..ccc979f 100644 --- a/src/northbridge/amd/cimx/rd890/chip.h +++ b/src/northbridge/amd/cimx/rd890/chip.h @@ -17,12 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ - #ifndef _CIMX_RD890_CHIP_H_ #define _CIMX_RD890_CHIP_H_ -extern struct chip_operations northbridge_amd_cimx_rd890_ops; - /** * RD890 specific device configuration */ diff --git a/src/northbridge/amd/gx1/chip.h b/src/northbridge/amd/gx1/chip.h index 0037456..0378b61 100644 --- a/src/northbridge/amd/gx1/chip.h +++ b/src/northbridge/amd/gx1/chip.h @@ -2,4 +2,3 @@ struct northbridge_amd_gx1_config { }; -extern struct chip_operations northbridge_amd_gx1_ops; diff --git a/src/northbridge/amd/gx2/chip.h b/src/northbridge/amd/gx2/chip.h index 34021ba..1e266c6 100644 --- a/src/northbridge/amd/gx2/chip.h +++ b/src/northbridge/amd/gx2/chip.h @@ -22,4 +22,3 @@ struct northbridge_amd_gx2_config }; -extern struct chip_operations northbridge_amd_gx2_ops; diff --git a/src/northbridge/amd/lx/chip.h b/src/northbridge/amd/lx/chip.h index 94ef6c5..12b50fb 100644 --- a/src/northbridge/amd/lx/chip.h +++ b/src/northbridge/amd/lx/chip.h @@ -21,4 +21,3 @@ struct northbridge_amd_lx_config { }; -extern struct chip_operations northbridge_amd_lx_ops; diff --git a/src/northbridge/intel/e7501/chip.h b/src/northbridge/intel/e7501/chip.h index 458510b..112c03c 100644 --- a/src/northbridge/intel/e7501/chip.h +++ b/src/northbridge/intel/e7501/chip.h @@ -2,4 +2,3 @@ struct northbridge_intel_e7501_config { }; -extern struct chip_operations northbridge_intel_e7501_ops; diff --git a/src/northbridge/intel/e7505/chip.h b/src/northbridge/intel/e7505/chip.h index 9677dca..8fd3cdc 100644 --- a/src/northbridge/intel/e7505/chip.h +++ b/src/northbridge/intel/e7505/chip.h @@ -2,5 +2,3 @@ struct northbridge_intel_e7505_config { }; -extern struct chip_operations northbridge_intel_e7505_ops; - diff --git a/src/northbridge/intel/e7520/chip.h b/src/northbridge/intel/e7520/chip.h index b02b8b8..99833bd 100644 --- a/src/northbridge/intel/e7520/chip.h +++ b/src/northbridge/intel/e7520/chip.h @@ -4,4 +4,3 @@ struct northbridge_intel_e7520_config unsigned int intrline; }; -extern struct chip_operations northbridge_intel_e7520_ops; diff --git a/src/northbridge/intel/e7525/chip.h b/src/northbridge/intel/e7525/chip.h index 7daadef..c7783d4 100644 --- a/src/northbridge/intel/e7525/chip.h +++ b/src/northbridge/intel/e7525/chip.h @@ -4,4 +4,3 @@ struct northbridge_intel_e7525_config unsigned int intrline; }; -extern struct chip_operations northbridge_intel_e7525_ops; diff --git a/src/northbridge/intel/i3100/chip.h b/src/northbridge/intel/i3100/chip.h index 0ed31a4..76e81dd 100644 --- a/src/northbridge/intel/i3100/chip.h +++ b/src/northbridge/intel/i3100/chip.h @@ -23,4 +23,3 @@ struct northbridge_intel_i3100_config u16 intrline; }; -extern struct chip_operations northbridge_intel_i3100_ops; diff --git a/src/northbridge/intel/i440bx/chip.h b/src/northbridge/intel/i440bx/chip.h index a43a20c..15ecb4d 100644 --- a/src/northbridge/intel/i440bx/chip.h +++ b/src/northbridge/intel/i440bx/chip.h @@ -22,4 +22,3 @@ struct northbridge_intel_i440bx_config { }; -extern struct chip_operations northbridge_intel_i440bx_ops; diff --git a/src/northbridge/intel/i440lx/chip.h b/src/northbridge/intel/i440lx/chip.h index 8d800f8..19a9b26 100644 --- a/src/northbridge/intel/i440lx/chip.h +++ b/src/northbridge/intel/i440lx/chip.h @@ -22,4 +22,3 @@ struct northbridge_intel_i440lx_config { }; -extern struct chip_operations northbridge_intel_i440lx_ops; diff --git a/src/northbridge/intel/i5000/chip.h b/src/northbridge/intel/i5000/chip.h index a23be90..214ffcf 100644 --- a/src/northbridge/intel/i5000/chip.h +++ b/src/northbridge/intel/i5000/chip.h @@ -20,4 +20,3 @@ struct northbridge_intel_i5000_config { }; -extern struct chip_operations northbridge_intel_i5000_ops; diff --git a/src/northbridge/intel/i82810/chip.h b/src/northbridge/intel/i82810/chip.h index f8c523e..c571677 100644 --- a/src/northbridge/intel/i82810/chip.h +++ b/src/northbridge/intel/i82810/chip.h @@ -21,4 +21,3 @@ struct northbridge_intel_i82810_config { }; -extern struct chip_operations northbridge_intel_i82810_ops; diff --git a/src/northbridge/intel/i82830/chip.h b/src/northbridge/intel/i82830/chip.h index af398f5..d0360fe 100644 --- a/src/northbridge/intel/i82830/chip.h +++ b/src/northbridge/intel/i82830/chip.h @@ -21,4 +21,3 @@ struct northbridge_intel_i82830_config { }; -extern struct chip_operations northbridge_intel_i82830_ops; diff --git a/src/northbridge/intel/i855/chip.h b/src/northbridge/intel/i855/chip.h index f98fe7b..40b1d38 100644 --- a/src/northbridge/intel/i855/chip.h +++ b/src/northbridge/intel/i855/chip.h @@ -22,4 +22,3 @@ struct northbridge_intel_i855_config { }; -extern struct chip_operations northbridge_intel_i855_ops; diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h index 6c51394..2deb985 100644 --- a/src/northbridge/intel/i945/chip.h +++ b/src/northbridge/intel/i945/chip.h @@ -20,4 +20,3 @@ struct northbridge_intel_i945_config { }; -extern struct chip_operations northbridge_intel_i945_ops; diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index bd89787..05034f1 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -40,4 +40,3 @@ struct northbridge_intel_sandybridge_config { u32 gpu_pch_backlight; /* PCH Backlight PWM value */ }; -extern struct chip_operations northbridge_intel_sandybridge_ops; diff --git a/src/northbridge/intel/sch/chip.h b/src/northbridge/intel/sch/chip.h index 52c2b16..b3aebd3 100644 --- a/src/northbridge/intel/sch/chip.h +++ b/src/northbridge/intel/sch/chip.h @@ -20,4 +20,3 @@ struct northbridge_intel_sch_config { }; -extern struct chip_operations northbridge_intel_sch_ops; diff --git a/src/northbridge/rdc/r8610/chip.h b/src/northbridge/rdc/r8610/chip.h index 01c8356..150f032 100644 --- a/src/northbridge/rdc/r8610/chip.h +++ b/src/northbridge/rdc/r8610/chip.h @@ -21,4 +21,3 @@ struct northbridge_rdc_r8610_config { }; -extern struct chip_operations northbridge_rdc_r8610_ops; diff --git a/src/northbridge/via/cn400/chip.h b/src/northbridge/via/cn400/chip.h index cc3f7c0..e403d35 100644 --- a/src/northbridge/via/cn400/chip.h +++ b/src/northbridge/via/cn400/chip.h @@ -21,4 +21,3 @@ struct northbridge_via_cn400_config { }; -extern struct chip_operations northbridge_via_cn400_ops; diff --git a/src/northbridge/via/cn700/chip.h b/src/northbridge/via/cn700/chip.h index e553496..5b1515d 100644 --- a/src/northbridge/via/cn700/chip.h +++ b/src/northbridge/via/cn700/chip.h @@ -21,4 +21,3 @@ struct northbridge_via_cn700_config { }; -extern struct chip_operations northbridge_via_cn700_ops; diff --git a/src/northbridge/via/cx700/chip.h b/src/northbridge/via/cx700/chip.h index 7b7aca8..0e8491b 100644 --- a/src/northbridge/via/cx700/chip.h +++ b/src/northbridge/via/cx700/chip.h @@ -20,4 +20,3 @@ struct northbridge_via_cx700_config { }; -extern struct chip_operations northbridge_via_cx700_ops; diff --git a/src/northbridge/via/vt8601/chip.h b/src/northbridge/via/vt8601/chip.h index 9f61465..c65e12e 100644 --- a/src/northbridge/via/vt8601/chip.h +++ b/src/northbridge/via/vt8601/chip.h @@ -2,4 +2,3 @@ struct northbridge_via_vt8601_config { }; -extern struct chip_operations northbridge_via_vt8601_ops; diff --git a/src/northbridge/via/vt8623/chip.h b/src/northbridge/via/vt8623/chip.h index 6b0aa96..5fb3f80 100644 --- a/src/northbridge/via/vt8623/chip.h +++ b/src/northbridge/via/vt8623/chip.h @@ -2,4 +2,3 @@ struct northbridge_via_vt8623_config { }; -extern struct chip_operations northbridge_via_vt8623_ops; diff --git a/src/northbridge/via/vx800/chip.h b/src/northbridge/via/vx800/chip.h index 7d7153c..64df31a 100644 --- a/src/northbridge/via/vx800/chip.h +++ b/src/northbridge/via/vx800/chip.h @@ -20,4 +20,3 @@ struct northbridge_via_vx800_config { }; -extern struct chip_operations northbridge_via_vx800_ops; diff --git a/src/southbridge/amd/agesa/hudson/chip.h b/src/southbridge/amd/agesa/hudson/chip.h index 7732f6d..1970608 100644 --- a/src/southbridge/amd/agesa/hudson/chip.h +++ b/src/southbridge/amd/agesa/hudson/chip.h @@ -30,7 +30,5 @@ struct southbridge_amd_agesa_hudson_config u8 gpp_configuration; #endif }; -struct chip_operations; -extern struct chip_operations southbridge_amd_agesa_hudson_ops; #endif /* HUDSON_CHIP_H */ diff --git a/src/southbridge/amd/amd8111/chip.h b/src/southbridge/amd/amd8111/chip.h index 601038c..622bf10 100644 --- a/src/southbridge/amd/amd8111/chip.h +++ b/src/southbridge/amd/amd8111/chip.h @@ -8,7 +8,4 @@ struct southbridge_amd_amd8111_config unsigned int phy_lowreset : 1; }; -struct chip_operations; -extern struct chip_operations southbridge_amd_amd8111_ops; - #endif /* AMD8111_CHIP_H */ diff --git a/src/southbridge/amd/cimx/sb700/chip.h b/src/southbridge/amd/cimx/sb700/chip.h index ef294f4..05edc5c 100644 --- a/src/southbridge/amd/cimx/sb700/chip.h +++ b/src/southbridge/amd/cimx/sb700/chip.h @@ -20,8 +20,6 @@ #ifndef _CIMX_SB700_CHIP_H_ #define _CIMX_SB700_CHIP_H_ -extern struct chip_operations southbridge_amd_cimx_sb700_ops; - /* * configuration set in mainboard/devicetree.cb * boot_switch_sata_ide: diff --git a/src/southbridge/amd/cimx/sb800/chip.h b/src/southbridge/amd/cimx/sb800/chip.h index 3581f2e..7fc7b88 100644 --- a/src/southbridge/amd/cimx/sb800/chip.h +++ b/src/southbridge/amd/cimx/sb800/chip.h @@ -20,8 +20,6 @@ #ifndef _CIMX_SB800_CHIP_H_ #define _CIMX_SB800_CHIP_H_ -extern struct chip_operations southbridge_amd_cimx_sb800_ops; - /* * configuration set in mainboard/devicetree.cb * boot_switch_sata_ide: diff --git a/src/southbridge/amd/cimx/sb900/chip.h b/src/southbridge/amd/cimx/sb900/chip.h index 96afc42..9004969 100644 --- a/src/southbridge/amd/cimx/sb900/chip.h +++ b/src/southbridge/amd/cimx/sb900/chip.h @@ -20,8 +20,6 @@ #ifndef _CIMX_SB900_CHIP_H_ #define _CIMX_SB900_CHIP_H_ -extern struct chip_operations southbridge_amd_cimx_sb900_ops; - /* * configuration set in mainboard/devicetree.cb * boot_switch_sata_ide: diff --git a/src/southbridge/amd/cs5530/chip.h b/src/southbridge/amd/cs5530/chip.h index 92d64e4..271facb 100644 --- a/src/southbridge/amd/cs5530/chip.h +++ b/src/southbridge/amd/cs5530/chip.h @@ -21,8 +21,6 @@ #ifndef SOUTHBRIDGE_AMD_CS5530_CHIP_H #define SOUTHBRIDGE_AMD_CS5530_CHIP_H -extern struct chip_operations southbridge_amd_cs5530_ops; - struct southbridge_amd_cs5530_config { int ide0_enable:1; int ide1_enable:1; diff --git a/src/southbridge/amd/cs5535/chip.h b/src/southbridge/amd/cs5535/chip.h index 3894a06..d4dde3d 100644 --- a/src/southbridge/amd/cs5535/chip.h +++ b/src/southbridge/amd/cs5535/chip.h @@ -1,8 +1,6 @@ #ifndef _SOUTHBRIDGE_AMD_CS5535 #define _SOUTHBRIDGE_AMD_CS5535 -extern struct chip_operations southbridge_amd_cs5535_ops; - struct southbridge_amd_cs5535_config { int setupflash; }; diff --git a/src/southbridge/amd/cs5536/chip.h b/src/southbridge/amd/cs5536/chip.h index ad9e736..69deadc 100644 --- a/src/southbridge/amd/cs5536/chip.h +++ b/src/southbridge/amd/cs5536/chip.h @@ -23,8 +23,6 @@ #define MAX_UNWANTED_VPCI 8 /* increase if needed */ -extern struct chip_operations southbridge_amd_cs5536_ops; - struct southbridge_amd_cs5536_config { unsigned int lpc_serirq_enable; /* interrupt enables for LPC bus; each bit is an irq 0-15 */ unsigned int lpc_serirq_polarity; /* LPC IRQ polarity; each bit is an irq 0-15 */ diff --git a/src/southbridge/amd/rs690/chip.h b/src/southbridge/amd/rs690/chip.h index 5e08cc5..8ff4be5 100644 --- a/src/southbridge/amd/rs690/chip.h +++ b/src/southbridge/amd/rs690/chip.h @@ -33,7 +33,5 @@ struct southbridge_amd_rs690_config u8 gfx_reconfiguration; /* Dynamic Lind Width Control */ u8 gfx_link_width; /* Desired width of lane 2 */ }; -struct chip_operations; -extern struct chip_operations southbridge_amd_rs690_ops; #endif /* RS690_CHIP_H */ diff --git a/src/southbridge/amd/rs780/chip.h b/src/southbridge/amd/rs780/chip.h index 4a10ae0..7afcbf2 100644 --- a/src/southbridge/amd/rs780/chip.h +++ b/src/southbridge/amd/rs780/chip.h @@ -36,7 +36,5 @@ struct southbridge_amd_rs780_config u8 gfx_pcie_config; /* GFX PCIE Modes */ u8 gfx_ddi_config; /* GFX DDI Modes */ }; -struct chip_operations; -extern struct chip_operations southbridge_amd_rs780_ops; #endif /* RS780_CHIP_H */ diff --git a/src/southbridge/amd/sb600/chip.h b/src/southbridge/amd/sb600/chip.h index ce40f18..e288cbf 100644 --- a/src/southbridge/amd/sb600/chip.h +++ b/src/southbridge/amd/sb600/chip.h @@ -24,7 +24,5 @@ struct southbridge_amd_sb600_config { u32 hda_viddid; }; -struct chip_operations; -extern struct chip_operations southbridge_amd_sb600_ops; #endif /* SB600_CHIP_H */ diff --git a/src/southbridge/amd/sb700/chip.h b/src/southbridge/amd/sb700/chip.h index acdb2b7..390c579 100644 --- a/src/southbridge/amd/sb700/chip.h +++ b/src/southbridge/amd/sb700/chip.h @@ -24,7 +24,5 @@ struct southbridge_amd_sb700_config { u32 boot_switch_sata_ide : 1; }; -struct chip_operations; -extern struct chip_operations southbridge_amd_sb700_ops; #endif /* SB700_CHIP_H */ diff --git a/src/southbridge/amd/sb800/chip.h b/src/southbridge/amd/sb800/chip.h index 41f26d1..13e1aac 100644 --- a/src/southbridge/amd/sb800/chip.h +++ b/src/southbridge/amd/sb800/chip.h @@ -28,7 +28,5 @@ struct southbridge_amd_sb800_config u32 hda_viddid; u8 gpp_configuration; }; -struct chip_operations; -extern struct chip_operations southbridge_amd_sb800_ops; #endif /* SB800_CHIP_H */ diff --git a/src/southbridge/amd/sr5650/chip.h b/src/southbridge/amd/sr5650/chip.h index 43f8dd3..236ac16 100644 --- a/src/southbridge/amd/sr5650/chip.h +++ b/src/southbridge/amd/sr5650/chip.h @@ -28,7 +28,5 @@ struct southbridge_amd_sr5650_config u8 gpp3a_configuration; /* The configuration of General Purpose Port. */ u16 port_enable; /* Which port is enabled? GPP(2,3,4,5,6,7,9,10,11,12,13) */ }; -struct chip_operations; -extern struct chip_operations southbridge_amd_sr5650_ops; #endif /* SR5650_CHIP_H */ diff --git a/src/southbridge/broadcom/bcm5785/chip.h b/src/southbridge/broadcom/bcm5785/chip.h index eb337e9..d323bee 100644 --- a/src/southbridge/broadcom/bcm5785/chip.h +++ b/src/southbridge/broadcom/bcm5785/chip.h @@ -28,7 +28,5 @@ struct southbridge_broadcom_bcm5785_config unsigned int sata0_enable : 1; unsigned int sata1_enable : 1; }; -struct chip_operations; -extern struct chip_operations southbridge_broadcom_bcm5785_ops; #endif /* BCM5785_CHIP_H */ diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 07a2af7..05eeab2 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -79,6 +79,4 @@ struct southbridge_intel_bd82x6x_config { uint8_t pcie_port_coalesce; }; -extern struct chip_operations southbridge_intel_bd82x6x_ops; - #endif /* SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H */ diff --git a/src/southbridge/intel/esb6300/chip.h b/src/southbridge/intel/esb6300/chip.h index 4082769..c6dc3a3 100644 --- a/src/southbridge/intel/esb6300/chip.h +++ b/src/southbridge/intel/esb6300/chip.h @@ -26,5 +26,4 @@ struct southbridge_intel_esb6300_config unsigned int pirq_a_d; unsigned int pirq_e_h; }; -extern struct chip_operations southbridge_intel_esb6300_ops; diff --git a/src/southbridge/intel/i3100/chip.h b/src/southbridge/intel/i3100/chip.h index 7e58674..21d3a46 100644 --- a/src/southbridge/intel/i3100/chip.h +++ b/src/southbridge/intel/i3100/chip.h @@ -47,4 +47,3 @@ struct southbridge_intel_i3100_config u32 pirq_a_d; u32 pirq_e_h; }; -extern struct chip_operations southbridge_intel_i3100_ops; diff --git a/src/southbridge/intel/i82371eb/chip.h b/src/southbridge/intel/i82371eb/chip.h index 1cb2929..8084693 100644 --- a/src/southbridge/intel/i82371eb/chip.h +++ b/src/southbridge/intel/i82371eb/chip.h @@ -23,8 +23,6 @@ #include <device/device.h> -extern const struct chip_operations southbridge_intel_i82371eb_ops; - struct southbridge_intel_i82371eb_config { int ide0_enable:1; int ide0_drive0_udma33_enable:1; diff --git a/src/southbridge/intel/i82801ax/chip.h b/src/southbridge/intel/i82801ax/chip.h index 21b6f9f..989f35b 100644 --- a/src/southbridge/intel/i82801ax/chip.h +++ b/src/southbridge/intel/i82801ax/chip.h @@ -37,6 +37,4 @@ struct southbridge_intel_i82801ax_config { u8 ide1_enable; }; -extern struct chip_operations southbridge_intel_i82801ax_ops; - #endif diff --git a/src/southbridge/intel/i82801bx/chip.h b/src/southbridge/intel/i82801bx/chip.h index 5cdfc5d..987eb8f 100644 --- a/src/southbridge/intel/i82801bx/chip.h +++ b/src/southbridge/intel/i82801bx/chip.h @@ -41,6 +41,4 @@ struct southbridge_intel_i82801bx_config { u8 ide1_enable; }; -extern struct chip_operations southbridge_intel_i82801bx_ops; - #endif diff --git a/src/southbridge/intel/i82801cx/chip.h b/src/southbridge/intel/i82801cx/chip.h index 88415e0..5618521 100644 --- a/src/southbridge/intel/i82801cx/chip.h +++ b/src/southbridge/intel/i82801cx/chip.h @@ -4,6 +4,5 @@ struct southbridge_intel_i82801cx_config { }; -extern struct chip_operations southbridge_intel_i82801cx_ops; #endif /* I82801CX_CHIP_H */ diff --git a/src/southbridge/intel/i82801dx/chip.h b/src/southbridge/intel/i82801dx/chip.h index 1209ec8..42701f7 100644 --- a/src/southbridge/intel/i82801dx/chip.h +++ b/src/southbridge/intel/i82801dx/chip.h @@ -41,6 +41,4 @@ struct southbridge_intel_i82801dx_config { uint8_t ide1_enable; }; -extern struct chip_operations southbridge_intel_i82801dx_ops; - #endif /* I82801DBM_CHIP_H */ diff --git a/src/southbridge/intel/i82801ex/chip.h b/src/southbridge/intel/i82801ex/chip.h index f04fc3f..891fa16 100644 --- a/src/southbridge/intel/i82801ex/chip.h +++ b/src/southbridge/intel/i82801ex/chip.h @@ -30,7 +30,6 @@ struct southbridge_intel_i82801ex_config unsigned int pirq_a_d; unsigned int pirq_e_h; }; -extern struct chip_operations southbridge_intel_i82801ex_ops; #endif /* I82801EX_CHIP_H */ diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h index cc17539..5e4408a 100644 --- a/src/southbridge/intel/i82801gx/chip.h +++ b/src/southbridge/intel/i82801gx/chip.h @@ -73,6 +73,4 @@ struct southbridge_intel_i82801gx_config { int c4onc3_enable:1; }; -extern struct chip_operations southbridge_intel_i82801gx_ops; - #endif /* SOUTHBRIDGE_INTEL_I82801GX_CHIP_H */ diff --git a/src/southbridge/intel/pxhd/chip.h b/src/southbridge/intel/pxhd/chip.h index 5aedb77..27d88a8 100644 --- a/src/southbridge/intel/pxhd/chip.h +++ b/src/southbridge/intel/pxhd/chip.h @@ -3,4 +3,3 @@ struct southbridge_intel_pxhd_config /* nothing */ }; -extern struct chip_operations southbridge_intel_pxhd_ops; diff --git a/src/southbridge/intel/sch/chip.h b/src/southbridge/intel/sch/chip.h index 116d382..1ae5c32 100644 --- a/src/southbridge/intel/sch/chip.h +++ b/src/southbridge/intel/sch/chip.h @@ -35,6 +35,4 @@ struct southbridge_intel_sch_config { uint8_t pirqh_routing; }; -extern struct chip_operations southbridge_intel_sch_ops; - #endif diff --git a/src/southbridge/nvidia/ck804/chip.h b/src/southbridge/nvidia/ck804/chip.h index 1730205..64d4225 100644 --- a/src/southbridge/nvidia/ck804/chip.h +++ b/src/southbridge/nvidia/ck804/chip.h @@ -30,7 +30,5 @@ struct southbridge_nvidia_ck804_config { unsigned int mac_eeprom_smbus; unsigned int mac_eeprom_addr; }; -struct chip_operations; -extern struct chip_operations southbridge_nvidia_ck804_ops; #endif diff --git a/src/southbridge/nvidia/mcp55/chip.h b/src/southbridge/nvidia/mcp55/chip.h index 00fd082..bfcd1e9 100644 --- a/src/southbridge/nvidia/mcp55/chip.h +++ b/src/southbridge/nvidia/mcp55/chip.h @@ -33,7 +33,5 @@ struct southbridge_nvidia_mcp55_config unsigned int mac_eeprom_smbus; unsigned int mac_eeprom_addr; }; -struct chip_operations; -extern struct chip_operations southbridge_nvidia_mcp55_ops; #endif diff --git a/src/southbridge/ricoh/rl5c476/chip.h b/src/southbridge/ricoh/rl5c476/chip.h index 922eece..98d8a69 100644 --- a/src/southbridge/ricoh/rl5c476/chip.h +++ b/src/southbridge/ricoh/rl5c476/chip.h @@ -1,8 +1,6 @@ #ifndef _SOUTHBRIDGE_RICOH_RL5C476 #define _SOUTHBRIDGE_RICOH_RL5C476 -extern struct chip_operations southbridge_ricoh_rl5c476_ops; - struct southbridge_ricoh_rl5c476_config { int enable_cf; }; diff --git a/src/southbridge/sis/sis966/chip.h b/src/southbridge/sis/sis966/chip.h index c169bb5..3669f3b 100644 --- a/src/southbridge/sis/sis966/chip.h +++ b/src/southbridge/sis/sis966/chip.h @@ -31,7 +31,5 @@ struct southbridge_sis_sis966_config unsigned int mac_eeprom_smbus; unsigned int mac_eeprom_addr; }; -struct chip_operations; -extern struct chip_operations southbridge_sis_sis966_ops; #endif /* SIS966_CHIP_H */ diff --git a/src/southbridge/ti/pci1x2x/chip.h b/src/southbridge/ti/pci1x2x/chip.h index 4c36761..2dbb1aa 100644 --- a/src/southbridge/ti/pci1x2x/chip.h +++ b/src/southbridge/ti/pci1x2x/chip.h @@ -1,8 +1,6 @@ #ifndef SOUTHBRIDGE_TI_PCI1X2X_H #define SOUTHBRIDGE_TI_PCI1X2X_H -extern struct chip_operations southbridge_ti_pci1x2x_ops; - struct southbridge_ti_pci1x2x_config { int scr; int mrr; diff --git a/src/southbridge/ti/pci7420/chip.h b/src/southbridge/ti/pci7420/chip.h index d7ec2da..cc218a1 100644 --- a/src/southbridge/ti/pci7420/chip.h +++ b/src/southbridge/ti/pci7420/chip.h @@ -21,8 +21,6 @@ #ifndef _SOUTHBRIDGE_TI_PCI7420 #define _SOUTHBRIDGE_TI_PCI7420 -extern struct chip_operations southbridge_ti_pci7420_ops; - struct southbridge_ti_pci7420_config { int smartcard_enabled; }; diff --git a/src/southbridge/ti/pcixx12/chip.h b/src/southbridge/ti/pcixx12/chip.h index 42dc79c..03151a8 100644 --- a/src/southbridge/ti/pcixx12/chip.h +++ b/src/southbridge/ti/pcixx12/chip.h @@ -20,8 +20,6 @@ #ifndef _SOUTHBRIDGE_TI_PCIXX12 #define _SOUTHBRIDGE_TI_PCIXX12 -extern struct chip_operations southbridge_ti_pcixx12_ops; - struct southbridge_ti_pcixx12_config { int dummy; diff --git a/src/southbridge/via/vt8231/chip.h b/src/southbridge/via/vt8231/chip.h index 277ead7..e858ff5 100644 --- a/src/southbridge/via/vt8231/chip.h +++ b/src/southbridge/via/vt8231/chip.h @@ -1,8 +1,6 @@ #ifndef _SOUTHBRIDGE_VIA_VT8231 #define _SOUTHBRIDGE_VIA_VT8231 -extern struct chip_operations southbridge_via_vt8231_ops; - struct southbridge_via_vt8231_config { /* enables of Non-PCI devices */ int enable_native_ide; diff --git a/src/southbridge/via/vt8235/chip.h b/src/southbridge/via/vt8235/chip.h index 50f4a85..eb1e82b 100644 --- a/src/southbridge/via/vt8235/chip.h +++ b/src/southbridge/via/vt8235/chip.h @@ -1,8 +1,6 @@ #ifndef _SOUTHBRIDGE_VIA_VT8235 #define _SOUTHBRIDGE_VIA_VT8235 -extern struct chip_operations southbridge_via_vt8235_ops; - struct southbridge_via_vt8235_config { /* PCI function enables */ /* i.e. so that pci scan bus will find them. */ diff --git a/src/southbridge/via/vt8237r/chip.h b/src/southbridge/via/vt8237r/chip.h index 5108547..cbc7952 100644 --- a/src/southbridge/via/vt8237r/chip.h +++ b/src/southbridge/via/vt8237r/chip.h @@ -22,8 +22,6 @@ #include <stdint.h> -extern struct chip_operations southbridge_via_vt8237r_ops; - struct southbridge_via_vt8237r_config { /** * Function disable. 1 = disabled. diff --git a/src/southbridge/via/vt82c686/chip.h b/src/southbridge/via/vt82c686/chip.h index 8effc73..44b3e2d 100644 --- a/src/southbridge/via/vt82c686/chip.h +++ b/src/southbridge/via/vt82c686/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_via_vt82c686_ops; - struct superio_via_vt82c686_config { struct pc_keyboard keyboard; }; diff --git a/src/superio/fintek/f71805f/chip.h b/src/superio/fintek/f71805f/chip.h index 60eb684..603dbee 100644 --- a/src/superio/fintek/f71805f/chip.h +++ b/src/superio/fintek/f71805f/chip.h @@ -26,8 +26,6 @@ /* This chip doesn't have keyboard and mouse support. */ -extern struct chip_operations superio_fintek_f71805f_ops; - struct superio_fintek_f71805f_config { }; diff --git a/src/superio/fintek/f71859/chip.h b/src/superio/fintek/f71859/chip.h index 157ed26..bd45ac0 100644 --- a/src/superio/fintek/f71859/chip.h +++ b/src/superio/fintek/f71859/chip.h @@ -24,8 +24,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_fintek_f71859_ops; - struct superio_fintek_f71859_config { }; diff --git a/src/superio/fintek/f71863fg/chip.h b/src/superio/fintek/f71863fg/chip.h index ade7498..522603b 100644 --- a/src/superio/fintek/f71863fg/chip.h +++ b/src/superio/fintek/f71863fg/chip.h @@ -25,8 +25,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_fintek_f71863fg_ops; - struct superio_fintek_f71863fg_config { struct pc_keyboard keyboard; diff --git a/src/superio/fintek/f71872/chip.h b/src/superio/fintek/f71872/chip.h index bd41dd6..d897fae 100644 --- a/src/superio/fintek/f71872/chip.h +++ b/src/superio/fintek/f71872/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_fintek_f71872_ops; - struct superio_fintek_f71872_config { struct pc_keyboard keyboard; diff --git a/src/superio/fintek/f71889/chip.h b/src/superio/fintek/f71889/chip.h index 65ae870..49e8cdd 100644 --- a/src/superio/fintek/f71889/chip.h +++ b/src/superio/fintek/f71889/chip.h @@ -25,8 +25,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_fintek_f71889_ops; - struct superio_fintek_f71889_config { struct pc_keyboard keyboard; diff --git a/src/superio/fintek/f81865f/chip.h b/src/superio/fintek/f81865f/chip.h index 711e2d0..29fb3a6 100644 --- a/src/superio/fintek/f81865f/chip.h +++ b/src/superio/fintek/f81865f/chip.h @@ -26,8 +26,6 @@ /* This chip doesn't have keyboard and mouse support. */ -extern struct chip_operations superio_fintek_f81865f_ops; - struct superio_fintek_f81865f_config { struct pc_keyboard keyboard; diff --git a/src/superio/intel/i3100/chip.h b/src/superio/intel/i3100/chip.h index 4ed3225..05e2f45 100644 --- a/src/superio/intel/i3100/chip.h +++ b/src/superio/intel/i3100/chip.h @@ -24,8 +24,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_intel_i3100_ops; - struct superio_intel_i3100_config { }; diff --git a/src/superio/ite/it8661f/chip.h b/src/superio/ite/it8661f/chip.h index 64b2cf8..1d9d1f9 100644 --- a/src/superio/ite/it8661f/chip.h +++ b/src/superio/ite/it8661f/chip.h @@ -26,8 +26,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8661f_ops; - struct superio_ite_it8661f_config { }; diff --git a/src/superio/ite/it8671f/chip.h b/src/superio/ite/it8671f/chip.h index 7fa7e26..7659c87 100644 --- a/src/superio/ite/it8671f/chip.h +++ b/src/superio/ite/it8671f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8671f_ops; - struct superio_ite_it8671f_config { struct pc_keyboard keyboard; diff --git a/src/superio/ite/it8673f/chip.h b/src/superio/ite/it8673f/chip.h index 126180a..ace1725 100644 --- a/src/superio/ite/it8673f/chip.h +++ b/src/superio/ite/it8673f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8673f_ops; - struct superio_ite_it8673f_config { struct pc_keyboard keyboard; diff --git a/src/superio/ite/it8705f/chip.h b/src/superio/ite/it8705f/chip.h index df620a8..ac2ba77 100644 --- a/src/superio/ite/it8705f/chip.h +++ b/src/superio/ite/it8705f/chip.h @@ -26,8 +26,6 @@ #include <device/device.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8705f_ops; - struct superio_ite_it8705f_config { }; diff --git a/src/superio/ite/it8712f/chip.h b/src/superio/ite/it8712f/chip.h index 1863006..bb200e5 100644 --- a/src/superio/ite/it8712f/chip.h +++ b/src/superio/ite/it8712f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8712f_ops; - struct superio_ite_it8712f_config { struct pc_keyboard keyboard; diff --git a/src/superio/ite/it8716f/chip.h b/src/superio/ite/it8716f/chip.h index 16b69ce..8aaed35 100644 --- a/src/superio/ite/it8716f/chip.h +++ b/src/superio/ite/it8716f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8716f_ops; - struct superio_ite_it8716f_config { struct pc_keyboard keyboard; diff --git a/src/superio/ite/it8718f/chip.h b/src/superio/ite/it8718f/chip.h index 43f7152..e70967a 100644 --- a/src/superio/ite/it8718f/chip.h +++ b/src/superio/ite/it8718f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8718f_ops; - struct superio_ite_it8718f_config { struct pc_keyboard keyboard; diff --git a/src/superio/ite/it8721f/chip.h b/src/superio/ite/it8721f/chip.h index 3717d19..eb91566 100644 --- a/src/superio/ite/it8721f/chip.h +++ b/src/superio/ite/it8721f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8721f_ops; - struct superio_ite_it8721f_config { struct pc_keyboard keyboard; }; diff --git a/src/superio/ite/it8772f/chip.h b/src/superio/ite/it8772f/chip.h index e91f6fa..1bfe861 100644 --- a/src/superio/ite/it8772f/chip.h +++ b/src/superio/ite/it8772f/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_ite_it8772f_ops; - struct superio_ite_it8772f_config { struct pc_keyboard keyboard; diff --git a/src/superio/nsc/pc8374/chip.h b/src/superio/nsc/pc8374/chip.h index 4ae78f8..2487b0c 100644 --- a/src/superio/nsc/pc8374/chip.h +++ b/src/superio/nsc/pc8374/chip.h @@ -22,9 +22,6 @@ #ifndef SUPERIO_NSC_PC8374_CHIP_H #define SUPERIO_NSC_PC8374_CHIP_H -struct chip_operations; -extern struct chip_operations superio_nsc_pc8374_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc87309/chip.h b/src/superio/nsc/pc87309/chip.h index b9f5a7a..4a9954a 100644 --- a/src/superio/nsc/pc87309/chip.h +++ b/src/superio/nsc/pc87309/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_nsc_pc87309_ops; - struct superio_nsc_pc87309_config { struct pc_keyboard keyboard; diff --git a/src/superio/nsc/pc87351/chip.h b/src/superio/nsc/pc87351/chip.h index 46b56af..41e7e70 100644 --- a/src/superio/nsc/pc87351/chip.h +++ b/src/superio/nsc/pc87351/chip.h @@ -22,9 +22,6 @@ #ifndef SUPERIO_NSC_PC87351_CHIP_H #define SUPERIO_NSC_PC87351_CHIP_H -struct chip_operations; -extern struct chip_operations superio_nsc_pc87351_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc87360/chip.h b/src/superio/nsc/pc87360/chip.h index 0cc6a89..e562733 100644 --- a/src/superio/nsc/pc87360/chip.h +++ b/src/superio/nsc/pc87360/chip.h @@ -22,9 +22,6 @@ #ifndef SUPERIO_NSC_PC87360_CHIP_H #define SUPERIO_NSC_PC87360_CHIP_H -struct chip_operations; -extern struct chip_operations superio_nsc_pc87360_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc87366/chip.h b/src/superio/nsc/pc87366/chip.h index 6f656d4..1377bb8 100644 --- a/src/superio/nsc/pc87366/chip.h +++ b/src/superio/nsc/pc87366/chip.h @@ -22,8 +22,6 @@ #ifndef SUPERIO_NSC_PC87366_CHIP_H #define SUPERIO_NSC_PC87366_CHIP_H -extern struct chip_operations superio_nsc_pc87366_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc87382/chip.h b/src/superio/nsc/pc87382/chip.h index 8cc049f..a9f0200 100644 --- a/src/superio/nsc/pc87382/chip.h +++ b/src/superio/nsc/pc87382/chip.h @@ -22,7 +22,6 @@ #define SUPERIO_NSC_PC87382_CHIP_H #include <uart8250.h> -extern struct chip_operations superio_nsc_pc87382_ops; struct superio_nsc_pc87382_config { diff --git a/src/superio/nsc/pc87384/chip.h b/src/superio/nsc/pc87384/chip.h index ef202fc..1c49725 100644 --- a/src/superio/nsc/pc87384/chip.h +++ b/src/superio/nsc/pc87384/chip.h @@ -22,7 +22,6 @@ #define SUPERIO_NSC_PC87384_CHIP_H #include <uart8250.h> -extern struct chip_operations superio_nsc_pc87384_ops; struct superio_nsc_pc87384_config { diff --git a/src/superio/nsc/pc87392/chip.h b/src/superio/nsc/pc87392/chip.h index 8b5fc52..a6ebf1b 100644 --- a/src/superio/nsc/pc87392/chip.h +++ b/src/superio/nsc/pc87392/chip.h @@ -21,8 +21,6 @@ #ifndef SUPERIO_NSC_PC87392_CHIP_H #define SUPERIO_NSC_PC87392_CHIP_H -extern struct chip_operations superio_nsc_pc87392_ops; - #include <uart8250.h> struct superio_nsc_pc87392_config { diff --git a/src/superio/nsc/pc87417/chip.h b/src/superio/nsc/pc87417/chip.h index ec3c381..1d85fd9 100644 --- a/src/superio/nsc/pc87417/chip.h +++ b/src/superio/nsc/pc87417/chip.h @@ -23,8 +23,6 @@ #ifndef SUPERIO_NSC_PC87417_CHIP_H #define SUPERIO_NSC_PC87417_CHIP_H -extern struct chip_operations superio_nsc_pc87417_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc87427/chip.h b/src/superio/nsc/pc87427/chip.h index 610dbdf..46c358f 100644 --- a/src/superio/nsc/pc87427/chip.h +++ b/src/superio/nsc/pc87427/chip.h @@ -22,8 +22,6 @@ #ifndef SUPERIO_NSC_PC87427_CHIP_H #define SUPERIO_NSC_PC87427_CHIP_H -extern struct chip_operations superio_nsc_pc87427_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc97307/chip.h b/src/superio/nsc/pc97307/chip.h index cc43323..4d1df1f 100644 --- a/src/superio/nsc/pc97307/chip.h +++ b/src/superio/nsc/pc97307/chip.h @@ -28,8 +28,6 @@ #define PNP_DATA_REG 0x15D #endif -extern struct chip_operations superio_nsc_pc97307_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nsc/pc97317/chip.h b/src/superio/nsc/pc97317/chip.h index 4eb0c19..23f8d2e 100644 --- a/src/superio/nsc/pc97317/chip.h +++ b/src/superio/nsc/pc97317/chip.h @@ -28,8 +28,6 @@ #define PNP_DATA_REG 0x15D #endif -extern struct chip_operations superio_nsc_pc97317_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/nuvoton/wpcm450/chip.h b/src/superio/nuvoton/wpcm450/chip.h index c921120..75dd194 100644 --- a/src/superio/nuvoton/wpcm450/chip.h +++ b/src/superio/nuvoton/wpcm450/chip.h @@ -21,9 +21,6 @@ #ifndef SUPERIO_NUVOTON_WPCM450_CHIP_H #define SUPERIO_NUVOTON_WPCM450_CHIP_H -struct chip_operations; -extern struct chip_operations superio_nuvoton_wpcm450_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/renesas/m3885x/chip.h b/src/superio/renesas/m3885x/chip.h index da2336d..2b0b76a 100644 --- a/src/superio/renesas/m3885x/chip.h +++ b/src/superio/renesas/m3885x/chip.h @@ -23,8 +23,6 @@ #include <device/device.h> #include <pc80/keyboard.h> -extern struct chip_operations superio_renesas_m3885x_ops; - struct superio_renesas_m3885x_config { struct pc_keyboard keyboard; }; diff --git a/src/superio/smsc/fdc37m60x/chip.h b/src/superio/smsc/fdc37m60x/chip.h index 450ef75..8ca701f 100644 --- a/src/superio/smsc/fdc37m60x/chip.h +++ b/src/superio/smsc/fdc37m60x/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_smsc_fdc37m60x_ops; - struct superio_smsc_fdc37m60x_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/fdc37n972/chip.h b/src/superio/smsc/fdc37n972/chip.h index 858cf53..caf5b14 100644 --- a/src/superio/smsc/fdc37n972/chip.h +++ b/src/superio/smsc/fdc37n972/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_smsc_fdc37n972_ops; - struct superio_smsc_fdc37n972_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/kbc1100/chip.h b/src/superio/smsc/kbc1100/chip.h index 40aff0b..6c5425a 100644 --- a/src/superio/smsc/kbc1100/chip.h +++ b/src/superio/smsc/kbc1100/chip.h @@ -23,9 +23,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -struct chip_operations; -extern struct chip_operations superio_smsc_kbc1100_ops; - struct superio_smsc_kbc1100_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/lpc47b272/chip.h b/src/superio/smsc/lpc47b272/chip.h index 754d63d..eab8c9b 100644 --- a/src/superio/smsc/lpc47b272/chip.h +++ b/src/superio/smsc/lpc47b272/chip.h @@ -21,9 +21,6 @@ #ifndef SUPERIO_SMSC_LPC47B272_CHIP_H #define SUPERIO_SMSC_LPC47B272_CHIP_H -struct chip_operations; -extern struct chip_operations superio_smsc_lpc47b272_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/smsc/lpc47b397/chip.h b/src/superio/smsc/lpc47b397/chip.h index 48fc6e4..e0d131f 100644 --- a/src/superio/smsc/lpc47b397/chip.h +++ b/src/superio/smsc/lpc47b397/chip.h @@ -23,9 +23,6 @@ #ifndef SUPERIO_SMSC_LPC47B397_CHIP_H #define SUPERIO_SMSC_LPC47B397_CHIP_H -struct chip_operations; -extern struct chip_operations superio_smsc_lpc47b397_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/smsc/lpc47m10x/chip.h b/src/superio/smsc/lpc47m10x/chip.h index 6d6ee97..c8c293c 100644 --- a/src/superio/smsc/lpc47m10x/chip.h +++ b/src/superio/smsc/lpc47m10x/chip.h @@ -25,9 +25,6 @@ #ifndef SUPERIO_SMSC_LPC47M10X_CHIP_H #define SUPERIO_SMSC_LPC47M10X_CHIP_H -struct chip_operations; -extern struct chip_operations superio_smsc_lpc47m10x_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/smsc/lpc47m15x/chip.h b/src/superio/smsc/lpc47m15x/chip.h index 57aba06..2b5489a 100644 --- a/src/superio/smsc/lpc47m15x/chip.h +++ b/src/superio/smsc/lpc47m15x/chip.h @@ -20,9 +20,6 @@ #ifndef SUPERIO_SMSC_LPC47M15X_CHIP_H #define SUPERIO_SMSC_LPC47M15X_CHIP_H -struct chip_operations; -extern struct chip_operations superio_smsc_lpc47m15x_ops; - #include <pc80/keyboard.h> #include <uart8250.h> diff --git a/src/superio/smsc/lpc47n217/chip.h b/src/superio/smsc/lpc47n217/chip.h index 89a778c..b0fbe8c 100644 --- a/src/superio/smsc/lpc47n217/chip.h +++ b/src/superio/smsc/lpc47n217/chip.h @@ -21,9 +21,6 @@ #ifndef SUPERIO_SMSC_LPC47N217_CHIP_H #define SUPERIO_SMSC_LPC47N217_CHIP_H -struct chip_operations; -extern struct chip_operations superio_smsc_lpc47n217_ops; - #include <uart8250.h> struct superio_smsc_lpc47n217_config { diff --git a/src/superio/smsc/lpc47n227/chip.h b/src/superio/smsc/lpc47n227/chip.h index 8b3a2c9..36ae6e3 100644 --- a/src/superio/smsc/lpc47n227/chip.h +++ b/src/superio/smsc/lpc47n227/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_smsc_lpc47n227_ops; - struct superio_smsc_lpc47n227_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/mec1308/chip.h b/src/superio/smsc/mec1308/chip.h index 3826888..0ebb1b6 100644 --- a/src/superio/smsc/mec1308/chip.h +++ b/src/superio/smsc/mec1308/chip.h @@ -23,9 +23,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -struct chip_operations; -extern struct chip_operations superio_smsc_mec1308_ops; - struct superio_smsc_mec1308_config { struct pc_keyboard keyboard; }; diff --git a/src/superio/smsc/sch4037/chip.h b/src/superio/smsc/sch4037/chip.h index 3223750..d79ccc1 100644 --- a/src/superio/smsc/sch4037/chip.h +++ b/src/superio/smsc/sch4037/chip.h @@ -23,9 +23,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -struct chip_operations; -extern struct chip_operations superio_smsc_sch4037_ops; - struct superio_smsc_sch4037_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/sio1036/chip.h b/src/superio/smsc/sio1036/chip.h index abed430..a37f84f 100644 --- a/src/superio/smsc/sio1036/chip.h +++ b/src/superio/smsc/sio1036/chip.h @@ -23,9 +23,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -struct chip_operations; -extern struct chip_operations superio_smsc_kbc1100_ops; - struct superio_smsc_sio1036_config { struct uart8250 com1; }; diff --git a/src/superio/smsc/sio10n268/chip.h b/src/superio/smsc/sio10n268/chip.h index cd6e87b..22d8a3a 100644 --- a/src/superio/smsc/sio10n268/chip.h +++ b/src/superio/smsc/sio10n268/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_smsc_sio10n268_ops; - struct superio_smsc_sio10n268_config { struct pc_keyboard keyboard; diff --git a/src/superio/smsc/smscsuperio/chip.h b/src/superio/smsc/smscsuperio/chip.h index 86f93be..0f3a14d 100644 --- a/src/superio/smsc/smscsuperio/chip.h +++ b/src/superio/smsc/smscsuperio/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_smsc_smscsuperio_ops; - struct superio_smsc_smscsuperio_config { struct pc_keyboard keyboard; diff --git a/src/superio/via/vt1211/chip.h b/src/superio/via/vt1211/chip.h index 3fcd6ae..89d64cd 100644 --- a/src/superio/via/vt1211/chip.h +++ b/src/superio/via/vt1211/chip.h @@ -23,8 +23,6 @@ #include <uart8250.h> -extern struct chip_operations superio_via_vt1211_ops; - struct superio_via_vt1211_config { }; diff --git a/src/superio/winbond/w83627dhg/chip.h b/src/superio/winbond/w83627dhg/chip.h index b516aac..5fdbd16 100644 --- a/src/superio/winbond/w83627dhg/chip.h +++ b/src/superio/winbond/w83627dhg/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83627dhg_ops; - struct superio_winbond_w83627dhg_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83627ehg/chip.h b/src/superio/winbond/w83627ehg/chip.h index a16135d..5113746 100644 --- a/src/superio/winbond/w83627ehg/chip.h +++ b/src/superio/winbond/w83627ehg/chip.h @@ -25,8 +25,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83627ehg_ops; - struct superio_winbond_w83627ehg_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83627hf/chip.h b/src/superio/winbond/w83627hf/chip.h index 64d9920..b7f2177 100644 --- a/src/superio/winbond/w83627hf/chip.h +++ b/src/superio/winbond/w83627hf/chip.h @@ -26,8 +26,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83627hf_ops; - struct superio_winbond_w83627hf_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83627thg/chip.h b/src/superio/winbond/w83627thg/chip.h index ce06485..8268e5b 100644 --- a/src/superio/winbond/w83627thg/chip.h +++ b/src/superio/winbond/w83627thg/chip.h @@ -26,8 +26,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83627thg_ops; - struct superio_winbond_w83627thg_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83627uhg/chip.h b/src/superio/winbond/w83627uhg/chip.h index 2802382..d23eac2 100644 --- a/src/superio/winbond/w83627uhg/chip.h +++ b/src/superio/winbond/w83627uhg/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83627uhg_ops; - struct superio_winbond_w83627uhg_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83697hf/chip.h b/src/superio/winbond/w83697hf/chip.h index 2359b66..4d36af9 100644 --- a/src/superio/winbond/w83697hf/chip.h +++ b/src/superio/winbond/w83697hf/chip.h @@ -23,8 +23,6 @@ #include <uart8250.h> -extern struct chip_operations superio_winbond_w83697hf_ops; - struct superio_winbond_w83697hf_config { unsigned int hwmon_fan1_divisor; unsigned int hwmon_fan2_divisor; diff --git a/src/superio/winbond/w83977f/chip.h b/src/superio/winbond/w83977f/chip.h index aacb009..d6c85bf 100644 --- a/src/superio/winbond/w83977f/chip.h +++ b/src/superio/winbond/w83977f/chip.h @@ -24,8 +24,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83977f_ops; - struct superio_winbond_w83977f_config { struct pc_keyboard keyboard; diff --git a/src/superio/winbond/w83977tf/chip.h b/src/superio/winbond/w83977tf/chip.h index 80c4afd..2a594e3 100644 --- a/src/superio/winbond/w83977tf/chip.h +++ b/src/superio/winbond/w83977tf/chip.h @@ -26,8 +26,6 @@ #include <pc80/keyboard.h> #include <uart8250.h> -extern struct chip_operations superio_winbond_w83977tf_ops; - struct superio_winbond_w83977tf_config { struct pc_keyboard keyboard; diff --git a/util/sconfig/main.c b/util/sconfig/main.c index eb996a7..fe4c3b8 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -624,6 +624,14 @@ int main(int argc, char** argv) { h = h->next; fprintf(autogen, "#include \"%s/chip.h\"\n", h->name); } + h = &headers; + while (h->next) { + h = h->next; + char *name_underscore = strdup(h->name); + translate_name(name_underscore, 0); + fprintf(autogen, "extern struct chip_operations %s_ops;\n", name_underscore); + free(name_underscore); + } walk_device_tree(autogen, &root, inherit_subsystem_ids, NULL); fprintf(autogen, "\n/* pass 0 */\n");

1 0

Re: [coreboot] git push by http failed.
by Bao, Zheng 21 Aug '12

21 Aug '12

user.email=fishbaozi(a)gmail.com user.name=zbao core.repositoryformatversion=0 core.filemode=true core.bare=false core.logallrefupdates=true core.ignorecase=true remote.origin.fetch=+refs/heads/*:refs/remotes/origin/* remote.origin.url=http://zbao:xxxxxx@review.coreboot.org/p/coreboot.git remote.origin.push=HEAD:refs/for/master branch.master.remote=origin branch.master.merge=refs/heads/master submodule.3rdparty.url=http://zbao:xxxxxxx@review.coreboot.org/p/blobs.git submodule.3rdparty.update=none alias.co=checkout From: QingPei Wang [mailto:wangqingpei@gmail.com] Sent: Tuesday, August 21, 2012 12:19 PM To: Bao, Zheng Cc: coreboot(a)coreboot.org Subject: Re: [coreboot] git push by http failed. what's your git config ? Best wishes QingPei Wang Phone: 86+018930528086 On Tue, Aug 21, 2012 at 10:54 AM, Bao, Zheng <Zheng.Bao(a)amd.com> wrote: RPC failed; result=22, HTTP code = 500

2 1

Patch set updated for coreboot: f4a8272 crossgcc: Update GDB patch version to 7.4.1
by Zheng Bao 21 Aug '12

21 Aug '12

Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1470 -gerrit commit f4a827290738b96f0f61de1ca2f246cb7a4e55cb Author: zbao <fishbaozi(a)gmail.com> Date: Tue Aug 21 16:25:41 2012 +0800 crossgcc: Update GDB patch version to 7.4.1 libgen.h dont have to be included. Change-Id: I46a6a23a310b20784de956a577f1ab3c7931e34d Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: zbao <fishbaozi(a)gmail.com> --- util/crossgcc/patches/gdb-7.3.1_pythonhome.patch | 27 ------------------------ util/crossgcc/patches/gdb-7.4.1_pythonhome.patch | 19 +++++++++++++++++ 2 files changed, 19 insertions(+), 27 deletions(-) diff --git a/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch b/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch deleted file mode 100644 index 90da2d9..0000000 --- a/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch +++ /dev/null @@ -1,27 +0,0 @@ -diff -ur gdb-7.3.1.orig/gdb/python/python.c gdb-7.3.1/gdb/python/python.c ---- gdb-7.3.1.orig/gdb/python/python.c 2011-07-02 21:33:10.000000000 +0200 -+++ gdb-7.3.1/gdb/python/python.c 2011-11-01 21:07:25.000000000 +0100 -@@ -33,6 +33,7 @@ - #include "python.h" - - #include <ctype.h> -+#include <libgen.h> - - /* True if we should print the stack when catching a Python error, - false otherwise. */ -@@ -1010,6 +1011,15 @@ - SLASH_STRING, "python", NULL)); - #endif - -+ char readlinkbuffer[BUFSIZ]; -+ int readlinks = readlink("/proc/self/exe", readlinkbuffer, BUFSIZ - 1); -+ readlinkbuffer[readlinks] = 0; -+ char *executeablepath = dirname(readlinkbuffer); -+ char *pythonhome = malloc(strlen(executeablepath) + strlen("/../") + 2); -+ strcpy(pythonhome, executeablepath); -+ strcat(pythonhome, "/../"); -+ setenv("PYTHONHOME", pythonhome, 1); -+ - Py_Initialize (); - PyEval_InitThreads (); - diff --git a/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch b/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch new file mode 100644 index 0000000..9bab2e0 --- /dev/null +++ b/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch @@ -0,0 +1,19 @@ +diff -ur gdb-7.4.1.orig/gdb/python/python.c gdb-7.4.1/gdb/python/python.c +--- gdb-7.4.1.orig/gdb/python/python.c 2012-01-15 02:04:05.000000000 +0800 ++++ gdb-7.4.1/gdb/python/python.c 2012-08-21 15:11:32.000000000 +0800 +@@ -1273,6 +1273,15 @@ + SLASH_STRING, "python", NULL)); + #endif + ++ char readlinkbuffer[BUFSIZ]; ++ int readlinks = readlink("/proc/self/exe", readlinkbuffer, BUFSIZ - 1); ++ readlinkbuffer[readlinks] = 0; ++ char *executeablepath = dirname(readlinkbuffer); ++ char *pythonhome = malloc(strlen(executeablepath) + strlen("/../") + 2); ++ strcpy(pythonhome, executeablepath); ++ strcat(pythonhome, "/../"); ++ setenv("PYTHONHOME", pythonhome, 1); ++ + Py_Initialize (); + PyEval_InitThreads (); +

1 0

New patch to review for coreboot: 5ee0540 crossgcc: Update GDB patch version to 7.4.1
by Zheng Bao 21 Aug '12

21 Aug '12

Zheng Bao (zheng.bao(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1470 -gerrit commit 5ee0540e9ab86a6530a36829226c19771659dd17 Author: zbao <fishbaozi(a)gmail.com> Date: Tue Aug 21 16:18:32 2012 +0800 crossgcc: Update GDB patch version to 7.4.1 libgen.h dont have to be included. Change-Id: I46a6a23a310b20784de956a577f1ab3c7931e34d Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Signed-off-by: zbao <fishbaozi(a)gmail.com> --- util/crossgcc/patches/gdb-7.3.1_pythonhome.patch | 27 ------------------------ util/crossgcc/patches/gdb-7.4.1_pythonhome.patch | 19 +++++++++++++++++ 2 files changed, 19 insertions(+), 27 deletions(-) diff --git a/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch b/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch deleted file mode 100644 index 90da2d9..0000000 --- a/util/crossgcc/patches/gdb-7.3.1_pythonhome.patch +++ /dev/null @@ -1,27 +0,0 @@ -diff -ur gdb-7.3.1.orig/gdb/python/python.c gdb-7.3.1/gdb/python/python.c ---- gdb-7.3.1.orig/gdb/python/python.c 2011-07-02 21:33:10.000000000 +0200 -+++ gdb-7.3.1/gdb/python/python.c 2011-11-01 21:07:25.000000000 +0100 -@@ -33,6 +33,7 @@ - #include "python.h" - - #include <ctype.h> -+#include <libgen.h> - - /* True if we should print the stack when catching a Python error, - false otherwise. */ -@@ -1010,6 +1011,15 @@ - SLASH_STRING, "python", NULL)); - #endif - -+ char readlinkbuffer[BUFSIZ]; -+ int readlinks = readlink("/proc/self/exe", readlinkbuffer, BUFSIZ - 1); -+ readlinkbuffer[readlinks] = 0; -+ char *executeablepath = dirname(readlinkbuffer); -+ char *pythonhome = malloc(strlen(executeablepath) + strlen("/../") + 2); -+ strcpy(pythonhome, executeablepath); -+ strcat(pythonhome, "/../"); -+ setenv("PYTHONHOME", pythonhome, 1); -+ - Py_Initialize (); - PyEval_InitThreads (); - diff --git a/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch b/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch new file mode 100644 index 0000000..9bab2e0 --- /dev/null +++ b/util/crossgcc/patches/gdb-7.4.1_pythonhome.patch @@ -0,0 +1,19 @@ +diff -ur gdb-7.4.1.orig/gdb/python/python.c gdb-7.4.1/gdb/python/python.c +--- gdb-7.4.1.orig/gdb/python/python.c 2012-01-15 02:04:05.000000000 +0800 ++++ gdb-7.4.1/gdb/python/python.c 2012-08-21 15:11:32.000000000 +0800 +@@ -1273,6 +1273,15 @@ + SLASH_STRING, "python", NULL)); + #endif + ++ char readlinkbuffer[BUFSIZ]; ++ int readlinks = readlink("/proc/self/exe", readlinkbuffer, BUFSIZ - 1); ++ readlinkbuffer[readlinks] = 0; ++ char *executeablepath = dirname(readlinkbuffer); ++ char *pythonhome = malloc(strlen(executeablepath) + strlen("/../") + 2); ++ strcpy(pythonhome, executeablepath); ++ strcat(pythonhome, "/../"); ++ setenv("PYTHONHOME", pythonhome, 1); ++ + Py_Initialize (); + PyEval_InitThreads (); +

1 0

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coreboot August 2012