coreboot April 2012

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Patch merged into coreboot/master: 30317b7 Intel e7505: refactor only
by gerrit＠coreboot.org 19 Apr '12

19 Apr '12

the following patch was just integrated into master: commit 30317b7e8cf7fbf12c2449ff743616b2fab1f21f Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Apr 18 19:47:56 2012 +0300 Intel e7505: refactor only Drop comments (from e7501 era) which no longer seem to apply with e7505. Write the semi-constant D0:F0 table as code. Some register settings seem to be in different order compared with vendor BIOS, and will be handled by follow-up patches. Split RCOMP register copy function in two parts. Drop some uses of inline and local_mdelay(). Change-Id: I8739d3b2bbad5861118e8b16ccea1dd86991204f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Apr 18 20:43:16 2012, giving +1 Reviewed-By: Peter Stuge <peter(a)stuge.se> at Thu Apr 19 20:40:52 2012, giving +2 See http://review.coreboot.org/896 for details. -gerrit

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Patch set updated for coreboot: 1a130dd nvramtool: Unify nvramtool and build_opt_tbl
by Vikram Narayanan 19 Apr '12

19 Apr '12

Vikram Narayanan (vikram186(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/898 -gerrit commit 1a130dda9fc144e68f2ce79ee3b18e1b2f4db448 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Sat Apr 14 15:25:13 2012 +0530 nvramtool: Unify nvramtool and build_opt_tbl As cmos.layout parsing capabilities are already there in nvramtool, use those than using build_opt_tbl.c. Add binary and header file generation in nvramtool. Make appropriate changes to Makefile.inc. Change-Id: Iaf3f5d4f51451aeb33c92800a0c895045f2388cf Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> --- src/arch/x86/Makefile.inc | 13 +-- util/nvramtool/Makefile | 2 +- util/nvramtool/Makefile.inc | 2 +- util/nvramtool/accessors/layout-bin.c | 133 ++++++++++++++++++++++++++++++ util/nvramtool/accessors/layout-common.c | 75 +++++++++++++++++ util/nvramtool/accessors/layout-text.c | 57 +++++++++++++ util/nvramtool/accessors/layout-text.h | 3 + util/nvramtool/cli/nvramtool.c | 18 ++++- util/nvramtool/cli/opts.c | 9 ++- util/nvramtool/cli/opts.h | 4 +- util/nvramtool/common.c | 2 + util/nvramtool/layout.h | 8 +- 12 files changed, 309 insertions(+), 17 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 8783d4b..d3b5e07 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -128,18 +128,15 @@ bootsplash.jpg-type := bootsplash ####################################################################### # i386 specific tools +NVRAMTOOL:=$(objutil)/nvramtool/nvramtool -$(OPTION_TABLE_H): $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout +$(OPTION_TABLE_H): $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout @printf " OPTION $(subst $(obj)/,,$(@))\n" - $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $@ + $(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -H $@ -$(obj)/cmos_layout.bin: $(objutil)/options/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout +$(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout @printf " OPTION $(subst $(obj)/,,$(@))\n" - $(objutil)/options/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --binary $@ - -$(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h - @printf " HOSTCC $(subst $(obj)/,,$(@))\n" - $(HOSTCC) $(HOSTCFLAGS) $< -o $@ + $(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@ ####################################################################### # Build the coreboot_ram (stage 2) diff --git a/util/nvramtool/Makefile b/util/nvramtool/Makefile index a75c70d..2a143b7 100644 --- a/util/nvramtool/Makefile +++ b/util/nvramtool/Makefile @@ -30,7 +30,7 @@ CFLAGS = -O2 -g -Wall -W -I. CLI_OBJS = cli/nvramtool.o cli/opts.o OBJS = cmos_lowlevel.o cmos_ops.o common.o compute_ip_checksum.o \ - hexdump.o input_file.o layout.o accessors/layout-text.o accessors/layout-bin.o lbtable.o \ + hexdump.o input_file.o layout.o accessors/layout-common.o accessors/layout-text.o accessors/layout-bin.o lbtable.o \ reg_expr.o cbfs.o accessors/cmos-hw-unix.o accessors/cmos-mem.o OBJS += $(CLI_OBJS) diff --git a/util/nvramtool/Makefile.inc b/util/nvramtool/Makefile.inc index 25d447d..a70896c 100644 --- a/util/nvramtool/Makefile.inc +++ b/util/nvramtool/Makefile.inc @@ -31,7 +31,7 @@ endif nvramtoolobj := nvramtoolobj += cli/nvramtool.o cli/opts.o nvramtoolobj += cmos_lowlevel.o cmos_ops.o common.o compute_ip_checksum.o -nvramtoolobj += hexdump.o input_file.o layout.o accessors/layout-text.o accessors/layout-bin.o lbtable.o +nvramtoolobj += hexdump.o input_file.o layout.o accessors/layout-common.o accessors/layout-text.o accessors/layout-bin.o lbtable.o nvramtoolobj += reg_expr.o cbfs.o accessors/cmos-hw-unix.o accessors/cmos-mem.o $(objutil)/nvramtool $(objutil)/nvramtool/accessors $(objutil)/nvramtool/cli: diff --git a/util/nvramtool/accessors/layout-bin.c b/util/nvramtool/accessors/layout-bin.c index cf79646..b910e35 100644 --- a/util/nvramtool/accessors/layout-bin.c +++ b/util/nvramtool/accessors/layout-bin.c @@ -1,6 +1,12 @@ /*****************************************************************************\ * lbtable.c ***************************************************************************** + * Copyright (C) 2012, Vikram Narayanan + * Unified build_opt_tbl and nvramtool + * build_opt_tbl.c + * Copyright (C) 2003 Eric Biederman (ebiederm(a)xmission.com) + * Copyright (C) 2007-2010 coresystems GmbH + * * Copyright (C) 2002-2005 The Regents of the University of California. * Produced at the Lawrence Livermore National Laboratory. * Written by Dave Peterson <dsp(a)llnl.gov> <dave_peterson(a)pobox.com> @@ -40,6 +46,7 @@ #include "cmos_lowlevel.h" #include "hexdump.h" #include "cbfs.h" +#include "layout-text.h" static void process_cmos_table(void); static void get_cmos_checksum_info(void); @@ -61,6 +68,8 @@ static const struct lb_record *next_cmos_rec(const struct lb_record *last, */ static const struct cmos_option_table *cmos_table = NULL; +#define ROUNDUP4(x) (x += (4 - (x % 4))) + void process_layout(void) { if ((cmos_table) == NULL) { @@ -83,6 +92,130 @@ void get_layout_from_cbfs_file(void) process_layout(); } +int write_cmos_layout_bin(FILE *f) +{ + const cmos_entry_t *cmos_entry; + const cmos_enum_t *cmos_enum; + cmos_checksum_layout_t layout; + struct cmos_option_table table; + struct cmos_entries entry; + struct cmos_enums cenum; + struct cmos_checksum csum; + size_t sum = 0; + int len; + + for (cmos_entry = first_cmos_entry(); cmos_entry != NULL; + cmos_entry = next_cmos_entry(cmos_entry)) { + + if (cmos_entry == first_cmos_entry()) { + sum += sizeof(table); + table.header_length = sizeof(table); + table.tag = LB_TAG_CMOS_OPTION_TABLE; + + if (fwrite((char *)&table, sizeof(table), 1, f) != 1) { + perror("Error writing image file"); + goto err; + } + } + + memset(&entry, 0, sizeof(entry)); + entry.tag = LB_TAG_OPTION; + entry.config = cmos_entry->config; + entry.config_id = (uint32_t)cmos_entry->config_id; + entry.bit = cmos_entry->bit; + entry.length = cmos_entry->length; + + if (!is_ident((char *)cmos_entry->name)) { + fprintf(stderr, + "Error - Name %s is an invalid identifier\n", + cmos_entry->name); + goto err; + } + + memcpy(entry.name, cmos_entry->name, strlen(cmos_entry->name)); + entry.name[strlen(cmos_entry->name)] = '\0'; + len = strlen(cmos_entry->name) + 1; + + if (len % 4) + ROUNDUP4(len); + + entry.size = sizeof(entry) - CMOS_MAX_NAME_LENGTH + len; + sum += entry.size; + if (fwrite((char *)&entry, entry.size, 1, f) != 1) { + perror("Error writing image file"); + goto err; + } + } + + for (cmos_enum = first_cmos_enum(); + cmos_enum != NULL; cmos_enum = next_cmos_enum(cmos_enum)) { + memset(&cenum, 0, sizeof(cenum)); + cenum.tag = LB_TAG_OPTION_ENUM; + memcpy(cenum.text, cmos_enum->text, strlen(cmos_enum->text)); + cenum.text[strlen(cmos_enum->text)] = '\0'; + len = strlen((char *)cenum.text) + 1; + + if (len % 4) + ROUNDUP4(len); + + cenum.config_id = cmos_enum->config_id; + cenum.value = cmos_enum->value; + cenum.size = sizeof(cenum) - CMOS_MAX_TEXT_LENGTH + len; + sum += cenum.size; + if (fwrite((char *)&cenum, cenum.size, 1, f) != 1) { + perror("Error writing image file"); + goto err; + } + } + + layout.summed_area_start = cmos_checksum_start; + layout.summed_area_end = cmos_checksum_end; + layout.checksum_at = cmos_checksum_index; + checksum_layout_to_bits(&layout); + + csum.tag = LB_TAG_OPTION_CHECKSUM; + csum.size = sizeof(csum); + csum.range_start = layout.summed_area_start; + csum.range_end = layout.summed_area_end; + csum.location = layout.checksum_at; + csum.type = CHECKSUM_PCBIOS; + sum += csum.size; + + if (fwrite((char *)&csum, csum.size, 1, f) != 1) { + perror("Error writing image file"); + goto err; + } + + if (fseek(f, sizeof(table.tag), SEEK_SET) != 0) { + perror("Error while seeking"); + goto err; + } + + if (fwrite((char *)&sum, sizeof(table.tag), 1, f) != 1) { + perror("Error writing image file"); + goto err; + } + return sum; + +err: + fclose(f); + exit(1); +} + +void write_cmos_output_bin(const char *binary_filename) +{ + FILE *fp; + + if ((fp = fopen(binary_filename, "wb")) == NULL) { + fprintf(stderr, + "%s: Can not open file %s for writing: " + "%s\n", prog_name, binary_filename, strerror(errno)); + exit(1); + } + write_cmos_layout_bin(fp); + fclose(fp); +} + /**************************************************************************** * get_layout_from_cmos_table * diff --git a/util/nvramtool/accessors/layout-common.c b/util/nvramtool/accessors/layout-common.c new file mode 100644 index 0000000..0a99d3b --- /dev/null +++ b/util/nvramtool/accessors/layout-common.c @@ -0,0 +1,75 @@ +/*****************************************************************************\ + * layout_common.c + ***************************************************************************** + * Copyright (C) 2012, Vikram Narayanan + * Unified build_opt_tbl and nvramtool + * build_opt_tbl.c + * Copyright (C) 2003 Eric Biederman (ebiederm(a)xmission.com) + * Copyright (C) 2007-2010 coresystems GmbH + * + * This file is part of nvramtool, a utility for reading/writing coreboot + * parameters and displaying information from the coreboot table. + * For details, see http://coreboot.org/nvramtool. + * + * Please also read the file DISCLAIMER which is included in this software + * distribution. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License (as published by the + * Free Software Foundation) version 2, dated June 1991. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the IMPLIED WARRANTY OF + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the terms and + * conditions of the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. +\*****************************************************************************/ + +#include <ctype.h> + +static int is_ident_nondigit(int c) +{ + int result; + switch(c) { + case 'A': case 'B': case 'C': case 'D': + case 'E': case 'F': case 'G': case 'H': + case 'I': case 'J': case 'K': case 'L': + case 'M': case 'N': case 'O': case 'P': + case 'Q': case 'R': case 'S': case 'T': + case 'U': case 'V': case 'W': case 'X': + case 'Y': case 'Z': + case 'a': case 'b': case 'c': case 'd': + case 'e': case 'f': case 'g': case 'h': + case 'i': case 'j': case 'k': case 'l': + case 'm': case 'n': case 'o': case 'p': + case 'q': case 'r': case 's': case 't': + case 'u': case 'v': case 'w': case 'x': + case 'y': case 'z': + case '_': + result = 1; + break; + default: + result = 0; + break; + } + return result; +} + +int is_ident(char *str) +{ + int result; + int ch; + ch = *str; + result = 0; + if (is_ident_nondigit(ch)) { + do { + str++; + ch = *str; + } while(ch && (is_ident_nondigit(ch) || (isdigit(ch)))); + result = (ch == '\0'); + } + return result; +} diff --git a/util/nvramtool/accessors/layout-text.c b/util/nvramtool/accessors/layout-text.c index cbe698c..a06f560 100644 --- a/util/nvramtool/accessors/layout-text.c +++ b/util/nvramtool/accessors/layout-text.c @@ -1,6 +1,12 @@ /*****************************************************************************\ * layout-text.c ***************************************************************************** + * Copyright (C) 2012, Vikram Narayanan + * Unified build_opt_tbl and nvramtool + * build_opt_tbl.c + * Copyright (C) 2003 Eric Biederman (ebiederm(a)xmission.com) + * Copyright (C) 2007-2010 coresystems GmbH + * * Copyright (C) 2002-2005 The Regents of the University of California. * Produced at the Lawrence Livermore National Laboratory. * Written by Dave Peterson <dsp(a)llnl.gov> <dave_peterson(a)pobox.com>. @@ -218,6 +224,57 @@ void get_layout_from_file(void) fclose(f); } +void write_cmos_layout_header(const char *header_filename) +{ + FILE *fp; + const cmos_entry_t *cmos_entry; + cmos_checksum_layout_t layout; + + if ((fp = fopen(header_filename, "w+")) == NULL) { + fprintf(stderr, + "%s: Can't open file %s for writing: %s\n", + prog_name, header_filename, strerror(errno)); + exit(1); + } + + fprintf(fp, "/**\n * This is an autogenerated file. Do not EDIT.\n" + " * All changes made to this file will be lost.\n" + " * See mainboard's cmos.layout file.\n */\n" + "\n#ifndef __OPTION_TABLE_H\n" + "#define __OPTION_TABLE_H\n\n"); + + for (cmos_entry = first_cmos_entry(); cmos_entry != NULL; + cmos_entry = next_cmos_entry(cmos_entry)) { + + if (!is_ident((char *)cmos_entry->name)) { + fprintf(stderr, + "Error - Name %s is an invalid identifier\n", + cmos_entry->name); + fclose(fp); + exit(1); + } + + fprintf(fp, "#define CMOS_VSTART_%s\t%d\n", + cmos_entry->name, cmos_entry->bit); + fprintf(fp, "#define CMOS_VLEN_%s\t%d\n", + cmos_entry->name, cmos_entry->length); + } + + layout.summed_area_start = cmos_checksum_start; + layout.summed_area_end = cmos_checksum_end; + layout.checksum_at = cmos_checksum_index; + checksum_layout_to_bits(&layout); + + fprintf(fp, "\n#define LB_CKS_RANGE_START %d\n", + layout.summed_area_start / 8); + fprintf(fp, "#define LB_CKS_RANGE_END %d\n", + layout.summed_area_end / 8); + fprintf(fp, "#define LB_CKS_LOC %d\n", + layout.checksum_at / 8); + fprintf(fp, "\n#endif /* __OPTION_TABLE_H */\n"); + + fclose(fp); +} /**************************************************************************** * write_cmos_layout * diff --git a/util/nvramtool/accessors/layout-text.h b/util/nvramtool/accessors/layout-text.h index 21997e9..85628f7 100644 --- a/util/nvramtool/accessors/layout-text.h +++ b/util/nvramtool/accessors/layout-text.h @@ -37,5 +37,8 @@ void set_layout_filename(const char filename[]); void get_layout_from_file(void); void write_cmos_layout(FILE * f); +void write_cmos_output_bin(const char *binary_filename); +void write_cmos_layout_header(const char *header_filename); +extern int is_ident(char *str); #endif /* LAYOUT_FILE_H */ diff --git a/util/nvramtool/cli/nvramtool.c b/util/nvramtool/cli/nvramtool.c index bcb10bb..f3fb16d 100644 --- a/util/nvramtool/cli/nvramtool.c +++ b/util/nvramtool/cli/nvramtool.c @@ -62,6 +62,8 @@ static void op_write_cmos_dump(void); static void op_read_cmos_dump(void); static void op_show_cmos_hex_dump(void); static void op_show_cmos_dumpfile(void); +static void op_write_cmos_layout_bin(void); +static void op_write_cmos_layout_header(void); static int list_one_param(const char name[], int show_name); static int list_all_params(void); static void list_param_enums(const char name[]); @@ -86,9 +88,23 @@ static const op_fn_t op_fns[] = { op_show_version, op_write_cmos_dump, op_read_cmos_dump, op_show_cmos_hex_dump, - op_show_cmos_dumpfile + op_show_cmos_dumpfile, + op_write_cmos_layout_bin, + op_write_cmos_layout_header }; +static void op_write_cmos_layout_bin(void) +{ + get_layout_from_file(); + write_cmos_output_bin(nvramtool_op.param); +} + +static void op_write_cmos_layout_header(void) +{ + get_layout_from_file(); + write_cmos_layout_header(nvramtool_op.param); +} + static const hexdump_format_t cmos_dump_format = { 16, 2, "", " | ", " ", " | ", '.' }; diff --git a/util/nvramtool/cli/opts.c b/util/nvramtool/cli/opts.c index 4949649..8e920e8 100644 --- a/util/nvramtool/cli/opts.c +++ b/util/nvramtool/cli/opts.c @@ -41,7 +41,7 @@ static void register_op_modifier(nvramtool_op_modifier_t mod, char mod_param[]); static void resolve_op_modifiers(void); static void sanity_check_args(void); -static const char getopt_string[] = "-ab:B:c::C:dD:e:hil::np:r:tvw:xX:y:Y"; +static const char getopt_string[] = "-ab:B:c::C:dD:e:hH:iL:l::np:r:tvw:xX:y:Y"; /**************************************************************************** * parse_nvramtool_args @@ -100,6 +100,9 @@ void parse_nvramtool_args(int argc, char *argv[]) case 'h': register_op(&op_found, NVRAMTOOL_OP_SHOW_USAGE, NULL); break; + case 'H': + register_op(&op_found, NVRAMTOOL_OP_WRITE_HEADER_FILE, optarg); + break; case 'i': register_op(&op_found, NVRAMTOOL_OP_CMOS_SET_PARAMS_STDIN, NULL); @@ -108,6 +111,10 @@ void parse_nvramtool_args(int argc, char *argv[]) register_op(&op_found, NVRAMTOOL_OP_LBTABLE_SHOW_INFO, handle_optional_arg(argc, argv)); break; + case 'L': + register_op(&op_found, NVRAMTOOL_OP_WRITE_BINARY_FILE, + optarg); + break; case 'n': register_op_modifier(NVRAMTOOL_MOD_SHOW_VALUE_ONLY, NULL); diff --git a/util/nvramtool/cli/opts.h b/util/nvramtool/cli/opts.h index f46f254..a011ef1 100644 --- a/util/nvramtool/cli/opts.h +++ b/util/nvramtool/cli/opts.h @@ -48,7 +48,9 @@ typedef enum { NVRAMTOOL_OP_SHOW_VERSION = 0, NVRAMTOOL_OP_WRITE_CMOS_DUMP, NVRAMTOOL_OP_READ_CMOS_DUMP, NVRAMTOOL_OP_SHOW_CMOS_HEX_DUMP, - NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE + NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE, + NVRAMTOOL_OP_WRITE_BINARY_FILE, + NVRAMTOOL_OP_WRITE_HEADER_FILE } nvramtool_op_t; typedef struct { diff --git a/util/nvramtool/common.c b/util/nvramtool/common.c index 91fcccc..15f8b0d 100644 --- a/util/nvramtool/common.c +++ b/util/nvramtool/common.c @@ -98,6 +98,8 @@ void usage(FILE * outfile) "VALUE.\n" " -l [ARG]: Show coreboot table info for ARG, or " "all ARG choices.\n" + " -L OUTPUT_BIN Write CMOS layout file in binary format\n" + " -H OUTPUT_HDR Write CMOS layout file in header format\n" " -d: Show low-level dump of coreboot table.\n" " -Y: Show CMOS layout info.\n" " -b OUTPUT_FILE: Dump CMOS memory contents to file.\n" diff --git a/util/nvramtool/layout.h b/util/nvramtool/layout.h index d99275c..082c31b 100644 --- a/util/nvramtool/layout.h +++ b/util/nvramtool/layout.h @@ -46,10 +46,10 @@ #define LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE (LAYOUT_RESULT_START + 9) typedef enum { - CMOS_ENTRY_ENUM, - CMOS_ENTRY_HEX, - CMOS_ENTRY_STRING, - CMOS_ENTRY_RESERVED + CMOS_ENTRY_ENUM = 'e', + CMOS_ENTRY_HEX = 'h', + CMOS_ENTRY_STRING = 's', + CMOS_ENTRY_RESERVED = 'r', } cmos_entry_config_t; /* This represents a CMOS parameter. */

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Patch set updated for coreboot: 568a197 nvramtool: Allow spaces in enumeration names
by Vikram Narayanan 19 Apr '12

19 Apr '12

Vikram Narayanan (vikram186(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/901 -gerrit commit 568a197cd823e621251c87ff428c7747c6760724 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Apr 14 16:21:39 2012 +0200 nvramtool: Allow spaces in enumeration names Change-Id: Id526e74f06fb15d4692d7b6edc8b5863f2d42c50 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/nvramtool/accessors/layout-text.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/util/nvramtool/accessors/layout-text.c b/util/nvramtool/accessors/layout-text.c index 5f7cade..cbe698c 100644 --- a/util/nvramtool/accessors/layout-text.c +++ b/util/nvramtool/accessors/layout-text.c @@ -149,7 +149,7 @@ static const char enums_line_regex[] = /* followed by one or more whitespace characters */ "[[:space:]]+" /* followed by a chunk of nonwhitespace for text field */ - "([^[:space:]]+)" + "([[:print:]]*[^[:space:]])" /* followed by optional whitespace */ "[[:space:]]*$";

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Re: [coreboot] blobs
by Peter Stuge 19 Apr '12

19 Apr '12

Marc Jones wrote: > Also, we should talk about how this gets pulled in with the coreboot > tree. Should/could the coreboot make/kconfig pull in the blobs repo? > Should we use git submodules or subtree merge? Any git expert > comments? I suggest to use exactly the same method that we have developed for when SeaBIOS is selected as payload in coreboot Kconfig. That method is absolutely reliable, and means that the files will never be downloaded until the first time that the user chooses to build coreboot for a mainboard where they are actually needed. The commit hash of a known good commit in the binaries repository would be committed into the coreboot repository in the Kconfig file for the mainboard. //Peter

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Patch set updated for coreboot: 6c1129d Makefile: rename coreboot_ap linking filenames
by Kyösti Mälkki 19 Apr '12

19 Apr '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/840 -gerrit commit 6c1129df5afbf578a4173fac9bea3c2f6ed83ac8 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Apr 19 14:22:43 2012 +0300 Makefile: rename coreboot_ap linking filenames $(obj)/coreboot_ap -> $(objcbfs)/coreboot_ap.elf It is really a ramstage for AP CPU and not a romstage, it is not enabled for any mainboard by default, and it doesn't compile even if enabled. Change-Id: Ifb9c5cb6df65309660b000876cf6a9a3da9b6839 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/Makefile.inc | 27 +++++++++------------------ 1 files changed, 9 insertions(+), 18 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 18cc5ec..6a96a8e 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -47,7 +47,7 @@ ifeq ($(CONFIG_PAYLOAD_FILO),y) COREBOOT_ROM_DEPENDENCIES+=filo endif ifeq ($(CONFIG_AP_CODE_IN_CAR),y) -COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap +COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf endif ifeq ($(CONFIG_GEODE_VSA_FILE),y) COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME) @@ -76,9 +76,9 @@ endif $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp - if [ -f $(obj)/coreboot_ap ]; \ + if [ -f $(objcbfs)/coreboot_ap.elf ]; \ then \ - $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \ + $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/coreboot_ap.elf $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \ fi $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/coreboot_ram.elf $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @@ -173,20 +173,15 @@ $(objgenerated)/ramstage.a: $$(ramstage-objs) $(AR) cr $@ $^ ####################################################################### -# coreboot_ap.rom +# Ramstage for AP CPU (AMD K8, obsolete?) -ifeq ($(CONFIG_AP_CODE_IN_CAR),y) - -$(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o +$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^ - $(OBJCOPY) --only-keep-debug $@.tmp $@.debug - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp - $(NM) -n $@.tmp | sort > $@.map - mv $@.tmp $@ + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $< -endif +$(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H) + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@ ####################################################################### # done @@ -223,10 +218,6 @@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/ $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ else -$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H) - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@ - $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@

1 0

Patch set updated for coreboot: 87b3cab Makefile: define build result directories
by Kyösti Mälkki 19 Apr '12

19 Apr '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/858 -gerrit commit 87b3cab7f6ef4b8845de540c40b643c41ff3fdef Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Apr 19 12:00:06 2012 +0300 Makefile: define build result directories Final build results (.elf, .debug, .map) are to be placed under directory $(objcbfs), the default is: $(obj)/cbfs/$(CONFIG_CBFS_PREFIX)/ Intermediate build results (.o, .s, .S, .inc, .ld) that do not have a clear one-to-one relation to a file under src/ are to be placed under directory $(objgenerated), the default is: $(obj)/generated Also defines implicit rules for final build results: .debug -> .elf and .map .elf -> .bin Change-Id: I448c6b7c9a952e54170df42091d7db438025a795 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- Makefile.inc | 18 ++++++++++++++++-- src/arch/x86/Makefile.inc | 15 +++++++++++++++ 2 files changed, 31 insertions(+), 2 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index b5e8811..4d25dd5 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -27,14 +27,25 @@ ARCHDIR-$(CONFIG_ARCH_X86) := x86 MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR)) export MAINBOARDDIR +## Final build results, which CBFSTOOL uses to create the final +## rom image file, are placed under $(objcbfs). +## These typically have suffixes .debug .elf .bin and .map +export objcbfs := $(obj)/cbfs/$(CONFIG_CBFS_PREFIX) + +## Based on the active configuration, Makefile conditionally collects +## the required assembly includes and saves them in a file. +## Such files that do not have a clear one-to-one relation to a source +## file under src/ are placed and built under $(objgenerated) +export objgenerated := $(obj)/generated + ####################################################################### # root rule to resolve if in build mode (ie. configuration exists) real-target: $(obj)/config.h coreboot -coreboot: $(obj)/coreboot.rom +coreboot: build-dirs $(obj)/coreboot.rom ####################################################################### # our phony targets -PHONY+= clean-abuild coreboot lint lint-stable +PHONY+= clean-abuild coreboot lint lint-stable build-dirs ####################################################################### # root source directories of coreboot @@ -168,6 +179,9 @@ $(obj)/build.h: .xcompile $(obj)/ldoptions: $(obj)/config.h awk '/^#define ([^"])* ([^"])*$$/ {gsub("\\r","",$$3); print $$2 " = " $$3 ";";}' $< > $@ +build-dirs: + mkdir -p $(objcbfs) $(objgenerated) + ####################################################################### # Build the tools CBFSTOOL:=$(obj)/cbfstool diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 8783d4b..c5faf5b 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -142,6 +142,21 @@ $(objutil)/options/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src $(HOSTCC) $(HOSTCFLAGS) $< -o $@ ####################################################################### +# Common recipes for all stages + +$(objcbfs)/%.bin: $(objcbfs)/%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY) -O binary $< $@ + +$(objcbfs)/%.elf: $(objcbfs)/%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY) --strip-debug $@.tmp + $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + +####################################################################### # Build the coreboot_ram (stage 2) $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions

1 0

Patch set updated for coreboot: 390ae3f Makefile: rename romstage linking filenames
by Kyösti Mälkki 19 Apr '12

19 Apr '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/859 -gerrit commit 390ae3fd5a950a8126dd961a7808a328c10638fd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Apr 19 14:43:47 2012 +0300 Makefile: rename romstage linking filenames Move final build results under $(objcbfs). Move intermediate files under $(objgenerated). Remove use of sed -i. Change-Id: Ie035a1544848b26514a197c340f470201065b8d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/Makefile.inc | 53 +++++++++++++++++++------------------------- 1 files changed, 23 insertions(+), 30 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 6a96a8e..21d7ab2 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -230,7 +230,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/ endif # Things that appear in every board -romstage-srcs += $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s +romstage-srcs += $(objgenerated)/crt0.s ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c @@ -265,11 +265,11 @@ endif ####################################################################### # Build the final rom image -$(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL) +$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre1 $@.tmp - $(CBFSTOOL) $@.tmp add-stage $(obj)/romstage.elf \ - $(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(obj)/romstage/base_xip.txt) + $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/romstage_xip.elf \ + $(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(objcbfs)/base_xip.txt) mv $@.tmp $@ ####################################################################### @@ -328,54 +328,47 @@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootbloc ####################################################################### # Build the romstage -$(obj)/romstage.bin: $$(romstage-objs) $(obj)/romstage/link_null.ld +$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link_null.ld $(romstage-objs) - $(OBJCOPY) -O binary $(obj)/romstage.elf $@ + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld $(romstage-objs) -$(obj)/coreboot.romstage: $$(romstage-objs) $(obj)/romstage/link_xip.ld +$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link_xip.ld $(romstage-objs) - $(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map - $(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug - $(OBJCOPY) --strip-debug $(obj)/romstage.elf - $(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf - $(OBJCOPY) -O binary $(obj)/romstage.elf $@ - -$(obj)/romstage/link_null.ld: $$(ldscripts) $(obj)/ldoptions + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld $(romstage-objs) + +$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @printf " GEN $(subst $(obj)/,,$(@))\n" - mkdir -p $(obj)/romstage rm -f $@ printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp mv $@.tmp $@ -$(obj)/romstage/link_xip.ld: $(obj)/romstage/link_null.ld $(obj)/romstage/base_xip.txt +$(objgenerated)/romstage_xip.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt @printf " GEN $(subst $(obj)/,,$(@))\n" rm -f $@ - sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(obj)/romstage/base_xip.txt > $@.tmp - sed -e '/ROMSTAGE_BASE/d' $(obj)/romstage/link_null.ld >> $@.tmp + sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(objcbfs)/base_xip.txt > $@.tmp + sed -e '/ROMSTAGE_BASE/d' $(objgenerated)/romstage_null.ld >> $@.tmp mv $@.tmp $@ -$(obj)/romstage/base_xip.txt: $(obj)/coreboot.pre1 $(obj)/romstage.bin +$(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin rm -f $@ - $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $@.tmp \ + $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(objcbfs)/romstage_null.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $@.tmp \ || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; } - sed -i -e 's/^/0x/g' $@.tmp - mv $@.tmp $@ + sed -e 's/^/0x/g' $@.tmp > $@.tmp2 + rm $@.tmp + mv $@.tmp2 $@ -$(obj)/romstage/crt0.S: $$(crt0s) +$(objgenerated)/crt0.S: $$(crt0s) @printf " GEN $(subst $(obj)/,,$(@))\n" - mkdir -p $(obj)/romstage printf '$(foreach crt0,$(crt0s),#include "$(crt0:$(obj)/%=%)"\n)' > $@ -$(obj)/mainboard/$(MAINBOARDDIR)/crt0.romstage.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s +$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(dir $(a))/crt0.disasm + $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm -$(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S $(obj)/config.h $(obj)/build.h +$(objgenerated)/crt0.s: $(objgenerated)/crt0.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \

1 0

Patch set updated for coreboot: 755e2c0 Makefile: rename ramstage linking filenames
by Kyösti Mälkki 19 Apr '12

19 Apr '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/839 -gerrit commit 755e2c0f394f31648db35fd42f60e2174e1cf6a0 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Apr 19 12:21:36 2012 +0300 Makefile: rename ramstage linking filenames Move final build results under $(objcbfs). Move intermediate files under $(objgenerated). Change-Id: I0046f68938be81b8efa525aa50b39328ca02ecb6 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/Makefile.inc | 23 +++++++++-------------- 1 files changed, 9 insertions(+), 14 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index b243e0f..18cc5ec 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -73,14 +73,14 @@ $(obj)/coreboot.pre1: $(CBFSTOOL) mv $(obj)/coreboot.rom $@ endif -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp if [ -f $(obj)/coreboot_ap ]; \ then \ $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \ fi - $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/coreboot_ram.elf $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @printf " PAYLOAD \e[1;31mnone (as specified by user)\e[0m\n" endif @@ -159,23 +159,18 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug ####################################################################### # Build the coreboot_ram (stage 2) -$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld #ldoptions +$(objcbfs)/coreboot_ram.debug: $(objgenerated)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o - $(NM) -n $@.tmp | sort > $@.map - $(OBJCOPY) --only-keep-debug $@.tmp $@.debug - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp - mv $@.tmp $@ + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/coreboot_ram.ld $< -$(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(obj)/coreboot.a $(LIBGCC_FILE_NAME) +$(objgenerated)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) $(objgenerated)/ramstage.a $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o $(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(objgenerated)/ramstage.a $(LIBGCC_FILE_NAME) -Wl,--end-group -$(obj)/coreboot.a: $$(ramstage-objs) +$(objgenerated)/ramstage.a: $$(ramstage-objs) @printf " AR $(subst $(obj)/,,$(@))\n" - rm -f $(obj)/coreboot.a - $(AR) cr $(obj)/coreboot.a $^ + rm -f $@ + $(AR) cr $@ $^ ####################################################################### # coreboot_ap.rom

1 0

Patch set updated for coreboot: cecd82c Makefile: rename bootblock linking filenames
by Kyösti Mälkki 19 Apr '12

19 Apr '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/838 -gerrit commit cecd82c55af49bb8e7f1838258c6b389fb787d3d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Apr 19 12:14:53 2012 +0300 Makefile: rename bootblock linking filenames Move final build results under $(objcbfs). Move intermediate files under $(objgenerated). Change-Id: I0365304e1b0ed02a5a3ec720b0cf3e303eaefa7c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/Makefile.inc | 39 ++++++++++++++------------------------- 1 files changed, 14 insertions(+), 25 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index c5faf5b..b243e0f 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -63,8 +63,8 @@ prebuild-files = \ $(call extract_nth,4,$(file)) &&) prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) -$(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $$(prebuilt-files) $(CBFSTOOL) - $(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(obj)/coreboot.bootblock +$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) + $(CBFSTOOL) $@.tmp create $(CONFIG_COREBOOT_ROMSIZE_KB)K $(objcbfs)/bootblock.bin $(prebuild-files) true mv $@.tmp $@ else @@ -289,10 +289,6 @@ $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL) ####################################################################### # Build the bootblock -$(obj)/coreboot.bootblock: $(obj)/bootblock.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds @@ -309,7 +305,7 @@ bootblock_inc += $(chipset_bootblock_inc) ifeq ($(CONFIG_SSE),y) bootblock_inc += $(src)/cpu/x86/sse_enable.inc endif -bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc +bootblock_inc += $(objgenerated)/bootblock.inc bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__ @@ -317,38 +313,31 @@ ifeq ($(CONFIG_SSE),y) bootblock_romccflags := -mcpu=k7 -msse -O2 -D__PRE_RAM__ endif -$(obj)/bootblock/ldscript.ld: $$(bootblock_lds) $(obj)/ldoptions +$(objgenerated)/bootblock.ld: $$(bootblock_lds) $(obj)/ldoptions @printf " GEN $(subst $(obj)/,,$(@))\n" - mkdir -p $(obj)/bootblock printf '$(foreach ldscript,ldoptions $(bootblock_lds),INCLUDE "$(ldscript)"\n)' > $@ -$(obj)/bootblock/bootblock.S: $$(bootblock_inc) +$(objgenerated)/bootblock.S: $$(bootblock_inc) @printf " GEN $(subst $(obj)/,,$(@))\n" - mkdir -p $(obj)/bootblock printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s +$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(dir $(a))/crt0.disasm + $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj)/config.h $(obj)/build.h +$(objgenerated)/bootblock.s: $(objgenerated)/bootblock.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) +$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \ - $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d + $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $< > $(objgenerated)/bootblock.inc.d $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@ -$(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld +$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(obj)/bootblock/ldscript.ld $< - $(NM) -n $@.tmp | sort > $(obj)/bootblock.map - $(OBJCOPY) --only-keep-debug $@.tmp $(obj)/bootblock.debug - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$(obj)/bootblock.debug $@.tmp - mv $@.tmp $@ + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< ####################################################################### # Build the romstage

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Re: [coreboot] blobs
by Xavi Drudis Ferran 19 Apr '12

19 Apr '12

On Thu 19/04/12 00:35 , Marc Jones <marcj303(a)gmail.com> wrote: > On Tue, Apr 17, 2012 at 10:08 AM, ron minnich wrote: > > Please find here: > > ssh://review.coreboot.org:29418/blobs.git > > > > blobs needed for the two google systems. > > > > I will be removing the blob from the coreboot tree today. > > > > I hope this helps bring the discussion to a close :-) > > > > ron > Yes, thanks for removing the blob, Mr. Minnich. I wanted to say it before but didn't want to continue the thread you asked to end. So I just hiked here. > Hi Ron, > > We should probably have some best practices about the blobs. It would > be good if there was a text file to accompany a blob that had > important details. Where is came from, what it is for, license, etc. > > Also, we should talk about how this gets pulled in with the coreboot > tree. Should/could the coreboot make/kconfig pull in the blobs repo? > Should we use git submodules or subtree merge? Any git expert > comments? > Excuse me for not participating. I don't see how supporting so restricted hardware as Mr Georgi explained (thanks for the explanation) can be desirable. He's right those chips are not for me, but I being me I don't find myself so extraordinary and think they're not for anyone (a computer that is able to check public key signatures before it is able to access its own RAM is not a computer, it's a trap), so my best help here will be getting myself out of the way. Less severe cases are not interesting enough for me either, so I'm sure you'll welcome my silence.

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coreboot April 2012