Dear Manasa,
welcome and thank you very much for your interest in coreboot. I guess
your request is related to the Google Summer of Code program [2]?
First of all, please read the netiquette [1] to learn best practice for
list communication (mailing list, no HTML messages, interleaved
quoting).
Am Donnerstag, den 15.03.2012, 16:46 +0430 schrieb manasa gv:
[…]
> I am Manasa, a graduate engineer intersted to work on
> coreboot..I have gone through the coreboot website, flashrom,supported
> mother boards,chipsets,bios savior and all those things.and also gone
> through opencompute.org site to understand regarding mother board and bus
> architecture..am new and interested to work on coreboot..so please assign
> some work related to coreboot..
There are several project proposals in the Wiki [3]. Best for you would
be to pick an area which interests you and start playing around to get
to know the code base. Do you already have coreboot running with Qemu?
If you are undecided, you could do some patch review on Gerrit.
Especially patches
707, 606, 454, 644, 604, 607, 641, 643, 686
need testing and review. The following ones too.
709, 710 and 711
I would also very much like to see a payload like coreinfo letting you
change certain system setting like people are used to from a BIOS.
Thanks and I am looking forward to your contributions,
Paul
[1] http://en.opensuse.org/openSUSE:Mailing_list_netiquette
[2] http://www.coreboot.org/GSoC
[3] http://www.coreboot.org/Project_Ideas
[4] http://review.coreboot.org/#/q/status:open,n,z
Respected sir,
I am Manasa, a graduate engineer intersted to work on
coreboot..I have gone through the coreboot website, flashrom,supported
mother boards,chipsets,bios savior and all those things.and also gone
through opencompute.org site to understand regarding mother board and bus
architecture..am new and interested to work on coreboot..so please assign
some work related to coreboot..
Regards & Thanks,
Manasa
---------- Forwarded message ----------
From: manasa gv <manasa671989(a)gmail.com>
Date: Thu, Mar 15, 2012 at 2:44 PM
Subject: Fwd: kindly requesting to assign work on coreboot
To: coreboot-request(a)coreboot.org
---------- Forwarded message ----------
From: manasa gv <manasa671989(a)gmail.com>
Date: Thu, Mar 15, 2012 at 3:39 PM
Subject: Fwd: kindly requesting to assign work on coreboot
To: coreboot(a)coreboot.org
---------- Forwarded message ----------
From: manasa gv <manasa671989(a)gmail.com>
Date: Thu, Mar 15, 2012 at 3:27 PM
Subject: kindly requesting to assign work on coreboot
To: kirantpatil(a)gmail.com
Respected sir,
I am Manasa, a graduate engineer intersted to work on
coreboot..I have gone through the coreboot website, flashrom,supported
mother boards,chipsets,bios savior and all those things.and also gone
through opencompute.org site to understand regarding mother board and bus
architecture..am new and interested to work on coreboot..so please assign
some work related to coreboot..
Regards & Thanks,
Manasa
Respected sir,
I am Manasa, a graduate engineer intersted to work on
coreboot..I have gone through the coreboot website, flashrom,supported
mother boards,chipsets,bios savior and all those things.and also gone
through opencompute.org site to understand regarding mother board and bus
architecture..am new and interested to work on coreboot..so please
assign
some work related to coreboot..
Regards & Thanks,
Manasa
---------- Forwarded message ----------
From: manasa gv <manasa671989(a)gmail.com>
Date: Thu, Mar 15, 2012 at 3:27 PM
Subject: kindly requesting to assign work on coreboot
To: kirantpatil(a)gmail.com
Respected sir,
I am Manasa, a graduate engineer intersted to work on
coreboot..I have gone through the coreboot website, flashrom,supported
mother boards,chipsets,bios savior and all those things.and also gone
through opencompute.org site to understand regarding mother board and bus
architecture..am new and interested to work on coreboot..so please assign
some work related to coreboot..
Regards & Thanks,
Manasa
the following patch was just integrated into master:
commit 8cc685b2e006f3756dd26885b834fb198fa1f137
Author: Gabe Black <gabeblack(a)google.com>
Date: Fri Sep 16 02:24:03 2011 -0700
Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available
Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available by
including byteorder.h
Change-Id: I9ab8cb51bd680e861b28d5130d09547bb9ab3b1f
Signed-off-by: Gabe Black <gabeblack(a)google.com>
Build-Tested: build bot (Jenkins) at Fri Mar 9 05:43:36 2012, giving +1
Reviewed-By: Peter Stuge <peter(a)stuge.se> at Wed Mar 14 23:00:25 2012, giving +2
See http://review.coreboot.org/709 for details.
-gerrit
Board is built in Igel Thin Client 3210
After a few problems,
http://www.coreboot.org/pipermail/coreboot/2012-March/068553.html
now the board starts with coreboot, but very often coreboot hangs.
It is very crazy. Sometimes the board starts three or fourtimes without
problems, and sometimes I have to push very often the power button to
get it start.
There are many selfmade debug lines in the code at the moment and it
seems to work better, now.
Mainboard tree is BCOM/winnetp680
in romstage.c The main loop calls ddr_ram_setup() in
src/northbridge/via/cn700/raminit.c
This function calls c7_cpu_setup() in the same file first.
Normaly a few registers should set now with
pci_write_config8() but nothing happens.
If coreboot hangs the first pci_write_config8() function isn`t done.
static void c7_cpu_setup(device_t dev)
{
--> A debug line here says the function is entered
/* Host bus interface registers (D0F2 0x50-0x67) */
/* Request phase control */
pci_write_config8(dev, 0x50, 0x88); <-- Debug in pci_ops.c
says nothing happens
/* CPU Interface Control */
pci_write_config8(dev, 0x51, 0x7a);
pci_write_config8(dev, 0x52, 0x6f);
/* Arbitration */
pci_write_config8(dev, 0x53, 0x88);
Can anybody help. I can`t find the CN700 Datasheet is the CX700 close to
CN700. What could be the reason for this problem. Timing issues?
pci_ops.c get_pbus don`t find the cpu on the bus?
With the many debug coreboot is slower than factory bios.
With Console Debug set to 0 the board don't starts.
Mainboard Winnet G270 Ver. 0.3
C7 Via Esther CPU 600MHz
CN700 Northbridge
VT8237R+ Southbridge
W83697HF SuperIO
1x DVI
1x VGA
1x COM (Second Pinheader for COM2 not soldered)
1x LPT
1x 100/10 RJ54 Network
2x Audio (Mic/Line)
1x CF-Card Slot IDE1 on board
1x 44 Pin Header for 2,5" HDD IDE1
256MB SO-DIMM DDR2 533MHz
chris