coreboot March 2012

coreboot@coreboot.org

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718 discussions

Re: [coreboot] GSoC 2012
by Peter Stuge 17 Mar '12

17 Mar '12

Marc Jones wrote: > coreboot was not selected to participate in GSoC 2012. This is > disappointing new for the project. I do not know why we were not > selected this year. I will attend the post selection meeting to see > what we can do to improve our chances of selection next year. I'd love to hear what they say. > Students, thank you for your interest in coreboot. We are happy > that you are engaging with our community. I hope that you continue > exploring your interest in coreboot. Please let us know what we can > do to assist you in your learning. Yes, even if coreboot isn't participating in GSoC this year we're still happy to help anyone who is interested in joining the project! > Feel free to send me questions, comments, or concerns. Thanks for working on this! //Peter

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GSoC 2012
by Marc Jones 17 Mar '12

17 Mar '12

coreboot was not selected to participate in GSoC 2012. This is disappointing new for the project. I do not know why we were not selected this year. I will attend the post selection meeting to see what we can do to improve our chances of selection next year. Students, thank you for your interest in coreboot. We are happy that you are engaging with our community. I hope that you continue exploring your interest in coreboot. Please let us know what we can do to assist you in your learning. Feel free to send me questions, comments, or concerns. Regards, Marc http://google-opensource.blogspot.com/ -- http://se-eng.com

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Patch merged into coreboot/master: f92871b Another indirection for normal/fallback bootblock
by gerrit＠coreboot.org 17 Mar '12

17 Mar '12

the following patch was just integrated into master: commit f92871b7ea66f9bbce81bbc08734cae2adbf0969 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Jan 7 19:15:43 2012 +0100 Another indirection for normal/fallback bootblock Provide a way to redefine the names of normal and fallback via CBFS. This way updates can use some more expressive naming scheme (numbers, dates, version numbers) and replace the coreboot-stages file to point to the new version (with the current version as new "old"). If coreboot-stages doesn't exist, the default behaviour remains to use "normal" and "fallback". Change-Id: I77c134d79ed95831ad5098b7663c15e95d3b5a2a Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Mar 17 12:07:38 2012, giving +2 See http://review.coreboot.org/589 for details. -gerrit

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Patch set updated for coreboot: c9a9acb Auto-generate bootblock initialisation
by Kyösti Mälkki 17 Mar '12

17 Mar '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/473 -gerrit commit c9a9acb7e880348840775b040123ba153d8c9a34 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Mar 16 18:10:10 2012 +0200 Auto-generate bootblock initialisation A new init function called from bootblock is declared as: - unsigned long init_mainboard(int bsp_cpu) For BSP CPU bootblock calls init_mainboard(true). For AP CPUs bootblock calls init_mainboard(false). Usually AP CPU has nothing to do here. By default, build toolchain creates and includes an init_mainboard() function in file build/mainboard/x/x/bootblock_autogen.h that executes init functions from any bootblock.c files for all chips listed in mainboard/devtree.cb. Alternatively a mainboard/x/x/bootblock.c file is added in the bootblock build, if a Kconfig option HAS_MAINBOARD_BOOTBLOCK is set. One should copy the auto-generated init_mainboard() to this file, and optionally read various bootstrap signals or status bits from super-io and southbridge component to gain some control over the selection of romstage to boot via the return value. Samples of such (yet not implemented) controls for boot behaviour: - Reset CMOS to defaults on user request (jumper). - Use fallback prefix after power-button 4s override. - Refuse boot after intruder detection. - On remote wakeup, request network boot. Change-Id: Ib1d101cdd68993530c9c7a653ac000a01de52ac2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/Kconfig | 7 ++----- src/arch/x86/Makefile.inc | 11 ++++++++--- src/arch/x86/include/bootblock_common.h | 17 +---------------- src/arch/x86/init/bootblock_normal.c | 8 ++++---- src/arch/x86/init/bootblock_simple.c | 10 +++++----- src/mainboard/hp/dl165_g6_fam10/Kconfig | 5 +---- src/mainboard/hp/dl165_g6_fam10/bootblock.c | 10 +++++++++- src/northbridge/amd/amdfam10/Kconfig | 4 ---- src/northbridge/amd/amdk8/Kconfig | 4 ---- src/southbridge/amd/amd8111/Kconfig | 4 ---- src/southbridge/amd/cimx/sb700/Kconfig | 3 --- src/southbridge/amd/cimx/sb800/Kconfig | 3 --- src/southbridge/amd/cimx/sb900/Kconfig | 3 --- src/southbridge/amd/sb600/Kconfig | 3 --- src/southbridge/amd/sb700/Kconfig | 4 ---- src/southbridge/amd/sb800/Kconfig | 5 ----- src/southbridge/broadcom/bcm5785/Kconfig | 4 ---- src/southbridge/intel/i82371eb/Kconfig | 5 ----- src/southbridge/intel/i82801gx/Kconfig | 5 ----- src/southbridge/nvidia/ck804/Kconfig | 4 ---- src/southbridge/nvidia/mcp55/Kconfig | 4 ---- src/southbridge/sis/sis966/Kconfig | 4 ---- src/southbridge/via/vt8237r/Kconfig | 4 ---- 23 files changed, 30 insertions(+), 101 deletions(-) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index c5a0c0e..c9f2643 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -67,8 +67,8 @@ config PC80_SYSTEM bool default y -config BOOTBLOCK_NORTHBRIDGE_INIT - string +config HAS_MAINBOARD_BOOTBLOCK + def_bool n config HAVE_CMOS_DEFAULT def_bool n @@ -77,9 +77,6 @@ config CMOS_DEFAULT_FILE string depends on HAVE_CMOS_DEFAULT -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - config BIG_ENDIAN bool default n diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index d3dac11..ff6d692 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -324,11 +324,16 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S $(obj @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) +$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(obj)/mainboard/$(MAINBOARDDIR)/bootblock_autogen.h $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \ + $(CC) $(INCLUDES) -I$(@D) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \ $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) -I$(@D) $< -o $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/bootblock_autogen.h: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb $(objutil)/sconfig/sconfig + @printf " SCONFIG $(subst $(src)/,,$(<)) (bootblock)\n" + mkdir -p $(@D) + $(objutil)/sconfig/sconfig $(MAINBOARDDIR) $(@D) -b $(@F) $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h index bd19682..69ab22c 100644 --- a/src/arch/x86/include/bootblock_common.h +++ b/src/arch/x86/include/bootblock_common.h @@ -1,22 +1,7 @@ #include <cpu/x86/lapic/boot_cpu.c> -#ifdef CONFIG_BOOTBLOCK_CPU_INIT -#include CONFIG_BOOTBLOCK_CPU_INIT -#else -static void bootblock_cpu_init(void) { } -#endif -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#else -static void bootblock_northbridge_init(void) { } -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#else -static void bootblock_southbridge_init(void) { } -#endif - #include <arch/cbfs.h> +#include "bootblock_autogen.h" #if CONFIG_USE_OPTION_TABLE #include <pc80/mc146818rtc.h> diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c index f8ae13b..48b4131 100644 --- a/src/arch/x86/init/bootblock_normal.c +++ b/src/arch/x86/init/bootblock_normal.c @@ -4,13 +4,13 @@ static void main(unsigned long bist) { unsigned long entry; + int bsp_cpu = boot_cpu(); int boot_mode; - if (boot_cpu()) { - bootblock_northbridge_init(); - bootblock_southbridge_init(); - bootblock_cpu_init(); + /* Mainboard-specific early init. */ + init_mainboard(bsp_cpu); + if (bsp_cpu) { #if CONFIG_USE_OPTION_TABLE sanitize_cmos(); #endif diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c index 41f73b4..f4e4bbf 100644 --- a/src/arch/x86/init/bootblock_simple.c +++ b/src/arch/x86/init/bootblock_simple.c @@ -2,15 +2,15 @@ static void main(unsigned long bist) { - if (boot_cpu()) { - bootblock_northbridge_init(); - bootblock_southbridge_init(); - bootblock_cpu_init(); + int bsp_cpu = boot_cpu(); + + /* Mainboard-specific early init. */ + init_mainboard(bsp_cpu); #if CONFIG_USE_OPTION_TABLE + if (bsp_cpu) sanitize_cmos(); #endif - } const char* target1 = "fallback/romstage"; unsigned long entry; diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig index cdff24f..547cc21 100644 --- a/src/mainboard/hp/dl165_g6_fam10/Kconfig +++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig @@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_BUS_CONFIG select HAVE_PIRQ_TABLE select HAVE_MP_TABLE + select HAS_MAINBOARD_BOOTBLOCK select LIFT_BSP_APIC_ID select BOARD_ROMSIZE_KB_1024 select RAMINIT_SYSINFO @@ -90,10 +91,6 @@ config HEAP_SIZE hex default 0xc0000 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "mainboard/hp/dl165_g6_fam10/bootblock.c" - config MMCONF_SUPPORT_DEFAULT bool default y diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c b/src/mainboard/hp/dl165_g6_fam10/bootblock.c index 2c56c4c..dfece95 100644 --- a/src/mainboard/hp/dl165_g6_fam10/bootblock.c +++ b/src/mainboard/hp/dl165_g6_fam10/bootblock.c @@ -18,6 +18,9 @@ static inline void shc4307_exit_ext_func_mode(device_t dev) #define DBG_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0x3) #define REGS_DEV PNP_DEV(SCH4307_CONFIG_PORT, 0xa) +/* FIXME: This appears to be a super-io initialisation, + * placed in the mainboard directory. + */ void shc4307_init(void) { shc4307_enter_ext_func_mode(CMOS_DEV); @@ -43,6 +46,11 @@ void shc4307_init(void) shc4307_exit_ext_func_mode(CMOS_DEV); } -static void bootblock_southbridge_init(void) { +static unsigned long init_mainboard(int bsp_cpu) +{ + if (!bsp_cpu) return 0; + bootblock_northbridge_init(); + //bootblock_southbridge_init(); shc4307_init(); + return 0; } diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index a14339e..633d378 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -59,10 +59,6 @@ config MMCONF_BUS_NUMBER int default 256 -config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdfam10/bootblock.c" - config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 70e75e9..b94ef42 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -51,10 +51,6 @@ config HW_MEM_HOLE_SIZE_AUTO_INC bool default n -config BOOTBLOCK_NORTHBRIDGE_INIT - string - default "northbridge/amd/amdk8/bootblock.c" - config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig index fd244c8..03d0f29 100644 --- a/src/southbridge/amd/amd8111/Kconfig +++ b/src/southbridge/amd/amd8111/Kconfig @@ -22,7 +22,3 @@ config SOUTHBRIDGE_AMD_AMD8111 select IOAPIC select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/amd8111/bootblock.c" - depends on SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index 27338fc..ea5adf3 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -47,9 +47,6 @@ config ACPI_SCI_IRQ default 0x9 help Set SCI IRQ to 9. -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb700/bootblock.c" config REDIRECT_SBCIMX_TRACE_TO_SERIAL bool "Redirect AMD Southbridge CIMX Trace to serial console" diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 79624e0..fc15c42 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_CIMX_SB800 select AMD_SB_CIMX if SOUTHBRIDGE_AMD_CIMX_SB800 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb800/bootblock.c" config ENABLE_IDE_COMBINED_MODE bool "Enable SATA IDE combined mode" diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index 253d73f..09edd1b 100755 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -49,8 +49,5 @@ config ACPI_SCI_IRQ help Set SCI IRQ to 9. -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/cimx/sb900/bootblock.c" endif #SOUTHBRIDGE_AMD_CIMX_SB900 diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig index 8ec3967..d440212 100644 --- a/src/southbridge/amd/sb600/Kconfig +++ b/src/southbridge/amd/sb600/Kconfig @@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_SB600 select HAVE_HARD_RESET if SOUTHBRIDGE_AMD_SB600 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb600/bootblock.c" config EHCI_BAR hex diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig index 924e2df..b4c95c9 100644 --- a/src/southbridge/amd/sb700/Kconfig +++ b/src/southbridge/amd/sb700/Kconfig @@ -33,10 +33,6 @@ config SOUTHBRIDGE_AMD_SUBTYPE_SP5100 bool default n -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb700/bootblock.c" - config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT bool default n diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig index 592f9a7..5490c56 100644 --- a/src/southbridge/amd/sb800/Kconfig +++ b/src/southbridge/amd/sb800/Kconfig @@ -23,11 +23,6 @@ config SOUTHBRIDGE_AMD_SB800 select HAVE_USBDEBUG select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/amd/sb800/bootblock.c" - depends on SOUTHBRIDGE_AMD_SB800 - config SOUTHBRIDGE_AMD_SB800_SKIP_ISA_DMA_INIT bool default n diff --git a/src/southbridge/broadcom/bcm5785/Kconfig b/src/southbridge/broadcom/bcm5785/Kconfig index d72afd8..286c19b 100644 --- a/src/southbridge/broadcom/bcm5785/Kconfig +++ b/src/southbridge/broadcom/bcm5785/Kconfig @@ -2,7 +2,3 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/broadcom/bcm5785/bootblock.c" - depends on SOUTHBRIDGE_BROADCOM_BCM5785 diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index 7e5109a..a5c5eb8 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -2,8 +2,3 @@ config SOUTHBRIDGE_INTEL_I82371EB bool select HAVE_ACPI_RESUME if HAVE_ACPI_TABLES -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/intel/i82371eb/bootblock.c" - depends on SOUTHBRIDGE_INTEL_I82371EB - diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 3550954..a50e0b1 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -38,10 +38,5 @@ config USBDEBUG_DEFAULT_PORT int default 1 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/intel/i82801gx/bootblock.c" - depends on SOUTHBRIDGE_INTEL_I82801GX - endif diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig index 97927d7..4405ad8 100644 --- a/src/southbridge/nvidia/ck804/Kconfig +++ b/src/southbridge/nvidia/ck804/Kconfig @@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_CK804 if SOUTHBRIDGE_NVIDIA_CK804 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/nvidia/ck804/bootblock.c" - config EHCI_BAR hex default 0xfef00000 diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index cd6009d..2c29267 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_MCP55 if SOUTHBRIDGE_NVIDIA_MCP55 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/nvidia/mcp55/bootblock.c" - config EHCI_BAR hex default 0xfef00000 diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index 03dd6b1..4ae16c6 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -4,10 +4,6 @@ config SOUTHBRIDGE_SIS_SIS966 select HAVE_USBDEBUG select HAVE_HARD_RESET -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966 - config EHCI_BAR hex default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966 diff --git a/src/southbridge/via/vt8237r/Kconfig b/src/southbridge/via/vt8237r/Kconfig index d0a6deb..9aa1b97 100644 --- a/src/southbridge/via/vt8237r/Kconfig +++ b/src/southbridge/via/vt8237r/Kconfig @@ -27,7 +27,3 @@ config EPIA_VT8237R_INIT default n depends on SOUTHBRIDGE_VIA_VT8237R -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "southbridge/via/vt8237r/bootblock.c" - depends on SOUTHBRIDGE_VIA_VT8237R

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New patch to review for coreboot: 9c292cd Undo bootblock renaming in sconfig
by Kyösti Mälkki 17 Mar '12

17 Mar '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/799 -gerrit commit 9c292cd1e75804fc75904f30529da3a34707f11c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Mar 16 18:12:33 2012 +0200 Undo bootblock renaming in sconfig Change-Id: Iae26be8cefe7db11eeb8e62fce6f3b8bc9c1f4ed Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- util/sconfig/main.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 181be38..a55db26 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -581,7 +581,14 @@ int main(int argc, char** argv) { while (h->next) { h = h->next; translate_name(h->name, 0); +#if 0 fprintf(autogen, "\tinit_%s();\n", h->name); +#else + char *s = h->name; + while (*s && (*s != '_')) s++; + *s = 0; + fprintf(autogen, "\tbootblock_%s_init();\n", h->name); +#endif } fprintf(autogen, "\treturn 0;\n}\n");

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Patch merged into coreboot/master: b23d0dc Intel cpus: Include CAR from socket
by gerrit＠coreboot.org 17 Mar '12

17 Mar '12

the following patch was just integrated into master: commit b23d0dc51cc42e08152e63753ed7e87455f8dd16 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 13 13:38:27 2012 +0200 Intel cpus: Include CAR from socket It was not obvious which CAR was compiled in. Also build would fail if a socket included two models with both having an include for CAR. Change-Id: I000c2e24807c3d99347a43d120333c13fbf91af4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Mar 17 09:38:31 2012, giving +2 See http://review.coreboot.org/626 for details. -gerrit

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New patch to review for coreboot: 635885d gitconfig: Improve commit-msg hook
by Patrick Georgi 17 Mar '12

17 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/798 -gerrit commit 635885de98a5d784625f2cf14b02698ab2e9d1bf Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Wed Mar 7 09:30:03 2012 +0100 gitconfig: Improve commit-msg hook There was some corner case where commit-msg failed. Update to latest upstream version. Change-Id: I822d6c3f64728de7356401465e00575ac5af8196 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/gitconfig/commit-msg | 122 +++++++++++++++++++++++++------------------- 1 files changed, 69 insertions(+), 53 deletions(-) diff --git a/util/gitconfig/commit-msg b/util/gitconfig/commit-msg index 548f373..212ffb1 100755 --- a/util/gitconfig/commit-msg +++ b/util/gitconfig/commit-msg @@ -49,7 +49,25 @@ add_ChangeId() { # Solaris AWK is just too broken AWK=/usr/xpg4/bin/awk fi + + # How this works: + # - parse the commit message as (textLine+ blankLine*)* + # - assume textLine+ to be a footer until proven otherwise + # - exception: the first block is not footer (as it is the title) + # - read textLine+ into a variable + # - then count blankLines + # - once the next textLine appears, print textLine+ blankLine* as these + # aren't footer + # - in END, the last textLine+ block is available for footer parsing $AWK ' + BEGIN { + # while we start with the assumption that textLine+ + # is a footer, the first block is not. + isFooter = 0 + footerComment = 0 + blankLines = 0 + } + # Skip lines starting with "#" without any spaces before it. /^#/ { next } @@ -57,80 +75,78 @@ add_ChangeId() { # up to the end of the file, assuming it is only patch data. # If more than one line before the diff was empty, strip all but one. /^diff --git a/ { - if (blankLines > 1) { - blankLines = 1 - } + blankLines = 0 while (getline) { } next } - # Handle comments and continuations in tags ([foo: bar] etc) - (caught == 1) && /^[ []/ { - if (lines != "") { - lines = lines "\n" - } - lines = lines $0 + # Count blank lines outside footer comments + /^$/ && (footerComment == 0) { + blankLines++ next } - # Handle normal lines (ie. not starting with some tag like "Signed-off-by:"). - # If normal text appears after tags were "caught", handle them as normal text, too. - # Also count blank lines in blankLines. - !/^[a-zA-Z0-9-]+:/ || /^[a-zA-Z0-9-]+:\/\// { - if ($0 == "") { - blankLines++ - next - } else { - for (i = 0; i < blankLines; i++) { - print "" - } - blankLines = 0 - } - if (caught == 1) { - caught = 0 - print lines - lines = "" + # Catch footer comment + /^\[[a-zA-Z0-9-]+:/ && (isFooter == 1) { + footerComment = 1 + } + + /]$/ && (footerComment == 1) { + footerComment = 2 + } + + # We have a non-blank line after blank lines. Handle this. + (blankLines > 0) { + print lines + for (i = 0; i < blankLines; i++) { + print "" } - print $0 - next + + lines = "" + blankLines = 0 + isFooter = 1 + footerComment = 0 + } + + # Detect that the current block is not the footer + (footerComment == 0) && (!/^\[?[a-zA-Z0-9-]+:/ || /^[a-zA-Z0-9-]+:\/\//) { + isFooter = 0 } - # Handle tags. They are "caught" and collected in the "lines" variable { - caught = 1 + # We need this information about the current last comment line + if (footerComment == 2) { + footerComment = 0 + } if (lines != "") { lines = lines "\n"; } lines = lines $0 } - # Tag handling: - # If last line before tags was not blank, there were no tags. - # In that case, print everything, plus a blank line, followed by Change-Id. - # Otherwise there were tags. Look for the right place to inject Change-Id, - # by considering CHANGE_ID_AFTER. Tags listed in it (case insensitive) come first, + # Footer handling: + # If the last block is considered a footer, splice in the Change-Id at the + # right place. + # Look for the right place to inject Change-Id by considering + # CHANGE_ID_AFTER. Keys listed in it (case insensitive) come first, # then Change-Id, then everything else (eg. Signed-off-by:). + # + # Otherwise just print the last block, a new line and the Change-Id as a + # block of its own. END { unprinted = 1 - if (blankLines == 0) { - if (lines == "") { - print "" - } else { - print lines "\n" - } - } else { - for (i = 0; i < blankLines; i++) { - print "" - } - changeIdAfter = "^(" tolower("'"$CHANGE_ID_AFTER"'") "):" - numlines = split(lines, footer, "\n") - for (line = 1; line <= numlines; line++) { - if (unprinted && match(tolower(footer[line]), changeIdAfter) != 1) { - unprinted = 0 - print "Change-Id: I'"$id"'" - } - print footer[line] + if (isFooter == 0) { + print lines "\n" + lines = "" + } + changeIdAfter = "^(" tolower("'"$CHANGE_ID_AFTER"'") "):" + numlines = split(lines, footer, "\n") + for (line = 1; line <= numlines; line++) { + if (unprinted && match(tolower(footer[line]), changeIdAfter) != 1) { + unprinted = 0 + print "Change-Id: I'"$id"'" } + print footer[line] } if (unprinted) { print "Change-Id: I'"$id"'"

1 0

Patch set updated for coreboot: 00612df Replace ramtest pattern to assist in DIMM configuration
by Patrick Georgi 17 Mar '12

17 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/294 -gerrit commit 00612df5a95be99ea5f930d9c9cc1517ab9da23d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 17 08:09:14 2012 +0100 Replace ramtest pattern to assist in DIMM configuration This is developer's testtool. Output from a "rotate ones" -style pattern helps figure out how DIMM addresses are encoded or routed on a certain mainboard. Scattered test should cover every data and address lines on the memory bus, but is probably limited to the first bank of first DIMM. Change-Id: I533a7a873bcc434f99e7faed9dc9337d9ab64196 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> [pg: rebase] --- src/lib/ramtest.c | 185 +++++++++++++++++++++++++++-------------------------- 1 files changed, 94 insertions(+), 91 deletions(-) diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index e118062..3457210 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -47,100 +47,114 @@ static void phys_memory_barrier(void) #endif } -static void ram_fill(unsigned long start, unsigned long stop) +/** + * Rotate ones test pattern that access every bit on a 128bit wide + * memory bus. To test most address lines, addresses are scattered + * using 256B, 4kB and 64kB increments. + * + * @idx Index to test pattern (0=<idx<0x400) + * @addr Memory to access on @idx + * @value Value to write or read at @addr + */ +static inline void test_pattern(unsigned short int idx, + unsigned long *addr, unsigned long *value) { - unsigned long addr; - /* - * Fill. - */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); -#else - print_debug("DRAM fill: "); - print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); - print_debug("\n"); -#endif - for(addr = start; addr < stop ; addr += 4) { - /* Display address being filled */ - if (!(addr & 0xfffff)) { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); -#else - print_debug_hex32(addr); - print_debug(" \r"); -#endif - } - write_phys(addr, (u32)addr); - }; - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); -#else - print_debug_hex32(addr); - print_debug("\nDRAM filled\n"); -#endif + uint8_t j, k; + + k = (idx >> 8) + 1; + j = (idx >> 4) & 0x0f; + *addr = idx & 0x0f; + *addr |= j << (4*k); + *value = 0x01010101 << (j & 7); + if (j & 8) + *value = ~(*value); } -static int ram_verify_nodie(unsigned long start, unsigned long stop) +/** + * Simple write-read-verify memory test. See console debug output for + * any dislocated bytes. + * + * @start System memory offset, aligned to 128bytes + */ +static int ram_bitset_nodie(unsigned long start) { - unsigned long addr; - int i = 0; - /* - * Verify. - */ + unsigned long addr, value, value2; + unsigned short int idx; + unsigned char failed, failures; + uint8_t verbose = 0; + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); + printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); #else - print_debug("DRAM verify: "); + print_debug("DRAM bitset write: 0x"); print_debug_hex32(start); - print_debug_char('-'); - print_debug_hex32(stop); print_debug("\n"); #endif - for(addr = start; addr < stop ; addr += 4) { - unsigned long value; - /* Display address being tested */ - if (!(addr & 0xfffff)) { + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + write_phys(start + addr, value); + } + + /* Make sure we don't read before we wrote */ + phys_memory_barrier(); + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); + printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); #else - print_debug_hex32(addr); - print_debug(" \r"); + print_debug("DRAM bitset verify: 0x"); + print_debug_hex32(start); + print_debug("\n"); #endif - } - value = read_phys(addr); - if (value != addr) { - /* Display address with error */ + failures = 0; + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + value2 = read_phys(start + addr); + + failed = (value2 != value); + failures |= failed; + if (failed && !verbose) { #if !defined(__ROMCC__) - printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); + printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", + start + addr, value, value2); #else - print_err("Fail: @0x"); - print_err_hex32(addr); - print_err(" Read value=0x"); + print_err_hex32(start + addr); + print_err(" wr: 0x"); print_err_hex32(value); - print_err("\n"); + print_err(" rd: 0x"); + print_err_hex32(value2); + print_err(" FAIL\n"); #endif - i++; - if(i>256) { + } + if (verbose) { #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Aborting.\n"); -#else - print_debug("Aborting.\n"); -#endif - break; + if ((addr & 0x0f) == 0) + printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", + start + addr, value); + if (failed) + printk(BIOS_DEBUG, " %08lx!", value2); + else + printk(BIOS_DEBUG, " %08lx ", value2); + if ((addr & 0x0f) == 0xc) + printk(BIOS_DEBUG, "\n"); +#else + if ((addr & 0x0f) == 0) { + print_dbg_hex32(start + addr); + print_dbg(" wr: "); + print_dbg_hex32(value); + print_dbg(" rd: "); } + print_dbg_hex32(value2); + if (failed) + print_dbg("! "); + else + print_dbg(" "); + if ((addr & 0x0f) == 0xc) + print_dbg("\n"); +#endif } } - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx", addr); -#else - print_debug_hex32(addr); -#endif - - if (i) { + if (failures) { + post_code(0xea); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); #else @@ -168,18 +182,13 @@ void ram_check(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at: "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - if (ram_verify_nodie(start, stop)) + if (ram_bitset_nodie(start)) die("DRAM ERROR"); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); @@ -198,19 +207,14 @@ int ram_check_nodie(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at : "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - ret = ram_verify_nodie(start, stop); + ret = ram_bitset_nodie(start); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); #else @@ -248,4 +252,3 @@ void quick_ram_check(void) } phys_memory_barrier(); } -

1 0

Patch set updated for coreboot: c8f55f3 Replace ramtest pattern to assist in DIMM configuration
by Patrick Georgi 17 Mar '12

17 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/294 -gerrit commit c8f55f3e4687c2e3cfdb888753416519476686ed Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 17 08:09:14 2012 +0100 Replace ramtest pattern to assist in DIMM configuration This is developer's testtool. Output from a "rotate ones" -style pattern helps figure out how DIMM addresses are encoded or routed on a certain mainboard. Scattered test should cover every data and address lines on the memory bus, but is probably limited to the first bank of first DIMM. Change-Id: I533a7a873bcc434f99e7faed9dc9337d9ab64196 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> [pg: rebase] --- src/lib/ramtest.c | 185 +++++++++++++++++++++++++++-------------------------- 1 files changed, 94 insertions(+), 91 deletions(-) diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index e118062..0d4bc00 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -47,100 +47,114 @@ static void phys_memory_barrier(void) #endif } -static void ram_fill(unsigned long start, unsigned long stop) +/** + * Rotate ones test pattern that access every bit on a 128bit wide + * memory bus. To test most address lines, addresses are scattered + * using 256B, 4kB and 64kB increments. + * + * @idx Index to test pattern (0=<idx<0x400) + * @addr Memory to access on @idx + * @value Value to write or read at @addr + */ +static inline void test_pattern(unsigned short int idx, + unsigned long *addr, unsigned long *value) { - unsigned long addr; - /* - * Fill. - */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); -#else - print_debug("DRAM fill: "); - print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); - print_debug("\n"); -#endif - for(addr = start; addr < stop ; addr += 4) { - /* Display address being filled */ - if (!(addr & 0xfffff)) { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); -#else - print_debug_hex32(addr); - print_debug(" \r"); -#endif - } - write_phys(addr, (u32)addr); - }; - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); -#else - print_debug_hex32(addr); - print_debug("\nDRAM filled\n"); -#endif + uint8_t j, k; + + k = (idx >> 8) + 1; + j = (idx >> 4) & 0x0f; + *addr = idx & 0x0f; + *addr |= j << (4*k); + *value = 0x01010101 << (j & 7); + if (j & 8) + *value = ~(*value); } -static int ram_verify_nodie(unsigned long start, unsigned long stop) +/** + * Simple write-read-verify memory test. See console debug output for + * any dislocated bytes. + * + * @start System memory offset, aligned to 128bytes + */ +static int ram_bitset_nodie(unsigned long start) { - unsigned long addr; - int i = 0; - /* - * Verify. - */ + unsigned long addr, value, value2; + unsigned short int idx; + unsigned char failed, failures; + uint8_t verbose = 0; + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); + printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); #else - print_debug("DRAM verify: "); + print_debug("DRAM bitset write: 0x"); print_debug_hex32(start); - print_debug_char('-'); - print_debug_hex32(stop); print_debug("\n"); #endif - for(addr = start; addr < stop ; addr += 4) { - unsigned long value; - /* Display address being tested */ - if (!(addr & 0xfffff)) { + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + write_phys(start + addr, value); + } + + /* Make sure we don't read before we wrote */ + phys_memory_barrier(); + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); + printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); #else - print_debug_hex32(addr); - print_debug(" \r"); + print_debug("DRAM bitset verify: 0x"); + print_debug_hex32(start); + print_debug("\n"); #endif - } - value = read_phys(addr); - if (value != addr) { - /* Display address with error */ + failures = 0; + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + value2 = read_phys(start + addr); + + failed = (value2 != value); + failures |= failed; + if (failed && !verbose) { #if !defined(__ROMCC__) - printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); + printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", + start + addr, value, value2); #else - print_err("Fail: @0x"); - print_err_hex32(addr); - print_err(" Read value=0x"); + print_err_hex32(start + addr); + print_err(" wr: 0x"); print_err_hex32(value); - print_err("\n"); + print_err(" rd: 0x"); + print_err_hex32(value2); + print_err(" FAIL\n"); #endif - i++; - if(i>256) { + } + if (verbose) { #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Aborting.\n"); -#else - print_debug("Aborting.\n"); -#endif - break; + if ((addr & 0x0f) == 0) + printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", + start + addr, value); + if (failed) + printk(BIOS_DEBUG, " %08lx!", value2); + else + printk(BIOS_DEBUG, " %08lx ", value2); + if ((addr & 0x0f) == 0xc) + printk(BIOS_DEBUG, "\n"); +#else + if ((addr & 0x0f) == 0) { + print_dbg_hex32(start + addr); + print_dbg(" wr: "); + print_dbg_hex32(value); + print_dbg(" rd: "); } + print_dbg_hex32(value2); + if (failed) + print_dbg("! "); + else + print_dbg(" "); + if ((addr & 0x0f) == 0xc) + print_dbg("\n"); +#endif } } - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx", addr); -#else - print_debug_hex32(addr); -#endif - - if (i) { + if (failures) { + post_code(0xea); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); #else @@ -168,18 +182,13 @@ void ram_check(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at: "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - if (ram_verify_nodie(start, stop)) + if (ram_bitset_nodie(start)) die("DRAM ERROR"); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); @@ -198,19 +207,14 @@ int ram_check_nodie(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at : "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - ret = ram_verify_nodie(start, stop); + (void)ram_bitset_nodie(start); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); #else @@ -248,4 +252,3 @@ void quick_ram_check(void) } phys_memory_barrier(); } -

1 0

Patch set updated for coreboot: 8bf41a4 Replace ramtest pattern to assist in DIMM configuration
by Patrick Georgi 17 Mar '12

17 Mar '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/294 -gerrit commit 8bf41a4fb045471f66b8c71be7f3b66899992197 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Mar 17 08:09:14 2012 +0100 Replace ramtest pattern to assist in DIMM configuration This is developer's testtool. Output from a "rotate ones" -style pattern helps figure out how DIMM addresses are encoded or routed on a certain mainboard. Scattered test should cover every data and address lines on the memory bus, but is probably limited to the first bank of first DIMM. Change-Id: I533a7a873bcc434f99e7faed9dc9337d9ab64196 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> [pg: rebase] --- src/lib/ramtest.c | 185 +++++++++++++++++++++++++++-------------------------- 1 files changed, 94 insertions(+), 91 deletions(-) diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index e118062..cfea562 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -47,100 +47,114 @@ static void phys_memory_barrier(void) #endif } -static void ram_fill(unsigned long start, unsigned long stop) +/** + * Rotate ones test pattern that access every bit on a 128bit wide + * memory bus. To test most address lines, addresses are scattered + * using 256B, 4kB and 64kB increments. + * + * @idx Index to test pattern (0=<idx<0x400) + * @addr Memory to access on @idx + * @value Value to write or read at @addr + */ +static inline void test_pattern(unsigned short int idx, + unsigned long *addr, unsigned long *value) { - unsigned long addr; - /* - * Fill. - */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); -#else - print_debug("DRAM fill: "); - print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); - print_debug("\n"); -#endif - for(addr = start; addr < stop ; addr += 4) { - /* Display address being filled */ - if (!(addr & 0xfffff)) { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); -#else - print_debug_hex32(addr); - print_debug(" \r"); -#endif - } - write_phys(addr, (u32)addr); - }; - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); -#else - print_debug_hex32(addr); - print_debug("\nDRAM filled\n"); -#endif + uint8_t j, k; + + k = (idx >> 8) + 1; + j = (idx >> 4) & 0x0f; + *addr = idx & 0x0f; + *addr |= j << (4*k); + *value = 0x01010101 << (j & 7); + if (j & 8) + *value = ~(*value); } -static int ram_verify_nodie(unsigned long start, unsigned long stop) +/** + * Simple write-read-verify memory test. See console debug output for + * any dislocated bytes. + * + * @start System memory offset, aligned to 128bytes + */ +static int ram_bitset_nodie(unsigned long start) { - unsigned long addr; - int i = 0; - /* - * Verify. - */ + unsigned long addr, value, value2; + unsigned short int idx; + unsigned char failed, failures; + uint8_t verbose = 0; + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); + printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); #else - print_debug("DRAM verify: "); + print_debug("DRAM bitset write: 0x"); print_debug_hex32(start); - print_debug_char('-'); - print_debug_hex32(stop); print_debug("\n"); #endif - for(addr = start; addr < stop ; addr += 4) { - unsigned long value; - /* Display address being tested */ - if (!(addr & 0xfffff)) { + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + write_phys(start + addr, value); + } + + /* Make sure we don't read before we wrote */ + phys_memory_barrier(); + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); + printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); #else - print_debug_hex32(addr); - print_debug(" \r"); + print_debug("DRAM bitset verify: 0x"); + print_debug_hex32(start); + print_debug("\n"); #endif - } - value = read_phys(addr); - if (value != addr) { - /* Display address with error */ + failures = 0; + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + value2 = read_phys(start + addr); + + failed = (value2 != value); + failures |= failed; + if (failed && !verbose) { #if !defined(__ROMCC__) - printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); + printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", + start + addr, value, value2); #else - print_err("Fail: @0x"); - print_err_hex32(addr); - print_err(" Read value=0x"); + print_err_hex32(start + addr); + print_err(" wr: 0x"); print_err_hex32(value); - print_err("\n"); + print_err(" rd: 0x"); + print_err_hex32(value2); + print_err(" FAIL\n"); #endif - i++; - if(i>256) { + } + if (verbose) { #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Aborting.\n"); -#else - print_debug("Aborting.\n"); -#endif - break; + if ((addr & 0x0f) == 0) + printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", + start + addr, value); + if (failed) + printk(BIOS_DEBUG, " %08lx!", value2); + else + printk(BIOS_DEBUG, " %08lx ", value2); + if ((addr & 0x0f) == 0xc) + printk(BIOS_DEBUG, "\n"); +#else + if ((addr & 0x0f) == 0) { + print_dbg_hex32(start + addr); + print_dbg(" wr: "); + print_dbg_hex32(value); + print_dbg(" rd: "); } + print_dbg_hex32(value2); + if (failed) + print_dbg("! "); + else + print_dbg(" "); + if ((addr & 0x0f) == 0xc) + print_dbg("\n"); +#endif } } - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx", addr); -#else - print_debug_hex32(addr); -#endif - - if (i) { + if (failures) { + post_code(0xea); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); #else @@ -168,18 +182,13 @@ void ram_check(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at: "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - if (ram_verify_nodie(start, stop)) + if (ram_bitset_nodie(start)) die("DRAM ERROR"); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); @@ -198,19 +207,14 @@ int ram_check_nodie(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at : "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - ret = ram_verify_nodie(start, stop); + (void)ram_bitset(start); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); #else @@ -248,4 +252,3 @@ void quick_ram_check(void) } phys_memory_barrier(); } -

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coreboot March 2012