coreboot February 2012

coreboot@coreboot.org

34 participants
348 discussions

sony vaio (VPCS12X9E)
by Jan Berce 08 Feb '12

08 Feb '12

Hi I have seen your tutorial for gethering information and I have gether all I can except "*lspnp -vv > lspnp.log*" because I coundt find package for lspnp for my distro and "*msrtool > msrtool.log*" this one gives this "*Unable to detect a known target; can not decode any MSRs! (Use -t to force) Please send a report or patch to coreboot(a)coreboot.org. Thanks for your help!*" and even with "*-t*" it still gives the same problem. I have attached all other files and I hope they will be some help to you in your progress. If you need any more informations pleas tell me. Best Regards, Jan

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New patch to review for coreboot: 384c255 Remove no-op Makefiles under mainboard directory
by Kyösti Mälkki 07 Feb '12

07 Feb '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/612 -gerrit commit 384c255400a042a075692c71e33e3de5718ec6c0 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 7 23:50:17 2012 +0200 Remove no-op Makefiles under mainboard directory Patch removes following files: src/mainboard/amd/serengeti_cheetah/Makefile.inc src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc src/mainboard/broadcom/blast/Makefile.inc src/mainboard/hp/dl145_g1/Makefile.inc src/mainboard/msi/ms9282/Makefile.inc src/mainboard/supermicro/h8dme/Makefile.inc src/mainboard/tyan/s2881/Makefile.inc src/mainboard/tyan/s2892/Makefile.inc src/mainboard/via/epia-m700/Makefile.inc Change-Id: I020776313abff1772be38afc896af51ca5ab6453 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/amd/serengeti_cheetah/Makefile.inc | 19 -------------- .../amd/serengeti_cheetah_fam10/Makefile.inc | 19 -------------- src/mainboard/broadcom/blast/Makefile.inc | 3 -- src/mainboard/msi/ms9282/Makefile.inc | 19 -------------- src/mainboard/supermicro/h8dme/Makefile.inc | 20 --------------- src/mainboard/via/epia-m700/Makefile.inc | 26 -------------------- 6 files changed, 0 insertions(+), 106 deletions(-) diff --git a/src/mainboard/amd/serengeti_cheetah/Makefile.inc b/src/mainboard/amd/serengeti_cheetah/Makefile.inc deleted file mode 100644 index 1ba662e..0000000 --- a/src/mainboard/amd/serengeti_cheetah/Makefile.inc +++ /dev/null @@ -1,19 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2007-2008 coresystems GmbH -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc deleted file mode 100644 index 1ba662e..0000000 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc +++ /dev/null @@ -1,19 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2007-2008 coresystems GmbH -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - diff --git a/src/mainboard/broadcom/blast/Makefile.inc b/src/mainboard/broadcom/blast/Makefile.inc deleted file mode 100644 index 77fa6eb..0000000 --- a/src/mainboard/broadcom/blast/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ - -# Needed by irq_tables and mptable and acpi_tables. - diff --git a/src/mainboard/hp/dl145_g1/Makefile.inc b/src/mainboard/hp/dl145_g1/Makefile.inc deleted file mode 100644 index e69de29..0000000 diff --git a/src/mainboard/msi/ms9282/Makefile.inc b/src/mainboard/msi/ms9282/Makefile.inc deleted file mode 100644 index 1ba662e..0000000 --- a/src/mainboard/msi/ms9282/Makefile.inc +++ /dev/null @@ -1,19 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2007-2008 coresystems GmbH -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - diff --git a/src/mainboard/supermicro/h8dme/Makefile.inc b/src/mainboard/supermicro/h8dme/Makefile.inc deleted file mode 100644 index 71baa03..0000000 --- a/src/mainboard/supermicro/h8dme/Makefile.inc +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2007-2008 coresystems GmbH -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -# Needed by irq_tables and mptable and acpi_tables. diff --git a/src/mainboard/tyan/s2881/Makefile.inc b/src/mainboard/tyan/s2881/Makefile.inc deleted file mode 100644 index e69de29..0000000 diff --git a/src/mainboard/tyan/s2892/Makefile.inc b/src/mainboard/tyan/s2892/Makefile.inc deleted file mode 100644 index e69de29..0000000 diff --git a/src/mainboard/via/epia-m700/Makefile.inc b/src/mainboard/via/epia-m700/Makefile.inc deleted file mode 100644 index 0308491..0000000 --- a/src/mainboard/via/epia-m700/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2008 VIA Technologies, Inc. -## (Written by Aaron Lwe <aaron.lwe(a)gmail.com> for VIA) -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -# This code is unused and should be replaced by the generic resume code -# completely. If anyone works on wakeup for this chipset/board, delete -# wakeup.c when you are done. -# ramstage-y += wakeup.c -

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Patch merged into coreboot/master: 6ec51f8 romcc: kill gcc warnings and .gitignore generated files
by gerrit＠coreboot.org 07 Feb '12

07 Feb '12

the following patch was just integrated into master: commit 6ec51f82110a88ffd5443c5fa6b8aa9ebad357b9 Author: Bernhard Urban <lewurm(a)gmail.com> Date: Wed Feb 1 16:30:30 2012 +0100 romcc: kill gcc warnings and .gitignore generated files don't remove calls to `flatten()' and `correct_coalesce_conflicts()', since they (probably) have side effects. Change-Id: I78fc4163b3f5f1f5f3c5153f9559c22e11e8344d Signed-off-by: Bernhard Urban <lewurm(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Feb 1 16:50:03 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Tue Feb 7 22:34:41 2012, giving +2 See http://review.coreboot.org/605 for details. -gerrit

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Coreboot + SeaBIOS on GA-M52S-S3P?
by Ivan Shmakov 07 Feb '12

07 Feb '12

I wonder, did anyone try Coreboot and SeaBIOS on Gigabyte's GA-M52S-S3P? I'm mainly interested in booting Linux 2.6-based GNU system via GRUB 2 from a SATA HDD (with GPT), but I'd like to have other boot devices (floppy and DVD drives, USB Flash) and systems supported as well. One more issue is that the BIOS IC (labelled MX 25L4005AM2C) is soldered to the board. I wonder, what'd be the recovery procedure should the newly uploaded firmware fail to boot? TIA. The backstory is as follows. Suddenly, the vendor's BIOS has decided that it needs a backup. Without hesitation, it choose one of the HDD's attached, and wrote its copy there, reserving some 2113 sectors at its tail as a “Host Protected Area” (HPA.) Effectively, this has invalidated the drive's GPT, rendering the system unbootable. Seemingly, no data (apart from the backup GPT) was lost, but I'd like to avoid the surprises like this in the future. As I was unable to find the relevant BIOS configuration software for AwardBIOS, I'm now looking if I should abandon such a misbehaved variety of proprietary firmware completely for something free. -- FSF associate member #7257

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Patch merged into coreboot/master: 7ef5336 Don't loop infinitely long on serial comm failures
by gerrit＠coreboot.org 07 Feb '12

07 Feb '12

the following patch was just integrated into master: commit 7ef53364ae202363e4260ffc8e306a0ae10db0c6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 7 20:50:22 2012 +0200 Don't loop infinitely long on serial comm failures If serial uart (8250/16x50) takes abnormally long to respond, give up on logging to serial console and instead let the system boot. Also reference bit in LSR register with correct name. Change-Id: I3796efc3e8690425f04a130af4bc99541b64d335 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Feb 7 20:27:45 2012, giving +1 Reviewed-By: Peter Stuge <peter(a)stuge.se> at Tue Feb 7 20:37:20 2012, giving +2 See http://review.coreboot.org/611 for details. -gerrit

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New patch to review for coreboot: 7ef5336 Don't loop infinitely long on serial comm failures
by Kyösti Mälkki 07 Feb '12

07 Feb '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/611 -gerrit commit 7ef53364ae202363e4260ffc8e306a0ae10db0c6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 7 20:50:22 2012 +0200 Don't loop infinitely long on serial comm failures If serial uart (8250/16x50) takes abnormally long to respond, give up on logging to serial console and instead let the system boot. Also reference bit in LSR register with correct name. Change-Id: I3796efc3e8690425f04a130af4bc99541b64d335 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/uart8250.c | 31 ++++++++++++++++++++++--------- 1 files changed, 22 insertions(+), 9 deletions(-) diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index b224671..fe8ed70 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -29,21 +29,30 @@ /* Should support 8250, 16450, 16550, 16550A type UARTs */ +/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + * + * Estimated that inb() from UART takes 1 microsecond. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + static inline int uart8250_can_tx_byte(unsigned base_port) { - return inb(base_port + UART_LSR) & UART_MSR_DSR; + return inb(base_port + UART_LSR) & UART_LSR_THRE; } static inline void uart8250_wait_to_tx_byte(unsigned base_port) { - while(!uart8250_can_tx_byte(base_port)) - ; + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_tx_byte(base_port)); } static inline void uart8250_wait_until_sent(unsigned base_port) { - while(!(inb(base_port + UART_LSR) & UART_LSR_TEMT)) - ; + unsigned long int i = FIFO_TIMEOUT; + while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); } void uart8250_tx_byte(unsigned base_port, unsigned char data) @@ -64,9 +73,13 @@ int uart8250_can_rx_byte(unsigned base_port) unsigned char uart8250_rx_byte(unsigned base_port) { - while(!uart8250_can_rx_byte(base_port)) - ; - return inb(base_port + UART_RBR); + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_rx_byte(base_port)); + + if (i) + return inb(base_port + UART_RBR); + else + return 0x0; } void uart8250_init(unsigned base_port, unsigned divisor) @@ -83,7 +96,7 @@ void uart8250_init(unsigned base_port, unsigned divisor) /* DLAB on */ outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); - /* Set Baud Rate Divisor. 12 ==> 115200 Baud */ + /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ outb(divisor & 0xFF, base_port + UART_DLL); outb((divisor >> 8) & 0xFF, base_port + UART_DLM);

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Patch merged into coreboot/master: 3b31dca Delete hard-coded driver includes
by gerrit＠coreboot.org 07 Feb '12

07 Feb '12

the following patch was just integrated into master: commit 3b31dcaa10f1db54a1a2b15728011a47e789353f Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 7 14:59:07 2012 +0200 Delete hard-coded driver includes Driver components are conditionally included in the build using the Kconfig options. Change-Id: I05417ee263a5b82e947600482dfb68f7a3f52d58 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Feb 7 16:23:38 2012, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Tue Feb 7 19:42:41 2012, giving +2 See http://review.coreboot.org/610 for details. -gerrit

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Patch merged into coreboot/master: aa4428b libpayload: Remove workaround for bitfield management in EHCI driver
by gerrit＠coreboot.org 07 Feb '12

07 Feb '12

the following patch was just integrated into master: commit aa4428b722849dc772004d4d0ab10c035b00cf3c Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Jan 31 14:48:05 2012 +0100 libpayload: Remove workaround for bitfield management in EHCI driver We don't use bitfields anymore. Change-Id: I25ceec2024f659612871bcfe5f98df3a10789055 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/595 for details. -gerrit

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Patch merged into coreboot/master: 595df77 libpayload: Force checking all EHCI ports on power-on
by gerrit＠coreboot.org 07 Feb '12

07 Feb '12

the following patch was just integrated into master: commit 595df777bfaf2fc07a394233a6e770737b78806e Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Jan 31 14:42:47 2012 +0100 libpayload: Force checking all EHCI ports on power-on EHCI port status reporting isn't very consistent on power-on, so just looking for devices on all ports is the safest way to find everything. Change-Id: I26b4305016f0bed1d2c1b5cffc59d5813fa1cbbb Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/594 for details. -gerrit

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Re: [coreboot] How to port core boot
by Bari Ari 07 Feb '12

07 Feb '12

Ali, Here is what is going on here. Unless I missed a memo, coreboot is not a no cost course on learning how to program with 24hr free tech support. Initially I was under the impression that there might be a language barrier here. But after reading your attack on the developers in order to gain some negative attention I see that it's a personality issue. Most of the developers here have families, full time jobs and also work on several open source projects and might even sleep and eat meals as required. Several have spent decades working and studying to gain the experience that they now have but also see the value in sharing some of this for the common good of mankind. If somebody is replying to your novice level questions on how coreboot, C, gcc, memory controllers or x86 architecture works, be happy that somebody has decided to volunteer a small portion of their lifetime to this effort. Most of the answers to your questions are obvious to the experienced developers and most of the replies have hinted at *your need to gain more experience and knowledge* on all the topics I have mentioned earlier. The devs don't really have the time or desire to write lengthy tutorials on the subjects. You might be able to find a mentor though if you ask nicely. It also helps if you fund their time. Have you followed their advice? Have you gone back and worked with some much more simple programming projects to gain the experience necessary? Have you even shared your source code for review? -Bari On 02/07/2012 09:59 AM, ali hagigat wrote: > Rudolf, When i started to study Coreboot and BIOS , people always made > me confused by nonsense words. I asked some useful questions but > interpreted as simple.(now I have developed a project which can drive > RAM, serial port and hard disk) > > The managers of this project even do not accept their own mistakes. > Now FILO can not be compiled and when i report it as the README of the > filo is saying, the manager emails me and tells me that you are not a > programmer!! > > I thought i would be encouraged for that by a thank you. When i ask a > question nobody talks about the details of the logic behind that > except one person, Kyösti Mälkki. > > Hey folks, what is going on here? If you are a master of Coreboot why > we have unrelated simple answers? > > > On 2/7/12, Rudolf Marek<r.marek(a)assembler.cz> wrote: >> Hi, >> >>> DRAM range verified. >> Well the check is quite simple maybe it works for simple cases and fails for >> real usage. I guess you need to port something like >> http://pyropus.ca/software/memtester/ to ROMCC to romstage and try again. >> All >> it sounds like raminit problem. >> >> Also I don't like couple of things btw. You never showed any of your code. >> You >> only ask sometimes too simple question without bothering too much with them. >> Please try hard before asking and try to learn new stuff. You have chosen >> quite >> difficult area, maybe you should try some simpler stuff first to get in >> touch >> better with C and common toolchains and after that get back here in here. >> >> Thanks >> Rudolf >> >> >>> Done. >>> Loading image. >>> Searching for fallback/coreboot_ram >>> Check fallback/romstage >>> Check fallback/coreboot_ram >>> Stage: loading fallback/coreboot_ram @ 0x100000 (180224 bytes), entry @ >>> 0x100000 >>> Stage: done loading. >>> Jumping to image. >>> >>> >>> On Tue, Feb 7, 2012 at 3:07 AM, Rudolf Marek<r.marek(a)assembler.cz> wrote: >>>>> Seems there is a case or two of possible infinite while() loops within >>>>> the uart8250 serial console code. This is a wild guess, but the uart >>>> >>>> Yeah I dont like that too. Maybe worth to do a timeout? Or Loop count? It >>>> is >>>> always better to boot than to have perfect serial output ;) >>>> >>>> But in this case I would think memory is not 100% OK. Worth to check if >>>> 1M->3M is OK (this is where coreboot ramstage goes) >>>> >>>> Thanks >>>> Rudolf >>>> >>>> >>>> -- >>>> coreboot mailing list: coreboot(a)coreboot.org >>>> http://www.coreboot.org/mailman/listinfo/coreboot

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coreboot February 2012