coreboot February 2012

coreboot@coreboot.org

34 participants
348 discussions

Patch merged into coreboot/master: c0f82a7 lint: create two classes of tests, stable and dev
by gerrit＠coreboot.org 01 Mar '12

01 Mar '12

the following patch was just integrated into master: commit c0f82a75b480ad90d9b4eff48a1ebf08ef592aec Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Feb 25 19:42:59 2012 +0100 lint: create two classes of tests, stable and dev We have tests that pass (and should be enforced soonish) and those that don't pass yet (and thus shouldn't break the build). The plan is simple: As soon as a test passes, it's marked stable so things remain that way. "make lint" runs all tests, "make lint-stable" runs only those that shouldn't fail. Change-Id: Iaa85d71141606d9756e29b37c7a34c2a15e573ac Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/681 for details. -gerrit

1 0

Patch merged into coreboot/master: a4cc213 Fix lint test for build directories
by gerrit＠coreboot.org 01 Mar '12

01 Mar '12

the following patch was just integrated into master: commit a4cc21352ce28579466fe338dc4ee6ef3b4711e9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Feb 25 15:33:43 2012 +0100 Fix lint test for build directories config files are rename()d, which fails across filesystem borders. So force temporary config files in current directory. Change-Id: I583c2ab9a822a6f99f838778aa17ffd2d47eaed1 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/680 for details. -gerrit

1 0

Patch merged into coreboot/master: 20a9979 Drop support for BROKEN marker
by gerrit＠coreboot.org 01 Mar '12

01 Mar '12

the following patch was just integrated into master: commit 20a9979ad93bed52c457dc263d0fe30872c9406c Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Jan 10 19:25:23 2012 +0100 Drop support for BROKEN marker We used to support marking boards broken. We don't need that anymore. Change-Id: I9d21fdf22c9a8e0e69488fc7896f2a81bf629201 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/675 for details. -gerrit

1 0

Patch merged into coreboot/master: 448996a Rename vendor identifiers in Kconfig
by gerrit＠coreboot.org 01 Mar '12

01 Mar '12

the following patch was just integrated into master: commit 448996ad975da9f3d620a2e4feb1373d1c67dfd9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Jan 10 18:45:34 2012 +0100 Rename vendor identifiers in Kconfig Board identifiers use them without underscore, too. Unify that. Change-Id: I146384ef6dbe601ad131dada8224f43e6c18433d Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/674 for details. -gerrit

1 0

Patch merged into coreboot/master: dd17846 Fix x86 cpu_phys_address_size
by gerrit＠coreboot.org 29 Feb '12

29 Feb '12

the following patch was just integrated into master: commit dd17846e4422969c9915bd0d31ebb3769059f80a Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 29 21:17:18 2012 +0200 Fix x86 cpu_phys_address_size After CPUID, requested feature flag is in edx, not eax. Change-Id: I9ce27c22186f17cc64986be342d7d1ac78a79898 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Feb 29 20:37:31 2012, giving +1 Reviewed-By: Sven Schnelle <svens(a)stackframe.org> at Wed Feb 29 20:58:14 2012, giving +2 See http://review.coreboot.org/688 for details. -gerrit

1 0

New patch to review for coreboot: dd17846 Fix x86 cpu_phys_address_size
by Kyösti Mälkki 29 Feb '12

29 Feb '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/688 -gerrit commit dd17846e4422969c9915bd0d31ebb3769059f80a Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 29 21:17:18 2012 +0200 Fix x86 cpu_phys_address_size After CPUID, requested feature flag is in edx, not eax. Change-Id: I9ce27c22186f17cc64986be342d7d1ac78a79898 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/cpu.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/arch/x86/lib/cpu.c b/src/arch/x86/lib/cpu.c index ada57e2..8aacaac 100644 --- a/src/arch/x86/lib/cpu.c +++ b/src/arch/x86/lib/cpu.c @@ -147,7 +147,7 @@ int cpu_phys_address_size(void) if (cpu_cpuid_extended_level() >= 0x80000008) return cpuid_eax(0x80000008) & 0xff; - if (cpuid_eax(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36)) + if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36)) return 36; return 32; }

1 0

Patch merged into coreboot/master: ca83caf tint requires more heap space for PDCurses.
by gerrit＠coreboot.org 29 Feb '12

29 Feb '12

the following patch was just integrated into master: commit ca83caf03615a3ea7cbba7a9a19f6c3d63036793 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Tue Feb 28 17:18:58 2012 -0700 tint requires more heap space for PDCurses. tint was failing with the message "initscr(): Unable to create curscr." tint uses the initscr() to enable vga windows, which allocates more heap space with PDCurses than with tinycurses. Expanding the heap from 16KB to 64KB resolves the issue. Change-Id: I1d38651e2b77f55613969c29614fb3b2be38a00c Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Build-Tested: build bot (Jenkins) at Wed Feb 29 01:45:48 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Wed Feb 29 20:08:40 2012, giving +2 See http://review.coreboot.org/687 for details. -gerrit

1 0

Patch merged into coreboot/master: b2b6c53 AMD southbridge: remove sp5100
by gerrit＠coreboot.org 29 Feb '12

29 Feb '12

the following patch was just integrated into master: commit b2b6c535a1e8cdd5d39fc1a13267b14ac1fd2edb Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 23 18:42:55 2012 +0200 AMD southbridge: remove sp5100 Southbridge SP5100 support was compiled with SB700 code, but static device info structure would use sp5100/chip.h. To solve this drop support for separate chip sp5100 and adjust the relevant Kconfig options. Removes chip directory: src/southbridge/amd/sp5100/ Rename Kconfig option from: SOUTHBRIDGE_AMD_SP5100 to: SOUTHBRIDGE_AMD_SUBTYPE_SP5100 Change-Id: I873c6ad3624ee69165da6ab7287dfb7e006ee8e8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Build-Tested: build bot (Jenkins) at Sat Feb 25 13:47:54 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Wed Feb 29 01:42:11 2012, giving +2 See http://review.coreboot.org/679 for details. -gerrit

1 0

New patch to review for coreboot: ca83caf tint requires more heap space for PDCurses.
by Marc Jones 29 Feb '12

29 Feb '12

Marc Jones (marcj303(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/687 -gerrit commit ca83caf03615a3ea7cbba7a9a19f6c3d63036793 Author: Marc Jones <marc.jones(a)se-eng.com> Date: Tue Feb 28 17:18:58 2012 -0700 tint requires more heap space for PDCurses. tint was failing with the message "initscr(): Unable to create curscr." tint uses the initscr() to enable vga windows, which allocates more heap space with PDCurses than with tinycurses. Expanding the heap from 16KB to 64KB resolves the issue. Change-Id: I1d38651e2b77f55613969c29614fb3b2be38a00c Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> --- payloads/libpayload/lib/libpayload.ldscript | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/payloads/libpayload/lib/libpayload.ldscript b/payloads/libpayload/lib/libpayload.ldscript index 830a390..4925e86 100644 --- a/payloads/libpayload/lib/libpayload.ldscript +++ b/payloads/libpayload/lib/libpayload.ldscript @@ -34,7 +34,7 @@ OUTPUT_ARCH(i386) ENTRY(_entry) -HEAP_SIZE = 16384; +HEAP_SIZE = 65536; STACK_SIZE = 16384; SECTIONS

1 0

libpayload alloc() gcc 4.6.2 bug?
by Marc Jones 28 Feb '12

28 Feb '12

I think I found a bug in gcc 4.6.2 building libpayload (current coreboot crosstools). I would like to get confirmation that someone else sees this and that I haven't done something wrong. Please let me know if there is anything else I should try or post. I'm not sure how to address this. Comments welcome. I found this bug building tint with libpayload. libpayload is built with defconfig and using the same coreboot crosstools gcc. The bug happens in the first call to alloc() when the first header of the first region is installed. The header memory location is checked, found to be 0, and then loaded with the header. The bug is that the original value of the location is used after the memory was updated. It should have been reloaded. It is pretty easy to see in the disassembly below. The libpayload alloc function: static void *alloc(int len) { hdrtype_t header; void *ptr = hstart; /* Align the size. */ len = (len + 3) & ~3; if (!len || len > 0xffffff) return (void *)NULL; /* Make sure the region is setup correctly. */ if (!HAS_MAGIC(*((hdrtype_t *) ptr))) setup(); /* Find some free space. */ do { header = *((hdrtype_t *) ptr); int size = SIZE(header); if (!HAS_MAGIC(header) || size == 0) { <---- fails here due to *((hdrtype_t *) ptr) not being refreshed after memory changes printf("memory allocator panic. (%s%s)\n", !HAS_MAGIC(header) ? " no magic " : "", size == 0 ? " size=0 " : ""); The failing asm: 0010b7c0 <alloc>: 10b7c0: 56 push %esi 10b7c1: 53 push %ebx 10b7c2: 83 ec 14 sub $0x14,%esp 10b7c5: 8d 70 03 lea 0x3(%eax),%esi 10b7c8: 83 e6 fc and $0xfffffffc,%esi 10b7cb: 74 7c je 10b849 <alloc+0x89> 10b7cd: 81 fe ff ff ff 00 cmp $0xffffff,%esi 10b7d3: 7f 74 jg 10b849 <alloc+0x89> 10b7d5: a1 a0 5f 11 00 mov 0x115fa0,%eax <--- load alloc header into eax 10b7da: 89 c2 mov %eax,%edx <--- moves it to edx 10b7dc: 81 e2 00 00 00 a8 and $0xa8000000,%edx 10b7e2: 81 fa 00 00 00 a8 cmp $0xa8000000,%edx 10b7e8: 74 1d je 10b807 <alloc+0x47> 10b7ea: ba 9c 9f 11 00 mov $0x119f9c,%edx <--- setup() 10b7ef: 81 ea a0 5f 11 00 sub $0x115fa0,%edx 10b7f5: 81 e2 ff ff ff 00 and $0xffffff,%edx 10b7fb: 81 ca 00 00 00 aa or $0xaa000000,%edx 10b801: 89 15 a0 5f 11 00 mov %edx,0x115fa0 <--- memory write 10b807: ba a0 5f 11 00 mov $0x115fa0,%edx 10b80c: eb 04 jmp 10b812 <alloc+0x52> 10b80e: 66 90 xchg %ax,%ax 10b810: 8b 02 mov (%edx),%eax 10b812: 89 c1 mov %eax,%ecx <---- starts using eax, but the memory was changed and not reloaded 10b814: 81 e1 ff ff ff 00 and $0xffffff,%ecx This is a passing version built with the old toolchain (gcc 4.5.2): 0010b24c <alloc>: 10b24c: 55 push %ebp 10b24d: 89 e5 mov %esp,%ebp 10b24f: 56 push %esi 10b250: 53 push %ebx 10b251: 83 c0 03 add $0x3,%eax 10b254: 83 e0 fc and $0xfffffffc,%eax 10b257: 75 0b jne 10b264 <alloc+0x18> 10b259: 31 c0 xor %eax,%eax 10b25b: 8d 65 f8 lea -0x8(%ebp),%esp 10b25e: 5b pop %ebx 10b25f: 5e pop %esi 10b260: c9 leave 10b261: c3 ret 10b262: 66 90 xchg %ax,%ax 10b264: 3d ff ff ff 00 cmp $0xffffff,%eax 10b269: 7f ee jg 10b259 <alloc+0xd> 10b26b: 8b 15 00 14 11 00 mov 0x111400,%edx <--- loads alloc header into edx. 10b271: 89 d1 mov %edx,%ecx 10b273: 81 e1 00 00 00 a8 and $0xa8000000,%ecx 10b279: 81 f9 00 00 00 a8 cmp $0xa8000000,%ecx 10b27f: 74 1f je 10b2a0 <alloc+0x54> 10b281: ba 00 14 11 00 mov $0x111400,%edx <--- setup() 10b286: f7 da neg %edx 10b288: 81 c2 fc 53 11 00 add $0x1153fc,%edx 10b28e: 81 e2 ff ff ff 00 and $0xffffff,%edx 10b294: 81 ca 00 00 00 aa or $0xaa000000,%edx 10b29a: 89 15 00 14 11 00 mov %edx,0x111400 <--- memory updated and still in edx 10b2a0: b9 00 14 11 00 mov $0x111400,%ecx 10b2a5: eb 03 jmp 10b2aa <alloc+0x5e> 10b2a7: 90 nop 10b2a8: 8b 11 mov (%ecx),%edx 10b2aa: 89 d3 mov %edx,%ebx <--- edx has correct value My failing gcc version: $ /i386-elf-gcc -v Using built-in specs. COLLECT_GCC=/home/marc/git/coreboot2/payloads/tint-0.03b/./../../util/crossgcc/xgcc/bin/i386-elf-gcc COLLECT_LTO_WRAPPER=/home/marc/devel/coreboot/util/crossgcc/xgcc/lib/gcc/i386-elf/4.6.2/lto-wrapper Target: i386-elf Configured with: ../gcc-4.6.2/configure --enable-multilib=yes --prefix=/home/marc/devel/coreboot/util/crossgcc/xgcc --libexecdir=/home/marc/devel/coreboot/util/crossgcc/xgcc/lib --target=i386-elf --disable-werror --disable-shared --disable-libssp --disable-bootstrap --disable-nls --disable-libquadmath --with-newlib --enable-lto --enable-languages=c --with-gmp=/home/marc/devel/coreboot/util/crossgcc/xgcc --with-mpfr=/home/marc/devel/coreboot/util/crossgcc/xgcc --with-mpc=/home/marc/devel/coreboot/util/crossgcc/xgcc --with-libelf=/home/marc/devel/coreboot/util/crossgcc/xgcc --with-pkgversion='coreboot toolchain v1.07 November 1st, 2011' Thread model: single gcc version 4.6.2 (coreboot toolchain v1.07 November 1st, 2011) tint.elf and objdump -D files attached. My git repo if you would like try this exact code: git://git.se-eng.com/coreboot.git Questions or comments? Marc -- http://se-eng.com

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot February 2012