coreboot February 2012

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Trac reminder: list of new ticket(s)
by coreboot tracker 27 Feb '12

27 Feb '12

1 0

New patch to review for coreboot: 03df38b VIA southbridge K8T890: Apply un-written naming rules
by Kyösti Mälkki 26 Feb '12

26 Feb '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/685 -gerrit commit 03df38b15cd14ba6d08a206918416ca6be01bb06 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 25 17:14:20 2012 +0200 VIA southbridge K8T890: Apply un-written naming rules Use separate Kconfig option to select a driver directory for build and the specific type of southbridge to support. Change-Id: I9482d4ea0f0234b9b7ff38144e45022ab95cf3f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/asus/a8v-e_deluxe/Kconfig | 1 + src/mainboard/asus/a8v-e_se/Kconfig | 1 + src/mainboard/asus/k8v-x/Kconfig | 3 +- src/mainboard/asus/m2v-mx_se/Kconfig | 3 +- src/mainboard/asus/m2v/Kconfig | 1 + src/northbridge/amd/amdk8/incoherent_ht.c | 4 +- src/southbridge/via/Makefile.inc | 6 +---- src/southbridge/via/k8t890/Kconfig | 32 +++++++++++++++------------- src/southbridge/via/k8t890/bridge.c | 4 +- src/southbridge/via/k8t890/ctrl.c | 8 +++--- src/southbridge/via/k8t890/early_car.c | 16 +++++++------- src/southbridge/via/k8t890/romstrap.inc | 6 ++-- src/southbridge/via/vt8237r/lpc.c | 2 +- 13 files changed, 45 insertions(+), 42 deletions(-) diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig index 05408ca..96260bc 100644 --- a/src/mainboard/asus/a8v-e_deluxe/Kconfig +++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8T890 + select SOUTHBRIDGE_VIA_SUBTYPE_K8T890 select SUPERIO_WINBOND_W83627EHG select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig index 4975cfa..80efbf6 100644 --- a/src/mainboard/asus/a8v-e_se/Kconfig +++ b/src/mainboard/asus/a8v-e_se/Kconfig @@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8T890 + select SOUTHBRIDGE_VIA_SUBTYPE_K8T890 select SUPERIO_WINBOND_W83627EHG select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig index 114c609..ff11218 100644 --- a/src/mainboard/asus/k8v-x/Kconfig +++ b/src/mainboard/asus/k8v-x/Kconfig @@ -7,7 +7,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_VIA_VT8237R - select SOUTHBRIDGE_VIA_K8T800_OLD + select SOUTHBRIDGE_VIA_K8T890 + select SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD select SUPERIO_WINBOND_W83697HF select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig index 6434306..72fa803 100644 --- a/src/mainboard/asus/m2v-mx_se/Kconfig +++ b/src/mainboard/asus/m2v-mx_se/Kconfig @@ -26,7 +26,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_VIA_VT8237R - select SOUTHBRIDGE_VIA_K8M890 + select SOUTHBRIDGE_VIA_K8T890 + select SOUTHBRIDGE_VIA_SUBTYPE_K8M890 select SUPERIO_ITE_IT8712F select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig index 747c273..731e0de 100644 --- a/src/mainboard/asus/m2v/Kconfig +++ b/src/mainboard/asus/m2v/Kconfig @@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX select SOUTHBRIDGE_VIA_VT8237R select SOUTHBRIDGE_VIA_K8T890 + select SOUTHBRIDGE_VIA_SUBTYPE_K8T890 select SUPERIO_ITE_IT8712F select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c index a14adac..f57eb5b 100644 --- a/src/northbridge/amd/amdk8/incoherent_ht.c +++ b/src/northbridge/amd/amdk8/incoherent_ht.c @@ -149,10 +149,10 @@ static uint16_t ht_read_freq_cap(device_t dev, uint8_t pos) printk(BIOS_SPEW, "pos=0x%x, filtered freq_cap=0x%x\n", pos, freq_cap); - #if CONFIG_SOUTHBRIDGE_VIA_K8M890 == 1 +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890 == 1 freq_cap &= 0x3f; printk(BIOS_INFO, "Limiting HT to 800/600/400/200 MHz until K8M890 HT1000 is fixed.\n"); - #endif +#endif return freq_cap; } diff --git a/src/southbridge/via/Makefile.inc b/src/southbridge/via/Makefile.inc index 3c0160a..8bc9296 100644 --- a/src/southbridge/via/Makefile.inc +++ b/src/southbridge/via/Makefile.inc @@ -1,9 +1,5 @@ -subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD) += k8t890 # lspci lists B188 and 3188 -subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800) += k8t890 # lspci lists 0282, 1282, 2282, 3282, and 7282 -subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T800PRO) += k8t890 # lspci lists 0282, 1282, 2282, 3282, and 7282 -subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8M800) += k8t890 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8T890) += k8t890 -subdirs-$(CONFIG_SOUTHBRIDGE_VIA_K8M890) += k8t890 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8231) += vt8231 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8235) += vt8235 subdirs-$(CONFIG_SOUTHBRIDGE_VIA_VT8237R) += vt8237r + diff --git a/src/southbridge/via/k8t890/Kconfig b/src/southbridge/via/k8t890/Kconfig index b23b84a..f6e51dc 100644 --- a/src/southbridge/via/k8t890/Kconfig +++ b/src/southbridge/via/k8t890/Kconfig @@ -1,25 +1,26 @@ -config SOUTHBRIDGE_VIA_K8M800 #K8M800 not tested - bool - -config SOUTHBRIDGE_VIA_K8T800_OLD # not tested - bool - -config SOUTHBRIDGE_VIA_K8T800 - bool - -config SOUTHBRIDGE_VIA_K8T800PRO - bool - -config SOUTHBRIDGE_VIA_K8M890 - bool config SOUTHBRIDGE_VIA_K8T890 bool +if SOUTHBRIDGE_VIA_K8T890 + +config SOUTHBRIDGE_VIA_SUBTYPE_K8M800 # not tested + def_bool n +config SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD # not tested, lspci lists B188 and 3188 + def_bool n +config SOUTHBRIDGE_VIA_SUBTYPE_K8T800 # lspci lists 0282, 1282, 2282, 3282, and 7282 + def_bool n +config SOUTHBRIDGE_VIA_SUBTYPE_K8T800PRO # lspci lists 0282, 1282, 2282, 3282, and 7282 + def_bool n +config SOUTHBRIDGE_VIA_SUBTYPE_K8M890 + def_bool n +config SOUTHBRIDGE_VIA_SUBTYPE_K8T890 + def_bool n + config SOUTHBRIDGE_VIA_K8M890_VGA_EN bool "Enable onboard K8M890 graphics" default y - depends on SOUTHBRIDGE_VIA_K8M890 + depends on SOUTHBRIDGE_VIA_SUBTYPE_K8M890 select VGA select GFXUMA @@ -50,3 +51,4 @@ config VIDEO_MB default -1 if K8M890_VIDEO_MB_CMOS depends on SOUTHBRIDGE_VIA_K8M890_VGA_EN +endif # SOUTHBRIDGE_K8T890 diff --git a/src/southbridge/via/k8t890/bridge.c b/src/southbridge/via/k8t890/bridge.c index ecfdc35..5e5287e 100644 --- a/src/southbridge/via/k8t890/bridge.c +++ b/src/southbridge/via/k8t890/bridge.c @@ -33,7 +33,7 @@ static void bridge_enable(struct device *dev) writeback(dev, 0x40, 0x91); writeback(dev, 0x41, 0x40); writeback(dev, 0x43, 0x44); -#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD writeback(dev, 0x42, 0x80); writeback(dev, 0x44, 0x35); #else @@ -49,7 +49,7 @@ static void bridge_enable(struct device *dev) * (Forward VGA compatible memory and I/O cycles ) */ -#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD writeback(dev, 0x3e, 0x0a); #else writeback(dev, 0x3e, 0x16); diff --git a/src/southbridge/via/k8t890/ctrl.c b/src/southbridge/via/k8t890/ctrl.c index 1ff0b74..fc851f8 100644 --- a/src/southbridge/via/k8t890/ctrl.c +++ b/src/southbridge/via/k8t890/ctrl.c @@ -51,11 +51,11 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb) pci_write_config8(dev, 0x70, 0xc2); /* PCI Control */ -#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD pci_write_config8(dev, 0x72, 0xee); #endif pci_write_config8(dev, 0x73, 0x01); -#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD pci_write_config8(dev, 0x74, 0x64); pci_write_config8(dev, 0x75, 0x3f); #else @@ -63,7 +63,7 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb) pci_write_config8(dev, 0x75, 0x0f); #endif pci_write_config8(dev, 0x76, 0x50); -#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD pci_write_config8(dev, 0x77, 0x08); #endif pci_write_config8(dev, 0x78, 0x01); @@ -160,7 +160,7 @@ static void ctrl_init(struct device *dev) /* PCI CFG Address bits[27:24] are used as extended register address bit[11:8] */ -#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD pci_write_config8(dev, 0x47, 0x30); #endif diff --git a/src/southbridge/via/k8t890/early_car.c b/src/southbridge/via/k8t890/early_car.c index da7b4db..5d5f184 100644 --- a/src/southbridge/via/k8t890/early_car.c +++ b/src/southbridge/via/k8t890/early_car.c @@ -35,7 +35,7 @@ /* AMD K8 LDT0, LDT1, LDT2 Link Control Registers */ static u8 ldtreg[3] = {0x86, 0xa6, 0xc6}; -#if CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD #define K8X8XX_HT_CFG_BASE 0xc0 #else #define K8X8XX_HT_CFG_BASE 0x60 @@ -53,7 +53,7 @@ u8 k8t890_early_setup_ht(void) u8 cldtwidth_in, cldtwidth_out, vldtwidth_in, vldtwidth_out, ldtnr, width; u16 vldtcaps; -#if !CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD u8 reg; /* hack, enable NVRAM in chipset */ @@ -79,21 +79,21 @@ u8 k8t890_early_setup_ht(void) ldtnr = 2; } -#if CONFIG_SOUTHBRIDGE_VIA_K8M800 +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M800 print_debug("K8M800 found at LDT "); -#elif CONFIG_SOUTHBRIDGE_VIA_K8T800 +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800 print_debug("K8T800 found at LDT "); -#elif CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD print_debug("K8T800_OLD found at LDT "); pci_write_config8(PCI_DEV(0, 0x0, 0), 0x64, 0x00); pci_write_config8(PCI_DEV(0, 0x0, 0), 0xdd, 0x50); -#elif CONFIG_SOUTHBRIDGE_VIA_K8T800PRO +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800PRO print_debug("K8T800 Pro found at LDT "); -#elif CONFIG_SOUTHBRIDGE_VIA_K8M890 +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890 print_debug("K8M890 found at LDT "); /* K8M890 fix HT delay */ pci_write_config8(PCI_DEV(0, 0x0, 2), 0xab, 0x22); -#elif CONFIG_SOUTHBRIDGE_VIA_K8T890 +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T890 print_debug("K8T890 found at LDT "); #endif print_debug_hex8(ldtnr); diff --git a/src/southbridge/via/k8t890/romstrap.inc b/src/southbridge/via/k8t890/romstrap.inc index a3814b0..942def5 100644 --- a/src/southbridge/via/k8t890/romstrap.inc +++ b/src/southbridge/via/k8t890/romstrap.inc @@ -33,7 +33,7 @@ __romstrap_start: * Below are some Dev0 Func2 HT control registers values, * depending on strap pin, one of below lines is used. */ -#if CONFIG_SOUTHBRIDGE_VIA_K8M800 || CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD +#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD tblpointer: .long 0x50220000, 0X619707C2 @@ -52,7 +52,7 @@ tblpointer: .long 0x0 .long 0x0 -#elif CONFIG_SOUTHBRIDGE_VIA_K8M890 +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8M890 tblpointer: .long 0x504400FF, 0x61970FC2 //;200M @@ -72,7 +72,7 @@ tblpointer: .long 0x0 -#elif CONFIG_SOUTHBRIDGE_VIA_K8T890 +#elif CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T890 tblpointer: .long 0x504400AA, 0x61970FC2 //;200M diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index d57d471..7fc5b52 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -322,7 +322,7 @@ static void vt8237r_init(struct device *dev) pci_write_config8(dev, 0x48, 0x0c); #else - #if CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD + #if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800 || CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD /* It seems that when we pair with the K8T800, we need to disable * the A2 mask */

1 0

New patch to review for coreboot: 4fd599c Intel northbridge I945: Apply un-written naming rules
by Kyösti Mälkki 26 Feb '12

26 Feb '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/684 -gerrit commit 4fd599cf9ae96f0ae13c816a1e2dd7955c05eec3 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 24 16:08:18 2012 +0200 Intel northbridge I945: Apply un-written naming rules Use NORTHBRIDGE_INTEL_I945 to select the driver directory for build. Use _SUBTYPE_945GC and _SUBTYPE_945GM to define at compile-time which model of I945 the driver is built for. Change-Id: I11b1e0998d0fc28f8946bad4f0989036a9b18af4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/getac/p470/Kconfig | 3 ++- src/mainboard/ibase/mb899/Kconfig | 3 ++- src/mainboard/intel/d945gclf/Kconfig | 3 ++- src/mainboard/kontron/986lcd-m/Kconfig | 3 ++- src/mainboard/lenovo/t60/Kconfig | 3 ++- src/mainboard/lenovo/x60/Kconfig | 3 ++- src/mainboard/roda/rk886ex/Kconfig | 3 ++- src/northbridge/intel/Makefile.inc | 3 +-- src/northbridge/intel/i945/Kconfig | 14 +++++++++----- src/northbridge/intel/i945/early_init.c | 4 ++-- src/northbridge/intel/i945/raminit.c | 18 +++++++++--------- 11 files changed, 35 insertions(+), 25 deletions(-) diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig index 6ca11e5..8a4a003 100644 --- a/src/mainboard/getac/p470/Kconfig +++ b/src/mainboard/getac/p470/Kconfig @@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_TI_PCIXX12 diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig index ac87466..30f9a70 100644 --- a/src/mainboard/ibase/mb899/Kconfig +++ b/src/mainboard/ibase/mb899/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627EHG diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index efc8025..331e945 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -22,7 +22,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_441 - select NORTHBRIDGE_INTEL_I945GC + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GC select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_SMSC_LPC47M15X diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig index ec5c073..8b45e31 100644 --- a/src/mainboard/kontron/986lcd-m/Kconfig +++ b/src/mainboard/kontron/986lcd-m/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_WINBOND_W83627THG diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index d1abcf6..8ed286c 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select SOUTHBRIDGE_INTEL_I82801GX select SUPERIO_NSC_PC87382 select SUPERIO_NSC_PC87384 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 69f83a8..68f19ca 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_RICOH_RL5C476 select SUPERIO_NSC_PC87382 diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig index d5de7dc..7e527ca 100644 --- a/src/mainboard/roda/rk886ex/Kconfig +++ b/src/mainboard/roda/rk886ex/Kconfig @@ -4,7 +4,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 - select NORTHBRIDGE_INTEL_I945GM + select NORTHBRIDGE_INTEL_I945 + select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select CHECK_SLFRCS_ON_RESUME select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_TI_PCI7420 diff --git a/src/northbridge/intel/Makefile.inc b/src/northbridge/intel/Makefile.inc index c599dab..6153052 100644 --- a/src/northbridge/intel/Makefile.inc +++ b/src/northbridge/intel/Makefile.inc @@ -8,7 +8,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I440LX) += i440lx subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855 -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GC) += i945 -subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GM) += i945 +subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SCH) += sch subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I5000) += i5000 diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 42cc7ce..093411f 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -17,15 +17,19 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -config NORTHBRIDGE_INTEL_I945GC +config NORTHBRIDGE_INTEL_I945 bool - select HAVE_DEBUG_RAM_SETUP -config NORTHBRIDGE_INTEL_I945GM - bool +if NORTHBRIDGE_INTEL_I945 + +config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy + def_bool y select HAVE_DEBUG_RAM_SETUP -if NORTHBRIDGE_INTEL_I945GC || NORTHBRIDGE_INTEL_I945GM +config NORTHBRIDGE_INTEL_SUBTYPE_I945GC + def_bool n +config NORTHBRIDGE_INTEL_SUBTYPE_I945GM + def_bool n config VGA_BIOS_ID string diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 14c66c4..f27dca0 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -91,7 +91,7 @@ static void i945m_detect_chipset(void) printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); -#if CONFIG_NORTHBRIDGE_INTEL_I945GC +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); #endif } @@ -140,7 +140,7 @@ static void i945_detect_chipset(void) printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); #endif } diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index d92c006..f22af21 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -113,7 +113,7 @@ void sdram_dump_mchbar_registers(void) static int memclk(void) { int offset = 0; -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM offset++; #endif switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) { @@ -125,7 +125,7 @@ static int memclk(void) return -1; } -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM static u16 fsbclk(void) { switch (MCHBAR32(CLKCFG) & 7) { @@ -136,7 +136,7 @@ static u16 fsbclk(void) } return 0xffff; } -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC static u16 fsbclk(void) { switch (MCHBAR32(CLKCFG) & 7) { @@ -1075,7 +1075,7 @@ static const u32 *slew_group_lookup(int dual_channel, int index) return nc; } -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM /* Strength multiplier tables */ static const u8 dual_channel_strength_multiplier[] = { 0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11, @@ -1130,7 +1130,7 @@ static const u8 single_channel_strength_multiplier[] = { 0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11, 0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11 }; -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC static const u8 dual_channel_strength_multiplier[] = { 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, 0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22, @@ -2186,7 +2186,7 @@ static void sdram_program_clock_crossing(void) /** * We add the indices according to our clocks from CLKCFG. */ -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM static const u32 data_clock_crossing[] = { 0x00100401, 0x00000000, /* DDR400 FSB400 */ 0xffffffff, 0xffffffff, /* nonexistant */ @@ -2231,7 +2231,7 @@ static void sdram_program_clock_crossing(void) 0xffffffff, 0xffffffff, /* nonexistant */ }; -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC /* i945 G/P */ static const u32 data_clock_crossing[] = { 0xffffffff, 0xffffffff, /* nonexistant */ @@ -2822,9 +2822,9 @@ static void sdram_enable_memory_clocks(struct sys_info *sysinfo) { u8 clocks[2] = { 0, 0 }; -#if CONFIG_NORTHBRIDGE_INTEL_I945GM +#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM #define CLOCKS_WIDTH 2 -#elif CONFIG_NORTHBRIDGE_INTEL_I945GC +#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC #define CLOCKS_WIDTH 3 #endif if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)

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Re: [coreboot] HP XW9300 the coreboot.rom failed
by Paul Menzel 26 Feb '12

26 Feb '12

Dear Jürgen, Am Sonntag, den 26.02.2012, 13:51 +0100 schrieb Jürgen Trapp: > the HP XW9300 with coreboot failed. > I have before flashing the coreboot.rom, a backup from the bios > > OUTPUT: > > sudo flashrom -w coreboot.rom > flashrom v0.9.4-r1394 on Linux 3.0.0-12-generic (i686), built with > libpci 3.1.7, GCC 4.6.1, little endian > flashrom is free software, get the source code at > http://www.flashrom.org > > Calibrating delay loop... OK. > Found chipset "NVIDIA CK804". Enabling flash write... OK. > WARNING: unexpected second chipset match: "NVIDIA CK804" > ignoring, please report lspci and board URL to flashrom(a)flashrom.org > with 'CHIPSET: your board name' in the subject line. > This chipset supports the following protocols: Non-SPI. > Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address > 0xfff00000. > Note: If the following flash access fails, try -m > <vendor>:<mainboard>. > Reading old flash chip contents... done. > Erasing and writing flash chip... ERASE FAILED at 0x00000000! > Expected=0xff, Read=0x48, failed byte count from > 0x00000000-0x00000fff: 0x100 > ERASE FAILED! > Reading current flash chip contents... done. ERASE FAILED at > 0x00000000! Expected=0xff, Read=0x48, failed byte count from > 0x00000000-0x0000ffff: 0x100 > ERASE FAILED! > FAILED! > Uh oh. Erase/write failed. Checking if anything changed. > Good. It seems nothing was changed. > Writing to the flash chip apparently didn't do anything. > This means we have to add special support for your board, programmer > or flash chip. > Please report this on IRC at irc.freenode.net (channel #flashrom) or > mail flashrom(a)flashrom.org! > ------------------------------------------------------------------------------- > You may now reboot or simply leave the machine running. As the output says. Please contact the Flashrom list. Three more annotations. 1. They are interested in verbose log files, so please also use the parameter -V (or -VV). 2. Flashrom 0.9.5.1 has been released already. Using latest development version is always appreciated [1]. 3. Please just send plain text messages and no HTML messages to lists [2]. Thanks, Paul [1] http://flashrom.org/Downloads [2] http://en.opensuse.org/openSUSE:Mailing_list_netiquette

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HP XW9300 the coreboot.rom failed
by Jürgen Trapp 26 Feb '12

26 Feb '12

Hi, the HP XW9300 with coreboot failed. I have before flashing the coreboot.rom, a backup from the bios OUTPUT: sudo flashrom -w coreboot.rom flashrom v0.9.4-r1394 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA CK804". Enabling flash write... OK. WARNING: unexpected second chipset match: "NVIDIA CK804" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. This chipset supports the following protocols: Non-SPI. Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. Note: If the following flash access fails, try -m <vendor>:<mainboard>. Reading old flash chip contents... done. Erasing and writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x48, failed byte count from 0x00000000-0x00000fff: 0x100 ERASE FAILED! Reading current flash chip contents... done. ERASE FAILED at 0x00000000! Expected=0xff, Read=0x48, failed byte count from 0x00000000-0x0000ffff: 0x100 ERASE FAILED! FAILED! Uh oh. Erase/write failed. Checking if anything changed. Good. It seems nothing was changed. Writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. sudo flashrom -w hp.rom flashrom v0.9.4-r1394 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA CK804". Enabling flash write... OK. WARNING: unexpected second chipset match: "NVIDIA CK804" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. This chipset supports the following protocols: Non-SPI. Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED.

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Re: [coreboot] Will coreboot work on my machine, HP XW9300?
by Jonathan A. Kollasch 26 Feb '12

26 Feb '12

On Sun, Feb 26, 2012 at 12:41:11AM +0100, Jürgen Trapp wrote: > The Board is a OEM by HP, but the builder is TYAN with the board name S2895. Unlike the Tyan version of the board, I believe the HP version has a soldered-on ROM chip. Otherwise, there's a fairly good chance it could work. Jonathan Kollasch

2 1

Will coreboot work on my machine, HP XW9300?
by Jürgen Trapp 25 Feb '12

25 Feb '12

The Board is a OEM by HP, but the builder is TYAN with the board name S2895. 1.) system: HP XW9300 board vendor: HP (Tyan) board name: S2895 CPU: 2x AMD 275 northbridge: NVIDIA 2200 Prof. southbridge: NVIDIA 2050 Prof 2.)-+-[0000:80]-+-00.0 nVidia Corporation CK804 Memory Controller [10de:005e] | +-01.0 nVidia Corporation CK804 Memory Controller [10de:00d3] | \-0e.0-[81]----00.0 nVidia Corporation NV41 [Quadro FX 3450/4000 SDI] [10de:00cd] +-[0000:40]-+-01.0-[41]-- | +-01.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC [1022:7451] | +-02.0-[61]--+-06.0 LSI Logic / Symbios Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI [1000:0030] | | \-06.1 LSI Logic / Symbios Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI [1000:0030] | \-02.1 Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC [1022:7451] \-[0000:00]-+-00.0 nVidia Corporation CK804 Memory Controller [10de:005e] +-01.0 nVidia Corporation CK804 ISA Bridge [10de:0051] +-01.1 nVidia Corporation CK804 SMBus [10de:0052] +-02.0 nVidia Corporation CK804 USB Controller [10de:005a] +-02.1 nVidia Corporation CK804 USB Controller [10de:005b] +-04.0 nVidia Corporation CK804 AC'97 Audio Controller [10de:0059] +-06.0 nVidia Corporation CK804 IDE [10de:0053] +-07.0 nVidia Corporation CK804 Serial ATA Controller [10de:0054] +-08.0 nVidia Corporation CK804 Serial ATA Controller [10de:0055] +-09.0-[05]----05.0 Texas Instruments TSB43AB22A IEEE-1394a-2000 Controller (PHY/Link) [iOHCI-Lynx] [104c:8023] +-0a.0 nVidia Corporation CK804 Ethernet Controller [10de:0057] +-0e.0-[0a]----00.0 nVidia Corporation NV41 [Quadro FX 3450/4000 SDI] [10de:00cd] +-18.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100] +-18.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101] +-18.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102] +-18.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103] +-19.0 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100] +-19.1 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101] +-19.2 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102] \-19.3 Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103] 3.)Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Found SMSC LPC47B397 (id=0x6f, rev=0x01) at 0x2e No dump available for this Super I/O 4.)flashrom v0.9.5-r1507 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 4001 usecs, 729M loops per second, 10 myus = 0 us, 100 myus = 0 us, 1000 myus = 0 us, 10000 myus = 8001 us, 16004 myus = 16001 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP xw9300 Workstation" DMI string system-version: " " DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "09C4h" DMI string baseboard-version: "Not Specified" DMI string chassis-type: "Mini Tower" Found chipset "NVIDIA CK804" with PCI ID 10de:0051. Enabling flash write... OK. WARNING: unexpected second chipset match: "NVIDIA CK804" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. The following protocols are supported: Non-SPI. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x20, id2 0x20 Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x20, id2 0x20 Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xbf, id2 0x5b Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x20, id2 0x20 Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x20, id2 0x20 Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x20, id2 0x20, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x48, id2 0x50, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0xe4, id2 0xb9, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5b Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbf, id2 0x5b Found SST flash chip "SST49LF080A" (1024 kB, LPC). No operations were specified. Restoring PCI config space for 00:01:0 reg 0x6d Thank you for help.

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New patch to review for coreboot: 904a808 Avoid using CPUID in SMBIOS tables. Check for CPUID otherwise claim 486 class cpu.
by Rudolf Marek 25 Feb '12

25 Feb '12

Rudolf Marek (r.marek(a)assembler.cz) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/683 -gerrit commit 904a8089cf7017480da09c0c1b1754af404e08e3 Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat Feb 25 23:51:12 2012 +0100 Avoid using CPUID in SMBIOS tables. Check for CPUID otherwise claim 486 class cpu. Change-Id: Ic7c4452a1b55bae0cefee118003540ec39ef9fd4 Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> --- src/arch/x86/boot/smbios.c | 49 ++++++++++++++++++++++++-------------- src/arch/x86/include/arch/cpu.h | 29 +++++++++++++++++++++++ src/arch/x86/lib/cpu.c | 29 ----------------------- 3 files changed, 60 insertions(+), 47 deletions(-) diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c index e5156d9..7e2729c 100644 --- a/src/arch/x86/boot/smbios.c +++ b/src/arch/x86/boot/smbios.c @@ -76,34 +76,41 @@ int smbios_string_table_len(char *start) static int smbios_cpu_vendor(char *start) { - char tmp[13]; + char tmp[13] = "Unknown"; u32 *_tmp = (u32 *)tmp; - struct cpuid_result res = cpuid(0); + struct cpuid_result res; - _tmp[0] = res.ebx; - _tmp[1] = res.edx; - _tmp[2] = res.ecx; - tmp[12] = '\0'; - return smbios_add_string(start, tmp); + if (have_cpuid_p()) { + res = cpuid(0); + _tmp[0] = res.ebx; + _tmp[1] = res.edx; + _tmp[2] = res.ecx; + tmp[12] = '\0'; + } + return smbios_add_string(start, tmp); } static int smbios_processor_name(char *start) { - char tmp[49]; + char tmp[49] = "Unknown Processor Name"; u32 *_tmp = (u32 *)tmp; struct cpuid_result res; int i; - for (i = 0; i < 3; i++) { - res = cpuid(0x80000002 + i); - _tmp[i * 4 + 0] = res.eax; - _tmp[i * 4 + 1] = res.ebx; - _tmp[i * 4 + 2] = res.ecx; - _tmp[i * 4 + 3] = res.edx; + if (have_cpuid_p()) { + res = cpuid(0x80000000); + if (res.eax > 0x80000004) { + for (i = 0; i < 3; i++) { + res = cpuid(0x80000002 + i); + _tmp[i * 4 + 0] = res.eax; + _tmp[i * 4 + 1] = res.ebx; + _tmp[i * 4 + 2] = res.ecx; + _tmp[i * 4 + 3] = res.edx; + } + tmp[48] = 0; + } } - - tmp[48] = 0; return smbios_add_string(start, tmp); } @@ -184,7 +191,13 @@ static int smbios_write_type4(unsigned long *current, int handle) struct smbios_type4 *t = (struct smbios_type4 *)*current; int len = sizeof(struct smbios_type4); - res = cpuid(1); + /* Provide sane defaults even for CPU without CPUID */ + res.eax = res.edx = 0; + res.ebx = 0x10000; + + if (have_cpuid_p()) { + res = cpuid(1); + } memset(t, 0, sizeof(struct smbios_type4)); t->type = SMBIOS_PROCESSOR_INFORMATION; @@ -194,7 +207,7 @@ static int smbios_write_type4(unsigned long *current, int handle) t->processor_id[1] = res.edx; t->processor_manufacturer = smbios_cpu_vendor(t->eos); t->processor_version = smbios_processor_name(t->eos); - t->processor_family = 0x0c; + t->processor_family = (res.eax > 0) ? 0x0c : 0x6; t->processor_type = 3; /* System Processor */ t->processor_upgrade = 0x06; t->core_count = (res.ebx >> 16) & 0xff; diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 85357d7..4f395ce 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -29,6 +29,35 @@ struct cpuid_result { uint32_t edx; }; +/* Standard macro to see if a specific flag is changeable */ +static inline int flag_is_changeable_p(uint32_t flag) +{ + uint32_t f1, f2; + + asm( + "pushfl\n\t" + "pushfl\n\t" + "popl %0\n\t" + "movl %0,%1\n\t" + "xorl %2,%0\n\t" + "pushl %0\n\t" + "popfl\n\t" + "pushfl\n\t" + "popl %0\n\t" + "popfl\n\t" + : "=&r" (f1), "=&r" (f2) + : "ir" (flag)); + return ((f1^f2) & flag) != 0; +} + + +/* Probe for the CPUID instruction */ +static int have_cpuid_p(void) +{ + return flag_is_changeable_p(X86_EFLAGS_ID); +} + + /* * Generic CPUID function */ diff --git a/src/arch/x86/lib/cpu.c b/src/arch/x86/lib/cpu.c index ada57e2..60296be 100644 --- a/src/arch/x86/lib/cpu.c +++ b/src/arch/x86/lib/cpu.c @@ -9,35 +9,6 @@ #include <device/path.h> #include <device/device.h> #include <smp/spinlock.h> - -/* Standard macro to see if a specific flag is changeable */ -static inline int flag_is_changeable_p(uint32_t flag) -{ - uint32_t f1, f2; - - asm( - "pushfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "movl %0,%1\n\t" - "xorl %2,%0\n\t" - "pushl %0\n\t" - "popfl\n\t" - "pushfl\n\t" - "popl %0\n\t" - "popfl\n\t" - : "=&r" (f1), "=&r" (f2) - : "ir" (flag)); - return ((f1^f2) & flag) != 0; -} - - -/* Probe for the CPUID instruction */ -static int have_cpuid_p(void) -{ - return flag_is_changeable_p(X86_EFLAGS_ID); -} - /* * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected * by the fact that they preserve the flags across the division of 5/2.

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Patch set updated for coreboot: a437df3 Unify Local APIC address definitions
by Patrick Georgi 25 Feb '12

25 Feb '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/676 -gerrit commit a437df37ea4d4baf1a4d7e5f42cc59c37774ee66 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Feb 16 18:43:25 2012 +0100 Unify Local APIC address definitions We used several names for that same value, and hardcoded the value at some more places. They're all LOCAL_APIC_ADDR now (except for lapic specific code that still uses LAPIC_DEFAULT_BASE). Change-Id: I1d4be73b1984f22b7e84681edfadf0588a7589b6 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- Makefile.inc | 2 +- src/arch/x86/boot/acpi.c | 3 +-- src/arch/x86/include/arch/ioapic.h | 4 +++- src/arch/x86/include/arch/smp/mpspec.h | 5 ++--- src/include/cpu/x86/lapic_def.h | 3 ++- src/mainboard/advansus/a785e-i/mptable.c | 2 +- src/mainboard/amd/bimini_fam10/mptable.c | 2 +- src/mainboard/amd/dbm690t/mptable.c | 2 +- src/mainboard/amd/dinar/mptable.c | 2 +- src/mainboard/amd/inagua/mptable.c | 2 +- src/mainboard/amd/mahogany/mptable.c | 2 +- src/mainboard/amd/mahogany_fam10/mptable.c | 2 +- src/mainboard/amd/persimmon/mptable.c | 2 +- src/mainboard/amd/pistachio/mptable.c | 2 +- .../amd/serengeti_cheetah/acpi/amd8111_isa.asl | 7 +++++-- src/mainboard/amd/serengeti_cheetah/mptable.c | 2 +- .../serengeti_cheetah_fam10/acpi/amd8111_isa.asl | 7 +++++-- .../amd/serengeti_cheetah_fam10/mptable.c | 2 +- src/mainboard/amd/south_station/mptable.c | 2 +- src/mainboard/amd/tilapia_fam10/mptable.c | 2 +- src/mainboard/amd/torpedo/mptable.c | 2 +- src/mainboard/amd/union_station/mptable.c | 2 +- src/mainboard/arima/hdama/mptable.c | 2 +- src/mainboard/asrock/939a785gmh/mptable.c | 2 +- src/mainboard/asrock/e350m1/mptable.c | 2 +- src/mainboard/asus/a8n_e/mptable.c | 2 +- src/mainboard/asus/a8v-e_deluxe/mptable.c | 2 +- src/mainboard/asus/a8v-e_se/mptable.c | 2 +- src/mainboard/asus/k8v-x/mptable.c | 2 +- src/mainboard/asus/m2n-e/mptable.c | 2 +- src/mainboard/asus/m2v/mptable.c | 2 +- src/mainboard/asus/m4a78-em/mptable.c | 2 +- src/mainboard/asus/m4a785-m/mptable.c | 2 +- src/mainboard/asus/m5a88-v/mptable.c | 2 +- src/mainboard/asus/p2b-d/mptable.c | 2 +- src/mainboard/asus/p2b-ds/mptable.c | 2 +- src/mainboard/avalue/eax-785e/mptable.c | 2 +- src/mainboard/broadcom/blast/mptable.c | 2 +- src/mainboard/dell/s1850/mptable.c | 2 +- src/mainboard/emulation/qemu-x86/northbridge.c | 3 ++- src/mainboard/getac/p470/mptable.c | 2 +- src/mainboard/gigabyte/ga_2761gxdk/mptable.c | 2 +- src/mainboard/gigabyte/m57sli/mptable.c | 2 +- src/mainboard/gigabyte/ma785gmt/mptable.c | 2 +- src/mainboard/gigabyte/ma78gm/mptable.c | 2 +- src/mainboard/hp/dl145_g1/mptable.c | 2 +- src/mainboard/hp/dl145_g3/mptable.c | 2 +- src/mainboard/hp/dl165_g6_fam10/mptable.c | 2 +- src/mainboard/ibase/mb899/mptable.c | 2 +- src/mainboard/ibm/e325/mptable.c | 2 +- src/mainboard/ibm/e326/mptable.c | 2 +- src/mainboard/iei/kino-780am2-fam10/mptable.c | 2 +- src/mainboard/intel/d945gclf/mptable.c | 2 +- src/mainboard/intel/eagleheights/mptable.c | 2 +- src/mainboard/intel/jarrell/mptable.c | 2 +- src/mainboard/intel/mtarvon/mptable.c | 2 +- src/mainboard/intel/truxton/mptable.c | 2 +- src/mainboard/intel/xe7501devkit/mptable.c | 2 +- src/mainboard/iwave/iWRainbowG6/mptable.c | 2 +- src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl | 7 +++++-- src/mainboard/iwill/dk8_htx/mptable.c | 2 +- src/mainboard/iwill/dk8s2/mptable.c | 2 +- src/mainboard/iwill/dk8x/mptable.c | 2 +- src/mainboard/jetway/pa78vm5/mptable.c | 2 +- src/mainboard/kontron/986lcd-m/mptable.c | 2 +- src/mainboard/kontron/kt690/mptable.c | 2 +- src/mainboard/lenovo/t60/mptable.c | 2 +- src/mainboard/lenovo/x60/mptable.c | 2 +- src/mainboard/msi/ms7135/mptable.c | 2 +- src/mainboard/msi/ms7260/mptable.c | 2 +- src/mainboard/msi/ms9185/mptable.c | 2 +- src/mainboard/msi/ms9282/mptable.c | 2 +- src/mainboard/msi/ms9652_fam10/mptable.c | 2 +- src/mainboard/newisys/khepri/mptable.c | 2 +- src/mainboard/nvidia/l1_2pvv/mptable.c | 2 +- src/mainboard/roda/rk886ex/mptable.c | 2 +- src/mainboard/siemens/sitemp_g1p1/dsdt.asl | 6 ++++-- src/mainboard/siemens/sitemp_g1p1/mptable.c | 2 +- src/mainboard/sunw/ultra40/mptable.c | 2 +- src/mainboard/supermicro/h8dme/mptable.c | 2 +- src/mainboard/supermicro/h8dmr/mptable.c | 2 +- src/mainboard/supermicro/h8dmr_fam10/mptable.c | 2 +- src/mainboard/supermicro/h8qgi/mptable.c | 2 +- src/mainboard/supermicro/h8qme_fam10/mptable.c | 2 +- src/mainboard/supermicro/h8scm_fam10/mptable.c | 2 +- src/mainboard/supermicro/x6dai_g/mptable.c | 2 +- src/mainboard/supermicro/x6dhe_g/mptable.c | 2 +- src/mainboard/supermicro/x6dhe_g2/mptable.c | 2 +- src/mainboard/supermicro/x6dhr_ig/mptable.c | 2 +- src/mainboard/supermicro/x6dhr_ig2/mptable.c | 2 +- src/mainboard/technexion/tim5690/mptable.c | 2 +- src/mainboard/technexion/tim8690/mptable.c | 2 +- src/mainboard/tyan/s2735/mptable.c | 2 +- src/mainboard/tyan/s2850/mptable.c | 2 +- src/mainboard/tyan/s2875/mptable.c | 2 +- src/mainboard/tyan/s2880/mptable.c | 2 +- src/mainboard/tyan/s2881/mptable.c | 2 +- src/mainboard/tyan/s2882/mptable.c | 2 +- src/mainboard/tyan/s2885/mptable.c | 2 +- src/mainboard/tyan/s2891/mptable.c | 2 +- src/mainboard/tyan/s2892/mptable.c | 2 +- src/mainboard/tyan/s2895/mptable.c | 2 +- src/mainboard/tyan/s2912/mptable.c | 2 +- src/mainboard/tyan/s2912_fam10/mptable.c | 2 +- src/mainboard/tyan/s4880/mptable.c | 2 +- src/mainboard/tyan/s4882/mptable.c | 2 +- src/mainboard/via/epia-n/mainboard.c | 3 ++- src/mainboard/via/epia-n/mptable.c | 2 +- src/mainboard/via/pc2500e/mptable.c | 2 +- src/mainboard/via/vt8454c/mptable.c | 2 +- 110 files changed, 131 insertions(+), 117 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index e12cc92..24f3017 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -69,7 +69,7 @@ romstage-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(abspath $(obj)/config.h) -I$(src) -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(abspath $(obj)/config.h) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index f1be034..168933a 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -31,6 +31,7 @@ #include <arch/acpigen.h> #include <device/pci.h> #include <cbmem.h> +#include <cpu/x86/lapic_def.h> u8 acpi_checksum(u8 *table, u32 length) { @@ -188,8 +189,6 @@ int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu, void acpi_create_madt(acpi_madt_t *madt) { -#define LOCAL_APIC_ADDR 0xfee00000ULL - acpi_header_t *header = &(madt->header); unsigned long current = (unsigned long)madt + sizeof(acpi_madt_t); diff --git a/src/arch/x86/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h index 623f617..5d7e196 100644 --- a/src/arch/x86/include/arch/ioapic.h +++ b/src/arch/x86/include/arch/ioapic.h @@ -20,7 +20,7 @@ #ifndef __I386_ARCH_IOAPIC_H #define __I386_ARCH_IOAPIC_H -#define IO_APIC_ADDR 0xfec00000UL +#define IO_APIC_ADDR 0xfec00000 #define IO_APIC_INTERRUPTS 24 #define ALL (0xff << 24) @@ -38,7 +38,9 @@ #define SMI (2 << 8) #define INT (1 << 8) +#ifndef __ACPI__ void setup_ioapic(u32 ioapic_base, u8 ioapic_id); void clear_ioapic(u32 ioapic_base); +#endif #endif diff --git a/src/arch/x86/include/arch/smp/mpspec.h b/src/arch/x86/include/arch/smp/mpspec.h index 2eb1813..e5e6195 100644 --- a/src/arch/x86/include/arch/smp/mpspec.h +++ b/src/arch/x86/include/arch/smp/mpspec.h @@ -2,6 +2,8 @@ #define __ASM_MPSPEC_H #include <device/device.h> +#include <cpu/x86/lapic_def.h> + /* * Structure definitions for SMP machines following the * Intel Multiprocessing Specification 1.1 and 1.4. @@ -229,9 +231,6 @@ struct mp_exten_compatibility_address_space { */ } __attribute__((packed)); -/* Default local apic addr */ -#define LAPIC_ADDR 0xFEE00000 - void mptable_init(struct mp_config_table *mc, u32 lapic_addr); void *smp_next_mpc_entry(struct mp_config_table *mc); diff --git a/src/include/cpu/x86/lapic_def.h b/src/include/cpu/x86/lapic_def.h index 6035273..f96b53b 100644 --- a/src/include/cpu/x86/lapic_def.h +++ b/src/include/cpu/x86/lapic_def.h @@ -6,7 +6,8 @@ #define LAPIC_BASE_MSR_ENABLE (1 << 11) #define LAPIC_BASE_MSR_ADDR_MASK 0xFFFFF000 -#define LAPIC_DEFAULT_BASE 0xfee00000 +#define LOCAL_APIC_ADDR 0xfee00000 +#define LAPIC_DEFAULT_BASE LOCAL_APIC_ADDR #define LAPIC_ID 0x020 #define LAPIC_LVR 0x030 diff --git a/src/mainboard/advansus/a785e-i/mptable.c b/src/mainboard/advansus/a785e-i/mptable.c index 6504049..8643320 100644 --- a/src/mainboard/advansus/a785e-i/mptable.c +++ b/src/mainboard/advansus/a785e-i/mptable.c @@ -52,7 +52,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/bimini_fam10/mptable.c b/src/mainboard/amd/bimini_fam10/mptable.c index 2ab3f24..ae81411 100644 --- a/src/mainboard/amd/bimini_fam10/mptable.c +++ b/src/mainboard/amd/bimini_fam10/mptable.c @@ -52,7 +52,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c index 901591a..cf98ae3 100644 --- a/src/mainboard/amd/dbm690t/mptable.c +++ b/src/mainboard/amd/dbm690t/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/dinar/mptable.c b/src/mainboard/amd/dinar/mptable.c index b43080d..4938be0 100644 --- a/src/mainboard/amd/dinar/mptable.c +++ b/src/mainboard/amd/dinar/mptable.c @@ -44,7 +44,7 @@ static void *smp_write_config_table(void *v) u32 dword; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); get_bus_conf(); diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c index b339348..b5a507f 100644 --- a/src/mainboard/amd/inagua/mptable.c +++ b/src/mainboard/amd/inagua/mptable.c @@ -55,7 +55,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "AMD ", 8); smp_write_processors(mc); diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c index f79a579..dabd2ed 100644 --- a/src/mainboard/amd/mahogany/mptable.c +++ b/src/mainboard/amd/mahogany/mptable.c @@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c index b1a658b..c56952e 100644 --- a/src/mainboard/amd/mahogany_fam10/mptable.c +++ b/src/mainboard/amd/mahogany_fam10/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c index 18a7707..61ddef1 100644 --- a/src/mainboard/amd/persimmon/mptable.c +++ b/src/mainboard/amd/persimmon/mptable.c @@ -51,7 +51,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "AMD ", 8); smp_write_processors(mc); diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c index 901591a..cf98ae3 100644 --- a/src/mainboard/amd/pistachio/mptable.c +++ b/src/mainboard/amd/pistachio/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl index 0f7efc9..56c0a16 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl +++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl @@ -1,3 +1,6 @@ +#include <arch/ioapic.h> +#include <cpu/x86/lapic_def.h> + /* * Copyright 2005 AMD */ @@ -125,9 +128,9 @@ { Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404 - Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC + Memory32Fixed (ReadWrite, IO_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM - Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC + Memory32Fixed (ReadWrite, LOCAL_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index ebd4cbc..4214408 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -18,7 +18,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl index f00069f..3b79453 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl @@ -17,6 +17,9 @@ // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA // +#include <arch/ioapic.h> +#include <cpu/x86/lapic_def.h> + //AMD8111 isa Device (ISA) @@ -141,9 +144,9 @@ { Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404 - Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC + Memory32Fixed (ReadWrite, IO_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM - Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC + Memory32Fixed (ReadWrite, LOCAL_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c index d527f9c..e90b348 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c @@ -37,7 +37,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c index 5242f69..99004b3 100644 --- a/src/mainboard/amd/south_station/mptable.c +++ b/src/mainboard/amd/south_station/mptable.c @@ -51,7 +51,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "AMD ", 8); smp_write_processors(mc); diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c index 4bf3480..4a276fb 100644 --- a/src/mainboard/amd/tilapia_fam10/mptable.c +++ b/src/mainboard/amd/tilapia_fam10/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c index 97db2b9..936a417 100644 --- a/src/mainboard/amd/torpedo/mptable.c +++ b/src/mainboard/amd/torpedo/mptable.c @@ -84,7 +84,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "AMD ", 8); /*Inagua used dure core cpu with one die */ diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c index 5242f69..99004b3 100644 --- a/src/mainboard/amd/union_station/mptable.c +++ b/src/mainboard/amd/union_station/mptable.c @@ -51,7 +51,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "AMD ", 8); smp_write_processors(mc); diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c index 466ba88..f67327e 100644 --- a/src/mainboard/arima/hdama/mptable.c +++ b/src/mainboard/arima/hdama/mptable.c @@ -75,7 +75,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asrock/939a785gmh/mptable.c b/src/mainboard/asrock/939a785gmh/mptable.c index 95b1271..c0ca550 100644 --- a/src/mainboard/asrock/939a785gmh/mptable.c +++ b/src/mainboard/asrock/939a785gmh/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c index de9d7f4..7e8c947 100644 --- a/src/mainboard/asrock/e350m1/mptable.c +++ b/src/mainboard/asrock/e350m1/mptable.c @@ -50,7 +50,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); memcpy(mc->mpc_oem, "ASROCK ", 8); smp_write_processors(mc); diff --git a/src/mainboard/asus/a8n_e/mptable.c b/src/mainboard/asus/a8n_e/mptable.c index 349ae74..9defdb5 100644 --- a/src/mainboard/asus/a8n_e/mptable.c +++ b/src/mainboard/asus/a8n_e/mptable.c @@ -39,7 +39,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/a8v-e_deluxe/mptable.c b/src/mainboard/asus/a8v-e_deluxe/mptable.c index 999dd6c..eb7790f 100644 --- a/src/mainboard/asus/a8v-e_deluxe/mptable.c +++ b/src/mainboard/asus/a8v-e_deluxe/mptable.c @@ -31,7 +31,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/a8v-e_se/mptable.c b/src/mainboard/asus/a8v-e_se/mptable.c index 999dd6c..eb7790f 100644 --- a/src/mainboard/asus/a8v-e_se/mptable.c +++ b/src/mainboard/asus/a8v-e_se/mptable.c @@ -31,7 +31,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/k8v-x/mptable.c b/src/mainboard/asus/k8v-x/mptable.c index 673dfbe..48eee71 100644 --- a/src/mainboard/asus/k8v-x/mptable.c +++ b/src/mainboard/asus/k8v-x/mptable.c @@ -31,7 +31,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/m2n-e/mptable.c b/src/mainboard/asus/m2n-e/mptable.c index 29b9d07..680dfa7 100644 --- a/src/mainboard/asus/m2n-e/mptable.c +++ b/src/mainboard/asus/m2n-e/mptable.c @@ -43,7 +43,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/m2v/mptable.c b/src/mainboard/asus/m2v/mptable.c index 5dc340a..e6e600a 100644 --- a/src/mainboard/asus/m2v/mptable.c +++ b/src/mainboard/asus/m2v/mptable.c @@ -42,7 +42,7 @@ static void *smp_write_config_table(void *v) mc = (void*)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &bus_isa); diff --git a/src/mainboard/asus/m4a78-em/mptable.c b/src/mainboard/asus/m4a78-em/mptable.c index 4bf3480..4a276fb 100644 --- a/src/mainboard/asus/m4a78-em/mptable.c +++ b/src/mainboard/asus/m4a78-em/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/m4a785-m/mptable.c b/src/mainboard/asus/m4a785-m/mptable.c index 4bf3480..4a276fb 100644 --- a/src/mainboard/asus/m4a785-m/mptable.c +++ b/src/mainboard/asus/m4a785-m/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/m5a88-v/mptable.c b/src/mainboard/asus/m5a88-v/mptable.c index 516b915..ac8ed5e 100644 --- a/src/mainboard/asus/m5a88-v/mptable.c +++ b/src/mainboard/asus/m5a88-v/mptable.c @@ -52,7 +52,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c index 43f3a85..4eed581 100644 --- a/src/mainboard/asus/p2b-d/mptable.c +++ b/src/mainboard/asus/p2b-d/mptable.c @@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/asus/p2b-ds/mptable.c b/src/mainboard/asus/p2b-ds/mptable.c index 153c62c..5333418 100644 --- a/src/mainboard/asus/p2b-ds/mptable.c +++ b/src/mainboard/asus/p2b-ds/mptable.c @@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/avalue/eax-785e/mptable.c b/src/mainboard/avalue/eax-785e/mptable.c index 021f635..6f541a0 100644 --- a/src/mainboard/avalue/eax-785e/mptable.c +++ b/src/mainboard/avalue/eax-785e/mptable.c @@ -52,7 +52,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c index b747d2e..5a1bf28 100644 --- a/src/mainboard/broadcom/blast/mptable.c +++ b/src/mainboard/broadcom/blast/mptable.c @@ -24,7 +24,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/dell/s1850/mptable.c b/src/mainboard/dell/s1850/mptable.c index a71dab0..0c7562c 100644 --- a/src/mainboard/dell/s1850/mptable.c +++ b/src/mainboard/dell/s1850/mptable.c @@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c index 3f22437..b961e8b 100644 --- a/src/mainboard/emulation/qemu-x86/northbridge.c +++ b/src/mainboard/emulation/qemu-x86/northbridge.c @@ -1,4 +1,5 @@ #include <console/console.h> +#include <cpu/x86/lapic_def.h> #include <arch/io.h> #include <arch/ioapic.h> #include <stdint.h> @@ -80,7 +81,7 @@ static void cpu_pci_domain_read_resources(struct device *dev) /* Reserve space for the LAPIC. There's one in every processor, but * the space only needs to be reserved once, so we do it here. */ res = new_resource(dev, 3); - res->base = 0xfee00000UL; + res->base = LOCAL_APIC_ADDR; res->size = 0x10000UL; res->limit = 0xffffffffUL; res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | diff --git a/src/mainboard/getac/p470/mptable.c b/src/mainboard/getac/p470/mptable.c index 5954c97..9b59bb4 100644 --- a/src/mainboard/getac/p470/mptable.c +++ b/src/mainboard/getac/p470/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c index b52cda9..914b25a 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c index 5aa7e61..f493514 100644 --- a/src/mainboard/gigabyte/m57sli/mptable.c +++ b/src/mainboard/gigabyte/m57sli/mptable.c @@ -39,7 +39,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c index 4bf3480..4a276fb 100644 --- a/src/mainboard/gigabyte/ma785gmt/mptable.c +++ b/src/mainboard/gigabyte/ma785gmt/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c index 4bf3480..4a276fb 100644 --- a/src/mainboard/gigabyte/ma78gm/mptable.c +++ b/src/mainboard/gigabyte/ma78gm/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/hp/dl145_g1/mptable.c b/src/mainboard/hp/dl145_g1/mptable.c index e33f681..35dedde 100644 --- a/src/mainboard/hp/dl145_g1/mptable.c +++ b/src/mainboard/hp/dl145_g1/mptable.c @@ -14,7 +14,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c index 466b7fc..609432a 100644 --- a/src/mainboard/hp/dl145_g3/mptable.c +++ b/src/mainboard/hp/dl145_g3/mptable.c @@ -47,7 +47,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/hp/dl165_g6_fam10/mptable.c b/src/mainboard/hp/dl165_g6_fam10/mptable.c index c246721..00234a3 100644 --- a/src/mainboard/hp/dl165_g6_fam10/mptable.c +++ b/src/mainboard/hp/dl165_g6_fam10/mptable.c @@ -48,7 +48,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/ibase/mb899/mptable.c b/src/mainboard/ibase/mb899/mptable.c index 0ff1896..1baf728 100644 --- a/src/mainboard/ibase/mb899/mptable.c +++ b/src/mainboard/ibase/mb899/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/ibm/e325/mptable.c b/src/mainboard/ibm/e325/mptable.c index 6431f32..7d1b8f3 100644 --- a/src/mainboard/ibm/e325/mptable.c +++ b/src/mainboard/ibm/e325/mptable.c @@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/ibm/e326/mptable.c b/src/mainboard/ibm/e326/mptable.c index e81bf8f..b963a0c 100644 --- a/src/mainboard/ibm/e326/mptable.c +++ b/src/mainboard/ibm/e326/mptable.c @@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/iei/kino-780am2-fam10/mptable.c b/src/mainboard/iei/kino-780am2-fam10/mptable.c index 66423e5..a26fbde 100644 --- a/src/mainboard/iei/kino-780am2-fam10/mptable.c +++ b/src/mainboard/iei/kino-780am2-fam10/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c index ab537cb..b0360bf 100644 --- a/src/mainboard/intel/d945gclf/mptable.c +++ b/src/mainboard/intel/d945gclf/mptable.c @@ -32,7 +32,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c index 8571864..809feec 100644 --- a/src/mainboard/intel/eagleheights/mptable.c +++ b/src/mainboard/intel/eagleheights/mptable.c @@ -78,7 +78,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c index b665703..6662329 100644 --- a/src/mainboard/intel/jarrell/mptable.c +++ b/src/mainboard/intel/jarrell/mptable.c @@ -19,7 +19,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c index 0c025f0..364d077 100644 --- a/src/mainboard/intel/mtarvon/mptable.c +++ b/src/mainboard/intel/mtarvon/mptable.c @@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/truxton/mptable.c b/src/mainboard/intel/truxton/mptable.c index 506a1d0..0cc8f6b 100644 --- a/src/mainboard/intel/truxton/mptable.c +++ b/src/mainboard/intel/truxton/mptable.c @@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c index 99fd5af..cc7eda5 100644 --- a/src/mainboard/intel/xe7501devkit/mptable.c +++ b/src/mainboard/intel/xe7501devkit/mptable.c @@ -122,7 +122,7 @@ static void *smp_write_config_table(void* v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/iwave/iWRainbowG6/mptable.c b/src/mainboard/iwave/iWRainbowG6/mptable.c index bf94b8c..953f16a 100644 --- a/src/mainboard/iwave/iWRainbowG6/mptable.c +++ b/src/mainboard/iwave/iWRainbowG6/mptable.c @@ -29,7 +29,7 @@ void *smp_write_config_table(void *v) int isa_bus; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus); diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl index 0f7efc9..56c0a16 100644 --- a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl +++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl @@ -1,3 +1,6 @@ +#include <arch/ioapic.h> +#include <cpu/x86/lapic_def.h> + /* * Copyright 2005 AMD */ @@ -125,9 +128,9 @@ { Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404 - Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC + Memory32Fixed (ReadWrite, IO_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM - Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC + Memory32Fixed (ReadWrite, LOCAL_APIC_ADDR, 0x00001000) Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS diff --git a/src/mainboard/iwill/dk8_htx/mptable.c b/src/mainboard/iwill/dk8_htx/mptable.c index fd53bd7..3977673 100644 --- a/src/mainboard/iwill/dk8_htx/mptable.c +++ b/src/mainboard/iwill/dk8_htx/mptable.c @@ -18,7 +18,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/iwill/dk8s2/mptable.c b/src/mainboard/iwill/dk8s2/mptable.c index d78ce20..f22fd9d 100644 --- a/src/mainboard/iwill/dk8s2/mptable.c +++ b/src/mainboard/iwill/dk8s2/mptable.c @@ -15,7 +15,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/iwill/dk8x/mptable.c b/src/mainboard/iwill/dk8x/mptable.c index d78ce20..f22fd9d 100644 --- a/src/mainboard/iwill/dk8x/mptable.c +++ b/src/mainboard/iwill/dk8x/mptable.c @@ -15,7 +15,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/jetway/pa78vm5/mptable.c b/src/mainboard/jetway/pa78vm5/mptable.c index 11b4357..b8caa23 100644 --- a/src/mainboard/jetway/pa78vm5/mptable.c +++ b/src/mainboard/jetway/pa78vm5/mptable.c @@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c index ab63b45..03f7370 100644 --- a/src/mainboard/kontron/986lcd-m/mptable.c +++ b/src/mainboard/kontron/986lcd-m/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c index 21a0d05..4ffba6f 100644 --- a/src/mainboard/kontron/kt690/mptable.c +++ b/src/mainboard/kontron/kt690/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/lenovo/t60/mptable.c b/src/mainboard/lenovo/t60/mptable.c index a74aca8..312e30d 100644 --- a/src/mainboard/lenovo/t60/mptable.c +++ b/src/mainboard/lenovo/t60/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/lenovo/x60/mptable.c b/src/mainboard/lenovo/x60/mptable.c index 0ce10ed..f21e76f 100644 --- a/src/mainboard/lenovo/x60/mptable.c +++ b/src/mainboard/lenovo/x60/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c index 4262af1..7d7ba53 100644 --- a/src/mainboard/msi/ms7135/mptable.c +++ b/src/mainboard/msi/ms7135/mptable.c @@ -43,7 +43,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &bus_isa); diff --git a/src/mainboard/msi/ms7260/mptable.c b/src/mainboard/msi/ms7260/mptable.c index bef81ef..41f5bf7 100644 --- a/src/mainboard/msi/ms7260/mptable.c +++ b/src/mainboard/msi/ms7260/mptable.c @@ -37,7 +37,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c index 0f97dca..fe65d7d 100644 --- a/src/mainboard/msi/ms9185/mptable.c +++ b/src/mainboard/msi/ms9185/mptable.c @@ -45,7 +45,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/msi/ms9282/mptable.c b/src/mainboard/msi/ms9282/mptable.c index baba6b5..0559844 100644 --- a/src/mainboard/msi/ms9282/mptable.c +++ b/src/mainboard/msi/ms9282/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/msi/ms9652_fam10/mptable.c b/src/mainboard/msi/ms9652_fam10/mptable.c index 5e45380..35d1172 100644 --- a/src/mainboard/msi/ms9652_fam10/mptable.c +++ b/src/mainboard/msi/ms9652_fam10/mptable.c @@ -37,7 +37,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/newisys/khepri/mptable.c b/src/mainboard/newisys/khepri/mptable.c index 4017fce..8ee6e15 100644 --- a/src/mainboard/newisys/khepri/mptable.c +++ b/src/mainboard/newisys/khepri/mptable.c @@ -15,7 +15,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/nvidia/l1_2pvv/mptable.c b/src/mainboard/nvidia/l1_2pvv/mptable.c index 5d13701..b7e1a88 100644 --- a/src/mainboard/nvidia/l1_2pvv/mptable.c +++ b/src/mainboard/nvidia/l1_2pvv/mptable.c @@ -37,7 +37,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c index 5954c97..9b59bb4 100644 --- a/src/mainboard/roda/rk886ex/mptable.c +++ b/src/mainboard/roda/rk886ex/mptable.c @@ -34,7 +34,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl index 8ad0f82..e03e665 100644 --- a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl +++ b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl @@ -18,6 +18,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <arch/ioapic.h> +#include <cpu/x86/lapic_def.h> DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005) { @@ -418,8 +420,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005) CreateDWordField (MEM1, \_SB.PCI0.MEMR._Y1B._LEN, ML02) If (PCIF) { - Store (0xFEC00000, MB01) - Store (0xFEE00000, MB02) + Store (IO_APIC_ADDR, MB01) + Store (LOCAL_APIC_ADDR, MB02) Store (0x1000, ML01) Store (0x1000, ML02) } diff --git a/src/mainboard/siemens/sitemp_g1p1/mptable.c b/src/mainboard/siemens/sitemp_g1p1/mptable.c index ba2c1e4..dc98382 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mptable.c +++ b/src/mainboard/siemens/sitemp_g1p1/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) int isa_bus; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); get_bus_conf(); diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c index c00c4b8..1ba1dcf 100644 --- a/src/mainboard/sunw/ultra40/mptable.c +++ b/src/mainboard/sunw/ultra40/mptable.c @@ -39,7 +39,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c index cdbe7d6..93fea87 100644 --- a/src/mainboard/supermicro/h8dme/mptable.c +++ b/src/mainboard/supermicro/h8dme/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c index 734fac9..f54e18f 100644 --- a/src/mainboard/supermicro/h8dmr/mptable.c +++ b/src/mainboard/supermicro/h8dmr/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c index f2ee7a8..6ed5840 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c +++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c @@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/h8qgi/mptable.c b/src/mainboard/supermicro/h8qgi/mptable.c index 92771bd..61a7bd4 100644 --- a/src/mainboard/supermicro/h8qgi/mptable.c +++ b/src/mainboard/supermicro/h8qgi/mptable.c @@ -45,7 +45,7 @@ static void *smp_write_config_table(void *v) u32 dword; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); get_bus_conf(); diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c index 2e7c4af..e6d4280 100644 --- a/src/mainboard/supermicro/h8qme_fam10/mptable.c +++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c @@ -38,7 +38,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/h8scm_fam10/mptable.c b/src/mainboard/supermicro/h8scm_fam10/mptable.c index b2c1c92..0c75d1a 100644 --- a/src/mainboard/supermicro/h8scm_fam10/mptable.c +++ b/src/mainboard/supermicro/h8scm_fam10/mptable.c @@ -43,7 +43,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c index acd719d..6ba5309 100644 --- a/src/mainboard/supermicro/x6dai_g/mptable.c +++ b/src/mainboard/supermicro/x6dai_g/mptable.c @@ -13,7 +13,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c index f5f4100..4504d34 100644 --- a/src/mainboard/supermicro/x6dhe_g/mptable.c +++ b/src/mainboard/supermicro/x6dhe_g/mptable.c @@ -16,7 +16,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c index e39a700..087bb9e 100644 --- a/src/mainboard/supermicro/x6dhe_g2/mptable.c +++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c @@ -16,7 +16,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c index 143138d..5d0a08d 100644 --- a/src/mainboard/supermicro/x6dhr_ig/mptable.c +++ b/src/mainboard/supermicro/x6dhr_ig/mptable.c @@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c index a374f5c..b6c94d3 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c +++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c @@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/technexion/tim5690/mptable.c b/src/mainboard/technexion/tim5690/mptable.c index 21a0d05..4ffba6f 100644 --- a/src/mainboard/technexion/tim5690/mptable.c +++ b/src/mainboard/technexion/tim5690/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c index 21a0d05..4ffba6f 100644 --- a/src/mainboard/technexion/tim8690/mptable.c +++ b/src/mainboard/technexion/tim8690/mptable.c @@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c index 9612a4c..9073728 100644 --- a/src/mainboard/tyan/s2735/mptable.c +++ b/src/mainboard/tyan/s2735/mptable.c @@ -12,7 +12,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus); diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c index 5144cec..08027f4 100644 --- a/src/mainboard/tyan/s2850/mptable.c +++ b/src/mainboard/tyan/s2850/mptable.c @@ -53,7 +53,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); { diff --git a/src/mainboard/tyan/s2875/mptable.c b/src/mainboard/tyan/s2875/mptable.c index 67de027..c3765f2 100644 --- a/src/mainboard/tyan/s2875/mptable.c +++ b/src/mainboard/tyan/s2875/mptable.c @@ -54,7 +54,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c index e0058fa..2d34c8b 100644 --- a/src/mainboard/tyan/s2880/mptable.c +++ b/src/mainboard/tyan/s2880/mptable.c @@ -57,7 +57,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c index 80b35bc..7df5e87 100644 --- a/src/mainboard/tyan/s2881/mptable.c +++ b/src/mainboard/tyan/s2881/mptable.c @@ -24,7 +24,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c index b028abb..47c39a7 100644 --- a/src/mainboard/tyan/s2882/mptable.c +++ b/src/mainboard/tyan/s2882/mptable.c @@ -58,7 +58,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); { diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c index fc5109f..26081c7 100644 --- a/src/mainboard/tyan/s2885/mptable.c +++ b/src/mainboard/tyan/s2885/mptable.c @@ -27,7 +27,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2891/mptable.c b/src/mainboard/tyan/s2891/mptable.c index 12d6e78..cb49434 100644 --- a/src/mainboard/tyan/s2891/mptable.c +++ b/src/mainboard/tyan/s2891/mptable.c @@ -28,7 +28,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2892/mptable.c b/src/mainboard/tyan/s2892/mptable.c index 7af319a..882ac69 100644 --- a/src/mainboard/tyan/s2892/mptable.c +++ b/src/mainboard/tyan/s2892/mptable.c @@ -28,7 +28,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2895/mptable.c b/src/mainboard/tyan/s2895/mptable.c index a383cb2..20fa92c 100644 --- a/src/mainboard/tyan/s2895/mptable.c +++ b/src/mainboard/tyan/s2895/mptable.c @@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2912/mptable.c b/src/mainboard/tyan/s2912/mptable.c index 49720dc..9fe7ab7 100644 --- a/src/mainboard/tyan/s2912/mptable.c +++ b/src/mainboard/tyan/s2912/mptable.c @@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s2912_fam10/mptable.c b/src/mainboard/tyan/s2912_fam10/mptable.c index 393362b..8b5f365 100644 --- a/src/mainboard/tyan/s2912_fam10/mptable.c +++ b/src/mainboard/tyan/s2912_fam10/mptable.c @@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c index 6646718..9111a63 100644 --- a/src/mainboard/tyan/s4880/mptable.c +++ b/src/mainboard/tyan/s4880/mptable.c @@ -57,7 +57,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c index c1da3e5..bca26a0 100644 --- a/src/mainboard/tyan/s4882/mptable.c +++ b/src/mainboard/tyan/s4882/mptable.c @@ -57,7 +57,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); diff --git a/src/mainboard/via/epia-n/mainboard.c b/src/mainboard/via/epia-n/mainboard.c index 9227f0a..6e11a00 100644 --- a/src/mainboard/via/epia-n/mainboard.c +++ b/src/mainboard/via/epia-n/mainboard.c @@ -25,6 +25,7 @@ #include <boot/tables.h> #include <arch/ioapic.h> #include <southbridge/via/vt8237r/vt8237r.h> +#include <cpu/x86/lapic_def.h> #include "chip.h" int add_mainboard_resources(struct lb_memory *mem) @@ -33,7 +34,7 @@ int add_mainboard_resources(struct lb_memory *mem) lb_add_memory_range(mem, LB_MEM_RESERVED, IO_APIC_ADDR, 0x1000); lb_add_memory_range(mem, LB_MEM_RESERVED, - 0xFEE00000ULL, 0x1000); + LOCAL_APIC_ADDR, 0x1000); lb_add_memory_range(mem, LB_MEM_RESERVED, 0xFFFF0000ULL, 0x10000); #endif diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c index c7c554a..de25d0e 100644 --- a/src/mainboard/via/epia-n/mptable.c +++ b/src/mainboard/via/epia-n/mptable.c @@ -14,7 +14,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus); diff --git a/src/mainboard/via/pc2500e/mptable.c b/src/mainboard/via/pc2500e/mptable.c index 939f21d..fa69bbe 100644 --- a/src/mainboard/via/pc2500e/mptable.c +++ b/src/mainboard/via/pc2500e/mptable.c @@ -37,7 +37,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus); diff --git a/src/mainboard/via/vt8454c/mptable.c b/src/mainboard/via/vt8454c/mptable.c index 575237f..fc9cb99 100644 --- a/src/mainboard/via/vt8454c/mptable.c +++ b/src/mainboard/via/vt8454c/mptable.c @@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v) mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - mptable_init(mc, LAPIC_ADDR); + mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus);

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Patch set updated for coreboot: cf90fa4 Unify IO APIC address specification
by Patrick Georgi 25 Feb '12

25 Feb '12

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/677 -gerrit commit cf90fa465617a92de7cf65d61f2a395fd7afd8c0 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Thu Feb 16 18:54:37 2012 +0100 Unify IO APIC address specification Some places still hardcoded the address instead of using IO_APIC_ADDR. Change-Id: I3941c1ff62972ce56a5bc466eab7134f901773d3 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/mainboard/amd/torpedo/platform_cfg.h | 2 +- src/mainboard/iwave/iWRainbowG6/mptable.c | 2 +- src/northbridge/intel/i945/acpi/hostbridge.asl | 2 +- src/northbridge/intel/sch/acpi/hostbridge.asl | 2 +- src/southbridge/amd/cimx/sb700/lpc.c | 5 +++-- src/southbridge/amd/cimx/sb800/lpc.c | 5 +++-- src/southbridge/amd/cimx/sb900/lpc.c | 5 +++-- src/southbridge/amd/sb800/lpc.c | 4 ++-- src/southbridge/amd/sb800/sm.c | 8 +++----- src/southbridge/intel/sch/lpc.c | 4 ++-- 10 files changed, 20 insertions(+), 19 deletions(-) diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h index d97d034..cf31c6a 100644 --- a/src/mainboard/amd/torpedo/platform_cfg.h +++ b/src/mainboard/amd/torpedo/platform_cfg.h @@ -137,7 +137,7 @@ * @section WatchDogTimerBase */ // #ifndef WATCHDOG_TIMER_BASE_ADDRESS -// #define WATCHDOG_TIMER_BASE_ADDRESS 0xFEC00000 +// #define WATCHDOG_TIMER_BASE_ADDRESS IO_APIC_ADDR // #endif /** diff --git a/src/mainboard/iwave/iWRainbowG6/mptable.c b/src/mainboard/iwave/iWRainbowG6/mptable.c index 953f16a..87de022 100644 --- a/src/mainboard/iwave/iWRainbowG6/mptable.c +++ b/src/mainboard/iwave/iWRainbowG6/mptable.c @@ -34,7 +34,7 @@ void *smp_write_config_table(void *v) smp_write_processors(mc); mptable_write_buses(mc, NULL, &isa_bus); - smp_write_ioapic(mc, 2, 0x20, 0xfec00000); + smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); { device_t dev; struct resource *res; diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl index a76d8e2..b5f86ae 100644 --- a/src/northbridge/intel/i945/acpi/hostbridge.asl +++ b/src/northbridge/intel/i945/acpi/hostbridge.asl @@ -211,7 +211,7 @@ Method (_CRS, 0, Serialized) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x00000000, 0xfebfffff, 0x00000000, - 0xfec00000,,, PM01) + IO_APIC_BASE,,, PM01) // TPM Area (0xfed40000-0xfed44fff) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, diff --git a/src/northbridge/intel/sch/acpi/hostbridge.asl b/src/northbridge/intel/sch/acpi/hostbridge.asl index 7e92a0e..17a95a4 100644 --- a/src/northbridge/intel/sch/acpi/hostbridge.asl +++ b/src/northbridge/intel/sch/acpi/hostbridge.asl @@ -211,7 +211,7 @@ Method (_CRS, 0, Serialized) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, 0x00000000, 0xfebfffff, 0x00000000, - 0xfec00000,,, PM01) + IO_APIC_ADDR,,, PM01) // TPM Area (0xfed40000-0xfed44fff) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c index e43193a..7157a55 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.c +++ b/src/southbridge/amd/cimx/sb700/lpc.c @@ -21,6 +21,7 @@ #include "lpc.h" #include <bitops.h> #include <arch/io.h> +#include <arch/ioapic.h> #include <console/console.h> /* printk */ #include <cbmem.h> @@ -61,8 +62,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index bc643b5..856b8b3 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <device/pci.h> +#include <arch/ioapic.h> #include "lpc.h" @@ -45,8 +46,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 48bfe36..9873d37 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include "lpc.h" #include <console/console.h> /* printk */ +#include <arch/ioapic.h> void lpc_read_resources(device_t dev) @@ -45,8 +46,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index 6b72a62..4e2031f 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -91,8 +91,8 @@ static void sb800_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - //res = new_resource(dev, 3); /* IOAPIC */ - //res->base = 0xfec00000; + //res = new_resource(dev, 3); + //res->base = IO_APIC_ADDR; //res->size = 0x00001000; //res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c index 9347c42..50a8f0b 100644 --- a/src/southbridge/amd/sb800/sm.c +++ b/src/southbridge/amd/sb800/sm.c @@ -84,16 +84,14 @@ static void sm_init(device_t dev) { u8 byte; - u32 ioapic_base; printk(BIOS_INFO, "sm_init().\n"); - ioapic_base = 0xFEC00000;//pci_read_config32(dev, 0x74) & (0xffffffe0); /* some like mem resource, but does not have enable bit */ /* Don't rename APIC ID */ /* TODO: We should call setup_ioapic() here. But kernel hangs if cpu is K8. * We need to check out why and change back. */ - clear_ioapic(ioapic_base); - //setup_ioapic(ioapic_base, 0); + clear_ioapic(IO_APIC_ADDR); + //setup_ioapic(IO_APIC_ADDR, 0); /* enable serial irq */ byte = pm_ioread(0x54); @@ -277,7 +275,7 @@ static void sb800_sm_read_resources(device_t dev) /* apic */ res = new_resource(dev, 0x74); - res->base = 0xfec00000; + res->base = IO_APIC_ADDR; res->size = 256 * 0x10; res->limit = 0xFEFFFFFUL; /* res->base + res->size -1; */ res->align = 8; diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c index ab180bb..7c203bf 100644 --- a/src/southbridge/intel/sch/lpc.c +++ b/src/southbridge/intel/sch/lpc.c @@ -164,8 +164,8 @@ static void sch_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; }

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coreboot February 2012