coreboot January 2012

coreboot@coreboot.org

40 participants
302 discussions

Patch merged into coreboot/master: e267d74 Indentation: Various indentation fixes
by gerrit＠coreboot.org 05 Jan '12

05 Jan '12

the following patch was just integrated into master: commit e267d74eb35f6df29e9463faf6c75b3f7989af07 Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Mon Dec 26 22:52:01 2011 +0530 Indentation: Various indentation fixes Fixed indentation using indent tool in the src/drivers/i2c tree Change-Id: I5b396e5753544aff13ac5d16afc59e193a6b1da1 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Build-Tested: build bot (Jenkins) at Mon Dec 26 18:42:54 2011, giving +1 Reviewed-By: Kerry Sheh <shekairui(a)gmail.com> at Wed Jan 4 13:09:26 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Thu Jan 5 17:34:50 2012, giving +2 See http://review.coreboot.org/506 for details. -gerrit

1 0

Patch merged into coreboot/master: 898b606 Fix Fam14 AGESA ACPI table generation
by gerrit＠coreboot.org 05 Jan '12

05 Jan '12

the following patch was just integrated into master: commit 898b6065fdc2b26bf8cd4a8f0bf48ff8647e086b Author: Marc Jones <marcj303(a)gmail.com> Date: Mon Dec 12 22:04:25 2011 -0700 Fix Fam14 AGESA ACPI table generation The AGESA wrapper init late call generates the SSDT and other ACPI tables. The call was failing without heap space allocated causing the ASSERT messages in the output. I think are there may still be other issues in integrating the SSDT table with the DSDT, but now it is there to debug. The changes were made in Persimmon and copied to the other Fam14 mainboards. Change-Id: I2cfd14e07cb46d2f46f5a8cd21c4c9aab44e4ffd Signed-off-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 4 05:41:56 2012, giving +1 Reviewed-By: Kerry Sheh <shekairui(a)gmail.com> at Wed Jan 4 12:28:40 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Thu Jan 5 17:29:44 2012, giving +2 See http://review.coreboot.org/517 for details. -gerrit

1 0

Patch merged into coreboot/master: a750360 Clean up AMD Fam14 SSDT
by gerrit＠coreboot.org 05 Jan '12

05 Jan '12

the following patch was just integrated into master: commit a750360f845cebbd5a798d79b567b9ebd5d00003 Author: Marc Jones <marcj303(a)gmail.com> Date: Mon Dec 12 21:12:43 2011 -0700 Clean up AMD Fam14 SSDT The old SSDT ACPI code would only include the AGESA or the coreboot SSDT. Now include both. AGESA generates the Pstate SSDT and the second coreboot SSDT is for TOM and TOM2. Now, generate the coreboot SSDT instead of patching it. This fixes some ACPI errors in Linux and Windows bluescreens. The Persimmon acpi_tables.c is where the main changes were made and then replicated in the other Fam14 boards. Please test the other mainbords if you have one. Change-Id: I808c863597e024e3e8aeec0821e8618d96cc96a6 Signed-off-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 4 05:31:14 2012, giving +1 Reviewed-By: Kerry Sheh <shekairui(a)gmail.com> at Wed Jan 4 12:30:20 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Thu Jan 5 17:29:10 2012, giving +2 See http://review.coreboot.org/516 for details. -gerrit

1 0

Patch merged into coreboot/master: a2f4c41 Fix Fam14 mainboard whitespace
by gerrit＠coreboot.org 05 Jan '12

05 Jan '12

the following patch was just integrated into master: commit a2f4c419f0526c66cfc51217baf64729f60affca Author: Marc Jones <marcj303(a)gmail.com> Date: Tue Jan 3 16:02:07 2012 -0700 Fix Fam14 mainboard whitespace Fix whitespace and tab issues on fam14 mainbords in preperations for upcoming changes Change-Id: I6d63d428dde0a5d9748027e603b03de25d3be472 Signed-off-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 4 05:19:57 2012, giving +1 Reviewed-By: Kerry Sheh <shekairui(a)gmail.com> at Wed Jan 4 12:15:44 2012, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Thu Jan 5 17:28:19 2012, giving +2 See http://review.coreboot.org/515 for details. -gerrit

1 0

MSR discrepancies
by Philip Prindeville 05 Jan '12

05 Jan '12

I was looking at the devicetree.cb values for the alix2 versus what I see on my alix6: root@OpenWrt:/# rdmsr 0x51400025 1002 root@OpenWrt:/# rdmsr 0x5140004e effd00c0 root@OpenWrt:/# I'm not sure how significant these differences are: chip northbridge/amd/lx device pci_domain 0 on device pci 1.0 on end device pci 1.1 on end chip southbridge/amd/cs5536 # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK # SIRQ Mode = Active(Quiet) mode. Save power.... # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK # How to get these? Boot linux and do this: # rdmsr 0x51400025 register "lpc_serirq_enable" = "0x00001002" # rdmsr 0x5140004e -- polairy is high 16 bits of low 32 bits register "lpc_serirq_polarity" = "0x0000EFFD" # mode is high 10 bits (determined from code) register "lpc_serirq_mode" = "1" # Don't yet know how to find this. register "enable_gpio_int_route" = "0x0D0C0700" register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash register "enable_USBP4_device" = "0" #0: host, 1:device

2 1

Patch merged into coreboot/master: b21ed15 rs780: power down GPPSB SB lane pads in correct PCIe core
by gerrit＠coreboot.org 05 Jan '12

05 Jan '12

the following patch was just integrated into master: commit b21ed1585ff2c6889678c83e66651d83b5e277e3 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Wed Jan 4 19:43:49 2012 -0600 rs780: power down GPPSB SB lane pads in correct PCIe core Change-Id: I059d5b155cae051f31cc2495f8a47d53e01af808 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Build-Tested: build bot (Jenkins) at Thu Jan 5 03:12:41 2012, giving +1 Reviewed-By: Peter Stuge <peter(a)stuge.se> at Thu Jan 5 04:25:09 2012, giving +2 See http://review.coreboot.org/519 for details. -gerrit

1 0

New patch to review for coreboot: b21ed15 rs780: power down GPPSB SB lane pads in correct PCIe core
by Jonathan A. Kollasch 05 Jan '12

05 Jan '12

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/519 -gerrit commit b21ed1585ff2c6889678c83e66651d83b5e277e3 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Wed Jan 4 19:43:49 2012 -0600 rs780: power down GPPSB SB lane pads in correct PCIe core Change-Id: I059d5b155cae051f31cc2495f8a47d53e01af808 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/southbridge/amd/rs780/pcie.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/southbridge/amd/rs780/pcie.c b/src/southbridge/amd/rs780/pcie.c index 5e2d985..efa2e58 100644 --- a/src/southbridge/amd/rs780/pcie.c +++ b/src/southbridge/amd/rs780/pcie.c @@ -86,15 +86,21 @@ static void PciePowerOffGppPorts(device_t nb_dev, device_t dev, u32 port) Config & (PCIE_DISABLE_HIDE_UNUSED_PORTS + PCIE_GFX_COMPLIANCE))) { } + /* step 3 Power Down Control for Southbridge */ + if (port != 8) + return; + reg = nbpcie_p_read_index(dev, 0xa2); switch ((reg >> 4) & 0x7) { /* get bit 4-6, LC_LINK_WIDTH_RD */ case 1: - nbpcie_ind_write_index(nb_dev, 0x65, 0x0e0e); + set_pcie_enable_bits(nb_dev, 0x65 | PCIE_CORE_INDEX_GPPSB, + 0x0f0f, 0x0e0e); break; case 2: - nbpcie_ind_write_index(nb_dev, 0x65, 0x0c0c); + set_pcie_enable_bits(nb_dev, 0x65 | PCIE_CORE_INDEX_GPPSB, + 0x0f0f, 0x0c0c); break; default: break;

1 0

New patch to review for coreboot: e74bd22 rs780: use bitwise rather than boolean not
by Jonathan A. Kollasch 05 Jan '12

05 Jan '12

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/518 -gerrit commit e74bd229bfc01533d9547b519b0ed1afdbc776c5 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Wed Jan 4 19:37:48 2012 -0600 rs780: use bitwise rather than boolean not Change-Id: Ie3872c57990f9784aafda14f8c7fc842b3a65260 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/southbridge/amd/rs780/pcie.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/southbridge/amd/rs780/pcie.c b/src/southbridge/amd/rs780/pcie.c index 5e2d985..b55da89 100644 --- a/src/southbridge/amd/rs780/pcie.c +++ b/src/southbridge/amd/rs780/pcie.c @@ -72,7 +72,7 @@ static void PciePowerOffGppPorts(device_t nb_dev, device_t dev, u32 port) state = ~state; state &= (1 << 4) + (1 << 5) + (1 << 6) + (1 << 7); state_save = state << 17; - state &= !(AtiPcieCfg.PortHp); + state &= ~(AtiPcieCfg.PortHp); reg = nbmisc_read_index(nb_dev, 0x0c); reg |= state; nbmisc_write_index(nb_dev, 0x0c, reg);

1 0

Patch set updated for coreboot: b7929ad Fix multipleVGA cards resource conflict on Windows
by Kerry Sheh 04 Jan '12

04 Jan '12

Kerry Sheh (shekairui(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/489 -gerrit commit b7929add7bf1b40795e0a16ab08fc47858971ccc Author: Kerry Sheh <shekairui(a)gmail.com> Date: Wed Jan 4 20:51:47 2012 +0800 Fix multipleVGA cards resource conflict on Windows If multiple VGA-compatible legacy graphic cards decode the IO range 3B0-3BB, 3C0-3DF and MEM range A00000-BFFFF. Windows 7 complain a resource conflict, so only one VGA card can works at the same time. There is a discussion in coreboot mail list before, please reference thread: "how to prevent legacy resource conflictwith multipleVGA cards" http://www.coreboot.org/pipermail/coreboot/2010-October/061508.html Linux using VGA Arbiter module(vgaarb) to resolve this resource conflict, Please see the following linux dmesg log, more information can be found in Linux source dir Documentation/vgaarbiter.txt. But it seems that windows don't dealwith this conflict. ~# dmesg | grep -i vgaarb [ 0.774076] vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem [ 0.776065] vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=none,l [ 0.780051] vgaarb: loaded [ 0.784049] vgaarb: bridge control possible 0000:01:00.0 [ 0.788050] vgaarb: bridge control possible 0000:00:01.0 For the second legacy graphic device, coreboot already disabled the IO and MEM decode in function set_vga_bridge_bits(). But it will be enabled again in function pci_set_resource(), if the second legacy vga-compatible graphic device take any IO/MEM resources. Following log printed by enable_resources() shows the problem: ...snip... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 subsystem <- 1022/1410 PCI: 00:01.0 cmd <- 07 <== The first graphic device PCI: 00:01.1 subsystem <- 1022/1410 PCI: 00:01.1 cmd <- 02 PCI: 00:02.0 bridge ctrl <- 0003 PCI: 00:02.0 cmd <- 07 ...snip... PCI: 01:00.0 cmd <- 03 <== The second graphic device PCI: 01:00.1 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 03:00.0 cmd <- 03 done. ...snip... The IO & MEM decoding on the second vga graphic device should be disabled. Please reference PCI spec. section 3.10 in detail. set_vga_bridge_bits() would do this work for us, it did the right thing, but was put to the wrong place, the setting would be overwritten by assign_resources() later. In order to make sure the set_vga_bridge_bits() setting not be overwritten by others, moving the call of set_vga_bridge_bits() to the end of dev_configure(), instead of at the beginning. This patch resolved the dual graphic cards resource conflict in windows7, multiple vga-compatible graphic cards can work together in windows7. Signed-off-by: Kerry Sheh <shekairui(a)gmail.com> Signed-off-by: Kerry Sheh <kerry.she(a)amd.com> Change-Id: I0de5e3761b51e2723d9c1dc0c39fff692e3a779d --- src/devices/device.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/devices/device.c b/src/devices/device.c index a2619bf..8ad9787 100644 --- a/src/devices/device.c +++ b/src/devices/device.c @@ -932,10 +932,6 @@ void dev_configure(void) struct device *root; struct device *child; -#if CONFIG_VGA_BRIDGE_SETUP == 1 - set_vga_bridge_bits(); -#endif - printk(BIOS_INFO, "Allocating resources...\n"); root = &dev_root; @@ -1028,6 +1024,10 @@ void dev_configure(void) printk(BIOS_INFO, "Done setting resources.\n"); print_resource_tree(root, BIOS_SPEW, "After assigning values."); +#if CONFIG_VGA_BRIDGE_SETUP == 1 + set_vga_bridge_bits(); +#endif + printk(BIOS_INFO, "Done allocating resources.\n"); }

1 0

New patch to review for coreboot: a750360 Clean up AMD Fam14 SSDT
by Marc Jones 04 Jan '12

04 Jan '12

Marc Jones (marcj303(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/516 -gerrit commit a750360f845cebbd5a798d79b567b9ebd5d00003 Author: Marc Jones <marcj303(a)gmail.com> Date: Mon Dec 12 21:12:43 2011 -0700 Clean up AMD Fam14 SSDT The old SSDT ACPI code would only include the AGESA or the coreboot SSDT. Now include both. AGESA generates the Pstate SSDT and the second coreboot SSDT is for TOM and TOM2. Now, generate the coreboot SSDT instead of patching it. This fixes some ACPI errors in Linux and Windows bluescreens. The Persimmon acpi_tables.c is where the main changes were made and then replicated in the other Fam14 boards. Please test the other mainbords if you have one. Change-Id: I808c863597e024e3e8aeec0821e8618d96cc96a6 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- src/mainboard/amd/inagua/acpi_tables.c | 84 ++++-- src/mainboard/amd/persimmon/acpi/ssdt2.asl | 84 ------ src/mainboard/amd/persimmon/acpi/ssdt3.asl | 84 ------ src/mainboard/amd/persimmon/acpi/ssdt4.asl | 84 ------ src/mainboard/amd/persimmon/acpi/ssdt5.asl | 85 ------ src/mainboard/amd/persimmon/acpi_tables.c | 59 +++- src/mainboard/amd/south_station/acpi_tables.c | 74 ++++-- src/mainboard/amd/union_station/acpi_tables.c | 74 ++++-- src/mainboard/asrock/e350m1/acpi_tables.c | 158 ++++++----- src/northbridge/amd/agesa/family14/Makefile.inc | 2 - src/northbridge/amd/agesa/family14/ssdt.asl | 346 ----------------------- 11 files changed, 287 insertions(+), 847 deletions(-) diff --git a/src/mainboard/amd/inagua/acpi_tables.c b/src/mainboard/amd/inagua/acpi_tables.c index 6450f35..74df922 100644 --- a/src/mainboard/amd/inagua/acpi_tables.c +++ b/src/mainboard/amd/inagua/acpi_tables.c @@ -21,17 +21,14 @@ #include <string.h> #include <arch/acpi.h> #include <arch/ioapic.h> -#include <arch/io.h> #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> - #include "agesawrapper.h" +#include <cpu/amd/mtrr.h> +#include <cpu/amd/amdfam14.h> #define DUMP_ACPI_TABLES 0 -extern u32 apicid_sb800; - #if DUMP_ACPI_TABLES == 1 @@ -51,8 +48,29 @@ static void dump_mem(u32 start, u32 end) #endif extern const unsigned char AmlCode[]; -extern const unsigned char AmlCode_ssdt[]; +unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) +{ + int lens; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + + lens = acpigen_write_scope(pscope); + msr = rdmsr(TOP_MEM); + lens += acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_patch_len(lens - 1); + return (unsigned long) (acpigen_get_current()); +} unsigned long acpi_fill_mcfg(unsigned long current) { @@ -62,17 +80,17 @@ unsigned long acpi_fill_mcfg(unsigned long current) unsigned long acpi_fill_madt(unsigned long current) { - /* create all subtables for processors */ - current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 0); - current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 1); + current = acpi_create_madt_lapics(current); /* Write SB800 IOAPIC, only one */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sb800, - IO_APIC_ADDR, 0); + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, + CONFIG_MAX_CPUS, IO_APIC_ADDR, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 0); + current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) + current, 0, 9, 9, 0xF); /* 0: mean bus 0--->ISA */ /* 0: PIC 0 */ @@ -80,8 +98,7 @@ unsigned long acpi_fill_madt(unsigned long current) /* 5 mean: 0101 --> Edige-triggered, Active high */ /* create all subtables for processors */ - current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0, 5, 1); - current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 1, 5, 1); + /* current = acpi_create_madt_lapic_nmis(current, 5, 1); */ /* 1: LINT1 connect to NMI */ return current; @@ -112,6 +129,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_facs_t *facs; acpi_header_t *dsdt; acpi_header_t *ssdt; + acpi_header_t *ssdt2; get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ @@ -136,7 +154,7 @@ unsigned long write_acpi_tables(unsigned long start) /* DSDT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); - dsdt = (acpi_header_t *)current; // it will used by fadt + dsdt = (acpi_header_t *)current; memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); current += dsdt->length; memcpy(dsdt, &AmlCode, dsdt->length); @@ -145,7 +163,7 @@ unsigned long write_acpi_tables(unsigned long start) /* FACS */ // it needs 64 bit alignment current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); - facs = (acpi_facs_t *) current; // it will be used by fadt + facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); acpi_create_facs(facs); @@ -161,14 +179,12 @@ unsigned long write_acpi_tables(unsigned long start) /* * We explicitly add these tables later on: */ -#if 0 // Don't need HPET table. current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current); hpet = (acpi_hpet_t *) current; current += sizeof(acpi_hpet_t); acpi_create_hpet(hpet); acpi_add_table(rsdp, hpet); -#endif /* If we want to use HPET Timers Linux wants an MADT */ current = ( current + 0x07) & -0x08; @@ -183,46 +199,49 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *) agesawrapper_getlateinitptr (PICK_SRAT); if (srat != NULL) { - memcpy(current, srat, srat->header.length); + memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } + else { + printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); + } /* SLIT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *) agesawrapper_getlateinitptr (PICK_SLIT); if (slit != NULL) { - memcpy(current, slit, slit->header.length); + memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } + else { + printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); + } /* SSDT */ current = ( current + 0x0f) & -0x10; - printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); + printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); if (ssdt != NULL) { - memcpy(current, ssdt, ssdt->length); + memcpy((void *)current, ssdt, ssdt->length); ssdt = (acpi_header_t *) current; current += ssdt->length; } else { - ssdt = (acpi_header_t *) current; - memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, &AmlCode_ssdt, ssdt->length); - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + printk(BIOS_DEBUG, " AGESA SSDT table NULL. Skipping.\n"); } acpi_add_table(rsdp,ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * coreboot TOM SSDT2 at %lx\n", current); + ssdt2 = (acpi_header_t *) current; + acpi_create_ssdt_generator(ssdt2, ACPI_TABLE_CREATOR); + current += ssdt2->length; + acpi_add_table(rsdp,ssdt2); #if DUMP_ACPI_TABLES == 1 printk(BIOS_DEBUG, "rsdp\n"); @@ -243,6 +262,9 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ssdt\n"); dump_mem(ssdt, ((void *)ssdt) + ssdt->length); + printk(BIOS_DEBUG, "ssdt2\n"); + dump_mem(ssdt2, ((void *)ssdt2) + ssdt2->length); + printk(BIOS_DEBUG, "fadt\n"); dump_mem(fadt, ((void *)fadt) + fadt->header.length); #endif diff --git a/src/mainboard/amd/persimmon/acpi/ssdt2.asl b/src/mainboard/amd/persimmon/acpi/ssdt2.asl deleted file mode 100644 index ef1a4bf..0000000 --- a/src/mainboard/amd/persimmon/acpi/ssdt2.asl +++ /dev/null @@ -1,84 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440) -{ - Scope (_SB) - { - External (DADD, MethodObj) - External (GHCE, MethodObj) - External (GHCN, MethodObj) - External (GHCL, MethodObj) - External (GHCD, MethodObj) - External (GNUS, MethodObj) - External (GIOR, MethodObj) - External (GMEM, MethodObj) - External (GWBN, MethodObj) - External (GBUS, MethodObj) - - External (PICF) - - External (\_SB.PCI0.LNKA, DeviceObj) - External (\_SB.PCI0.LNKB, DeviceObj) - External (\_SB.PCI0.LNKC, DeviceObj) - External (\_SB.PCI0.LNKD, DeviceObj) - - Device (PCIX) - { - - // BUS ? Second HT Chain - Name (HCIN, 0xcc) // HC2 0x01 - - Name (_UID, 0xdd) // HC 0x03 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00000000)) - } - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - #include "acpi/pci2_hc.asl" - } - } - -} - diff --git a/src/mainboard/amd/persimmon/acpi/ssdt3.asl b/src/mainboard/amd/persimmon/acpi/ssdt3.asl deleted file mode 100644 index 68a4b95..0000000 --- a/src/mainboard/amd/persimmon/acpi/ssdt3.asl +++ /dev/null @@ -1,84 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440) -{ - Scope (_SB) - { - External (DADD, MethodObj) - External (GHCE, MethodObj) - External (GHCN, MethodObj) - External (GHCL, MethodObj) - External (GHCD, MethodObj) - External (GNUS, MethodObj) - External (GIOR, MethodObj) - External (GMEM, MethodObj) - External (GWBN, MethodObj) - External (GBUS, MethodObj) - - External (PICF) - - External (\_SB.PCI0.LNKA, DeviceObj) - External (\_SB.PCI0.LNKB, DeviceObj) - External (\_SB.PCI0.LNKC, DeviceObj) - External (\_SB.PCI0.LNKD, DeviceObj) - - Device (PCIX) - { - - // BUS ? Second HT Chain - Name (HCIN, 0xcc) // HC2 0x01 - - Name (_UID, 0xdd) // HC 0x03 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00000000)) - } - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - #include "acpi/pci3_hc.asl" - } - } - -} - diff --git a/src/mainboard/amd/persimmon/acpi/ssdt4.asl b/src/mainboard/amd/persimmon/acpi/ssdt4.asl deleted file mode 100644 index e06fe8a..0000000 --- a/src/mainboard/amd/persimmon/acpi/ssdt4.asl +++ /dev/null @@ -1,84 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440) -{ - Scope (_SB) - { - External (DADD, MethodObj) - External (GHCE, MethodObj) - External (GHCN, MethodObj) - External (GHCL, MethodObj) - External (GHCD, MethodObj) - External (GNUS, MethodObj) - External (GIOR, MethodObj) - External (GMEM, MethodObj) - External (GWBN, MethodObj) - External (GBUS, MethodObj) - - External (PICF) - - External (\_SB.PCI0.LNKA, DeviceObj) - External (\_SB.PCI0.LNKB, DeviceObj) - External (\_SB.PCI0.LNKC, DeviceObj) - External (\_SB.PCI0.LNKD, DeviceObj) - - Device (PCIX) - { - - // BUS ? Second HT Chain - Name (HCIN, 0xcc) // HC2 0x01 - - Name (_UID, 0xdd) // HC 0x03 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00000000)) - } - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - #include "acpi/pci4_hc.asl" - } - } - -} - diff --git a/src/mainboard/amd/persimmon/acpi/ssdt5.asl b/src/mainboard/amd/persimmon/acpi/ssdt5.asl deleted file mode 100644 index a141a37..0000000 --- a/src/mainboard/amd/persimmon/acpi/ssdt5.asl +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440) -{ - Scope (_SB) - { - External (DADD, MethodObj) - External (GHCE, MethodObj) - External (GHCN, MethodObj) - External (GHCL, MethodObj) - External (GHCD, MethodObj) - External (GNUS, MethodObj) - External (GIOR, MethodObj) - External (GMEM, MethodObj) - External (GWBN, MethodObj) - External (GBUS, MethodObj) - - External (PICF) - - External (\_SB.PCI0.LNKA, DeviceObj) - External (\_SB.PCI0.LNKB, DeviceObj) - External (\_SB.PCI0.LNKC, DeviceObj) - External (\_SB.PCI0.LNKD, DeviceObj) - - Device (PCIX) - { - - // BUS ? Second HT Chain - Name (HCIN, 0xcc) // HC2 0x01 - - Name (_UID, 0xdd) // HC 0x03 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00000000)) - } - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - #include "acpi/pci5_hc.asl" - } - } - -} - diff --git a/src/mainboard/amd/persimmon/acpi_tables.c b/src/mainboard/amd/persimmon/acpi_tables.c index 99a6e88..47e35af 100644 --- a/src/mainboard/amd/persimmon/acpi_tables.c +++ b/src/mainboard/amd/persimmon/acpi_tables.c @@ -48,7 +48,29 @@ static void dump_mem(u32 start, u32 end) #endif extern const unsigned char AmlCode[]; -extern const unsigned char AmlCode_ssdt[]; + +unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) +{ + int lens; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + + lens = acpigen_write_scope(pscope); + msr = rdmsr(TOP_MEM); + lens += acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_patch_len(lens - 1); + return (unsigned long) (acpigen_get_current()); +} unsigned long acpi_fill_mcfg(unsigned long current) { @@ -107,6 +129,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_facs_t *facs; acpi_header_t *dsdt; acpi_header_t *ssdt; + acpi_header_t *ssdt2; get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ @@ -131,7 +154,7 @@ unsigned long write_acpi_tables(unsigned long start) /* DSDT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); - dsdt = (acpi_header_t *)current; // it will used by fadt + dsdt = (acpi_header_t *)current; memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); current += dsdt->length; memcpy(dsdt, &AmlCode, dsdt->length); @@ -140,11 +163,11 @@ unsigned long write_acpi_tables(unsigned long start) /* FACS */ // it needs 64 bit alignment current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); - facs = (acpi_facs_t *) current; // it will be used by fadt + facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); acpi_create_facs(facs); - /* FDAT */ + /* FADT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current); fadt = (acpi_fadt_t *) current; @@ -178,10 +201,12 @@ unsigned long write_acpi_tables(unsigned long start) if (srat != NULL) { memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } + else { + printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); + } /* SLIT */ current = ( current + 0x07) & -0x08; @@ -190,14 +215,16 @@ unsigned long write_acpi_tables(unsigned long start) if (slit != NULL) { memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } + else { + printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); + } /* SSDT */ current = ( current + 0x0f) & -0x10; - printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); + printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); if (ssdt != NULL) { memcpy((void *)current, ssdt, ssdt->length); @@ -205,17 +232,16 @@ unsigned long write_acpi_tables(unsigned long start) current += ssdt->length; } else { - ssdt = (acpi_header_t *) current; - memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, &AmlCode_ssdt, ssdt->length); - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + printk(BIOS_DEBUG, " AGESA SSDT table NULL. Skipping.\n"); } acpi_add_table(rsdp,ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * coreboot TOM SSDT2 at %lx\n", current); + ssdt2 = (acpi_header_t *) current; + acpi_create_ssdt_generator(ssdt2, ACPI_TABLE_CREATOR); + current += ssdt2->length; + acpi_add_table(rsdp,ssdt2); #if DUMP_ACPI_TABLES == 1 printk(BIOS_DEBUG, "rsdp\n"); @@ -236,6 +262,9 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ssdt\n"); dump_mem(ssdt, ((void *)ssdt) + ssdt->length); + printk(BIOS_DEBUG, "ssdt2\n"); + dump_mem(ssdt2, ((void *)ssdt2) + ssdt2->length); + printk(BIOS_DEBUG, "fadt\n"); dump_mem(fadt, ((void *)fadt) + fadt->header.length); #endif diff --git a/src/mainboard/amd/south_station/acpi_tables.c b/src/mainboard/amd/south_station/acpi_tables.c index ae058d6..74df922 100644 --- a/src/mainboard/amd/south_station/acpi_tables.c +++ b/src/mainboard/amd/south_station/acpi_tables.c @@ -48,7 +48,29 @@ static void dump_mem(u32 start, u32 end) #endif extern const unsigned char AmlCode[]; -extern const unsigned char AmlCode_ssdt[]; + +unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) +{ + int lens; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + + lens = acpigen_write_scope(pscope); + msr = rdmsr(TOP_MEM); + lens += acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_patch_len(lens - 1); + return (unsigned long) (acpigen_get_current()); +} unsigned long acpi_fill_mcfg(unsigned long current) { @@ -62,13 +84,14 @@ unsigned long acpi_fill_madt(unsigned long current) current = acpi_create_madt_lapics(current); /* Write SB800 IOAPIC, only one */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS, - IO_APIC_ADDR, 0); + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, + CONFIG_MAX_CPUS, IO_APIC_ADDR, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0); + current, 0, 0, 2, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, 0xF); + current, 0, 9, 9, 0xF); + /* 0: mean bus 0--->ISA */ /* 0: PIC 0 */ /* 2: APIC 2 */ @@ -106,6 +129,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_facs_t *facs; acpi_header_t *dsdt; acpi_header_t *ssdt; + acpi_header_t *ssdt2; get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ @@ -130,7 +154,7 @@ unsigned long write_acpi_tables(unsigned long start) /* DSDT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); - dsdt = (acpi_header_t *)current; // it will used by fadt + dsdt = (acpi_header_t *)current; memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); current += dsdt->length; memcpy(dsdt, &AmlCode, dsdt->length); @@ -138,12 +162,12 @@ unsigned long write_acpi_tables(unsigned long start) /* FACS */ // it needs 64 bit alignment current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); - facs = (acpi_facs_t *) current; // it will be used by fadt + printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); + facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); acpi_create_facs(facs); - /* FDAT */ + /* FADT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current); fadt = (acpi_fadt_t *) current; @@ -177,10 +201,12 @@ unsigned long write_acpi_tables(unsigned long start) if (srat != NULL) { memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } + else { + printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); + } /* SLIT */ current = ( current + 0x07) & -0x08; @@ -189,14 +215,16 @@ unsigned long write_acpi_tables(unsigned long start) if (slit != NULL) { memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } + else { + printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); + } /* SSDT */ current = ( current + 0x0f) & -0x10; - printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); + printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); if (ssdt != NULL) { memcpy((void *)current, ssdt, ssdt->length); @@ -204,21 +232,16 @@ unsigned long write_acpi_tables(unsigned long start) current += ssdt->length; } else { - ssdt = (acpi_header_t *) current; - memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, &AmlCode_ssdt, ssdt->length); - char *position = ssdt; - if (memcmp(position + 50, "TOM1", 4) == 0) - *(u32 *)(position + 55) = __readmsr(0xc001001a); - - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + printk(BIOS_DEBUG, " AGESA SSDT table NULL. Skipping.\n"); } acpi_add_table(rsdp,ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * coreboot TOM SSDT2 at %lx\n", current); + ssdt2 = (acpi_header_t *) current; + acpi_create_ssdt_generator(ssdt2, ACPI_TABLE_CREATOR); + current += ssdt2->length; + acpi_add_table(rsdp,ssdt2); #if DUMP_ACPI_TABLES == 1 printk(BIOS_DEBUG, "rsdp\n"); @@ -239,6 +262,9 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ssdt\n"); dump_mem(ssdt, ((void *)ssdt) + ssdt->length); + printk(BIOS_DEBUG, "ssdt2\n"); + dump_mem(ssdt2, ((void *)ssdt2) + ssdt2->length); + printk(BIOS_DEBUG, "fadt\n"); dump_mem(fadt, ((void *)fadt) + fadt->header.length); #endif diff --git a/src/mainboard/amd/union_station/acpi_tables.c b/src/mainboard/amd/union_station/acpi_tables.c index ae058d6..74df922 100644 --- a/src/mainboard/amd/union_station/acpi_tables.c +++ b/src/mainboard/amd/union_station/acpi_tables.c @@ -48,7 +48,29 @@ static void dump_mem(u32 start, u32 end) #endif extern const unsigned char AmlCode[]; -extern const unsigned char AmlCode_ssdt[]; + +unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) +{ + int lens; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + + lens = acpigen_write_scope(pscope); + msr = rdmsr(TOP_MEM); + lens += acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_patch_len(lens - 1); + return (unsigned long) (acpigen_get_current()); +} unsigned long acpi_fill_mcfg(unsigned long current) { @@ -62,13 +84,14 @@ unsigned long acpi_fill_madt(unsigned long current) current = acpi_create_madt_lapics(current); /* Write SB800 IOAPIC, only one */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, CONFIG_MAX_CPUS, - IO_APIC_ADDR, 0); + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, + CONFIG_MAX_CPUS, IO_APIC_ADDR, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0); + current, 0, 0, 2, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, 0xF); + current, 0, 9, 9, 0xF); + /* 0: mean bus 0--->ISA */ /* 0: PIC 0 */ /* 2: APIC 2 */ @@ -106,6 +129,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_facs_t *facs; acpi_header_t *dsdt; acpi_header_t *ssdt; + acpi_header_t *ssdt2; get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ @@ -130,7 +154,7 @@ unsigned long write_acpi_tables(unsigned long start) /* DSDT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); - dsdt = (acpi_header_t *)current; // it will used by fadt + dsdt = (acpi_header_t *)current; memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); current += dsdt->length; memcpy(dsdt, &AmlCode, dsdt->length); @@ -138,12 +162,12 @@ unsigned long write_acpi_tables(unsigned long start) /* FACS */ // it needs 64 bit alignment current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); - facs = (acpi_facs_t *) current; // it will be used by fadt + printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); + facs = (acpi_facs_t *) current; current += sizeof(acpi_facs_t); acpi_create_facs(facs); - /* FDAT */ + /* FADT */ current = ( current + 0x07) & -0x08; printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current); fadt = (acpi_fadt_t *) current; @@ -177,10 +201,12 @@ unsigned long write_acpi_tables(unsigned long start) if (srat != NULL) { memcpy((void *)current, srat, srat->header.length); srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); current += srat->header.length; acpi_add_table(rsdp, srat); } + else { + printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); + } /* SLIT */ current = ( current + 0x07) & -0x08; @@ -189,14 +215,16 @@ unsigned long write_acpi_tables(unsigned long start) if (slit != NULL) { memcpy((void *)current, slit, slit->header.length); slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); current += slit->header.length; acpi_add_table(rsdp, slit); } + else { + printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); + } /* SSDT */ current = ( current + 0x0f) & -0x10; - printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); + printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); if (ssdt != NULL) { memcpy((void *)current, ssdt, ssdt->length); @@ -204,21 +232,16 @@ unsigned long write_acpi_tables(unsigned long start) current += ssdt->length; } else { - ssdt = (acpi_header_t *) current; - memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, &AmlCode_ssdt, ssdt->length); - char *position = ssdt; - if (memcmp(position + 50, "TOM1", 4) == 0) - *(u32 *)(position + 55) = __readmsr(0xc001001a); - - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + printk(BIOS_DEBUG, " AGESA SSDT table NULL. Skipping.\n"); } acpi_add_table(rsdp,ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * coreboot TOM SSDT2 at %lx\n", current); + ssdt2 = (acpi_header_t *) current; + acpi_create_ssdt_generator(ssdt2, ACPI_TABLE_CREATOR); + current += ssdt2->length; + acpi_add_table(rsdp,ssdt2); #if DUMP_ACPI_TABLES == 1 printk(BIOS_DEBUG, "rsdp\n"); @@ -239,6 +262,9 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ssdt\n"); dump_mem(ssdt, ((void *)ssdt) + ssdt->length); + printk(BIOS_DEBUG, "ssdt2\n"); + dump_mem(ssdt2, ((void *)ssdt2) + ssdt2->length); + printk(BIOS_DEBUG, "fadt\n"); dump_mem(fadt, ((void *)fadt) + fadt->header.length); #endif diff --git a/src/mainboard/asrock/e350m1/acpi_tables.c b/src/mainboard/asrock/e350m1/acpi_tables.c index 593ec46..74df922 100644 --- a/src/mainboard/asrock/e350m1/acpi_tables.c +++ b/src/mainboard/asrock/e350m1/acpi_tables.c @@ -24,11 +24,9 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -//#include <cpu/amd/amdfam10_sysconf.h> - -//#include "mb_sysconf.h" #include "agesawrapper.h" +#include <cpu/amd/mtrr.h> +#include <cpu/amd/amdfam14.h> #define DUMP_ACPI_TABLES 0 @@ -50,7 +48,29 @@ static void dump_mem(u32 start, u32 end) #endif extern const unsigned char AmlCode[]; -extern const unsigned char AmlCode_ssdt[]; + +unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) +{ + int lens; + msr_t msr; + char pscope[] = "\\_SB.PCI0"; + + lens = acpigen_write_scope(pscope); + msr = rdmsr(TOP_MEM); + lens += acpigen_write_name_dword("TOM1", msr.lo); + msr = rdmsr(TOP_MEM2); + /* + * Since XP only implements parts of ACPI 2.0, we can't use a qword + * here. + * See http://www.acpi.info/presentations/S01USMOBS169_OS%2520new.ppt + * slide 22ff. + * Shift value right by 20 bit to make it fit into 32bit, + * giving us 1MB granularity and a limit of almost 4Exabyte of memory. + */ + lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + acpigen_patch_len(lens - 1); + return (unsigned long) (acpigen_get_current()); +} unsigned long acpi_fill_mcfg(unsigned long current) { @@ -109,6 +129,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_facs_t *facs; acpi_header_t *dsdt; acpi_header_t *ssdt; + acpi_header_t *ssdt2; get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */ @@ -130,99 +151,97 @@ unsigned long write_acpi_tables(unsigned long start) acpi_write_rsdp(rsdp, rsdt, NULL); acpi_write_rsdt(rsdt); + /* DSDT */ + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); + dsdt = (acpi_header_t *)current; + memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); + current += dsdt->length; + memcpy(dsdt, &AmlCode, dsdt->length); + printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n",dsdt,dsdt->length); + + /* FACS */ // it needs 64 bit alignment + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); + facs = (acpi_facs_t *) current; + current += sizeof(acpi_facs_t); + acpi_create_facs(facs); + + /* FADT */ + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current); + fadt = (acpi_fadt_t *) current; + current += sizeof(acpi_fadt_t); + + acpi_create_fadt(fadt, facs, dsdt); + acpi_add_table(rsdp, fadt); + /* - * We explicitly add these tables later on: - */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current); + * We explicitly add these tables later on: + */ + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current); hpet = (acpi_hpet_t *) current; current += sizeof(acpi_hpet_t); acpi_create_hpet(hpet); acpi_add_table(rsdp, hpet); /* If we want to use HPET Timers Linux wants an MADT */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * MADT at %lx\n",current); + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * MADT at %lx\n",current); madt = (acpi_madt_t *) current; acpi_create_madt(madt); current += madt->header.length; acpi_add_table(rsdp, madt); /* SRAT */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *) agesawrapper_getlateinitptr (PICK_SRAT); if (srat != NULL) { - memcpy(current, srat, srat->header.length); - srat = (acpi_srat_t *) current; - //acpi_create_srat(srat); - current += srat->header.length; - acpi_add_table(rsdp, srat); + memcpy((void *)current, srat, srat->header.length); + srat = (acpi_srat_t *) current; + current += srat->header.length; + acpi_add_table(rsdp, srat); + } + else { + printk(BIOS_DEBUG, " AGESA SRAT table NULL. Skipping.\n"); } /* SLIT */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); + current = ( current + 0x07) & -0x08; + printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *) agesawrapper_getlateinitptr (PICK_SLIT); if (slit != NULL) { - memcpy(current, slit, slit->header.length); - slit = (acpi_slit_t *) current; - //acpi_create_slit(slit); - current += slit->header.length; - acpi_add_table(rsdp, slit); + memcpy((void *)current, slit, slit->header.length); + slit = (acpi_slit_t *) current; + current += slit->header.length; + acpi_add_table(rsdp, slit); + } + else { + printk(BIOS_DEBUG, " AGESA SLIT table NULL. Skipping.\n"); } /* SSDT */ - current = ( current + 0x0f) & -0x10; - printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr (PICK_PSTATE); if (ssdt != NULL) { - memcpy(current, ssdt, ssdt->length); - ssdt = (acpi_header_t *) current; - current += ssdt->length; + memcpy((void *)current, ssdt, ssdt->length); + ssdt = (acpi_header_t *) current; + current += ssdt->length; } else { - ssdt = (acpi_header_t *) current; - memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t)); - current += ssdt->length; - memcpy(ssdt, &AmlCode_ssdt, ssdt->length); - - char *position = ssdt; - if (memcmp (position + 50, "TOM1", 4) == 0) - *(u32 *) (position + 55) = __readmsr (0xc001001a); - - /* recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length); + printk(BIOS_DEBUG, " AGESA SSDT table NULL. Skipping.\n"); } acpi_add_table(rsdp,ssdt); - printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current); - - /* DSDT */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current); - dsdt = (acpi_header_t *)current; // it will used by fadt - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n",dsdt,dsdt->length); - - /* FACS */ // it needs 64 bit alignment - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current); - facs = (acpi_facs_t *) current; // it will be used by fadt - current += sizeof(acpi_facs_t); - acpi_create_facs(facs); - - /* FDAT */ - current = ( current + 0x07) & -0x08; - printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); + current = ( current + 0x0f) & -0x10; + printk(BIOS_DEBUG, "ACPI: * coreboot TOM SSDT2 at %lx\n", current); + ssdt2 = (acpi_header_t *) current; + acpi_create_ssdt_generator(ssdt2, ACPI_TABLE_CREATOR); + current += ssdt2->length; + acpi_add_table(rsdp,ssdt2); #if DUMP_ACPI_TABLES == 1 printk(BIOS_DEBUG, "rsdp\n"); @@ -243,6 +262,9 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "ssdt\n"); dump_mem(ssdt, ((void *)ssdt) + ssdt->length); + printk(BIOS_DEBUG, "ssdt2\n"); + dump_mem(ssdt2, ((void *)ssdt2) + ssdt2->length); + printk(BIOS_DEBUG, "fadt\n"); dump_mem(fadt, ((void *)fadt) + fadt->header.length); #endif diff --git a/src/northbridge/amd/agesa/family14/Makefile.inc b/src/northbridge/amd/agesa/family14/Makefile.inc index 3bda8d5..899d517 100644 --- a/src/northbridge/amd/agesa/family14/Makefile.inc +++ b/src/northbridge/amd/agesa/family14/Makefile.inc @@ -18,5 +18,3 @@ # driver-y += northbridge.c - -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl \ No newline at end of file diff --git a/src/northbridge/amd/agesa/family14/ssdt.asl b/src/northbridge/amd/agesa/family14/ssdt.asl deleted file mode 100644 index 1e694db..0000000 --- a/src/northbridge/amd/agesa/family14/ssdt.asl +++ /dev/null @@ -1,346 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * Make sure HC_NUMS and HC_POSSIBLE_NUM setting is consistent to this file - */ - -DefinitionBlock ("SSDT.aml", "SSDT", 1, "AMD-FAM14H", "AMD-ACPI", 0x1000) -{ - /* - * These objects were referenced but not defined in this table - */ - External (\_SB_.PCI0, DeviceObj) - - Scope (\_SB.PCI0) - { - Name (TOM1, 0xaaaaaaaa) - Name (BUSN, Package (0x20) /* HC_NUMS */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x10101010, - 0x11111111, - 0x12121212, - 0x13131313, - 0x14141414, - 0x15151515, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc - }) - Name (MMIO, Package (0x80) /* HC_NUMS * 4 */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x11111111, - 0x22222222, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (PCIO, Package (0x40) /* HC_NUMS * 2 */ - { - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0xaaaaaaaa, - 0xbbbbbbbb, - 0xcccccccc, - 0xdddddddd, - 0xeeeeeeee, - 0x77777777, - 0x88888888, - 0x99999999, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x99999999, - 0xaaaaaaaa, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444 - }) - Name (SBLK, 0x11) - Name (SBDN, 0xbbbbbbbb) - Name (HCLK, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (HCDN, Package (0x20) /* HC_POSSIBLE_NUM */ - { - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888, - 0x11111111, - 0x22222222, - 0x33333333, - 0x44444444, - 0x55555555, - 0x66666666, - 0x77777777, - 0x88888888 - }) - Name (CBB, 0x99) - Name (CBST, 0x88) - Name (CBB2, 0x77) - Name (CBS2, 0x66) - - } -} -

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot January 2012