I tried to use an external PCI network card ( 8254pi) with m2v-mx se
mother board. However, the booting process hangs. On the screen, it
shows, "Chrome VGA textmode initialized", and stops there.
The serial console output is attached. Is this the NIC option rom
problem or coreboot problem? Any workarounds? I need to use a network
card supported by e1000.ko on Linux. If I try to get a different model
of NIC supported by e1000, does it help? Thanks!
I want to use the rtc wake up function on coreboot and Linux on ASUS
M2V MX-SE. I used rtcwake command (ver 2.19) from
ftp://ftp.kernel.org/pub/linux/utils/util-linux-ng/ to automatically
wake up the machine after an S3 sleep. This works well on manufactured
ASUS bios. But with coreboot, it reports an error, "open device
/sys/class/rtc/rtc0/device/power/wakeup failed." It seems the command
try to find /dev/rtc0 but failed. And I checked that device manually;
it does not exist.
Anyone knows why this happened and how to fix it? Thanks!
2011/4/20 David Bein <d.bein(a)f5.com>:
> Hello Idwer,
> Thank you very much for the assistance. I assume
> that something like: nvramtool -c 0 will force the
> newly booted bios to re-compute the checksum on the cmos?
I assume you want to save the current contents with "nvramtool -b
cmos_contents.bin" and restore those settings with "nvramtool -B
The manpage can be read (unformatted) in trac:
>> 2011/4/20 David Bein <d.bein(a)f5.com>:
>>> Hello ...
>>> I am very impressed with flashrom. I just used it on a motherboard based
>>> the Lynnfield 3420 chipset and it worked very well and is much faster
>>> AMI supplied equivalent.
>>> I have one problem which is that the very first boot after flashing the
>>> bios rom
>>> image, the bios complains about a CMOS checksum error and patiently
>>> waits for some input. I am assuming others have been here before. What I
>>> was enter the bios menu and tell it to save changes (none made). All
>>> this no longer complain about the CMOS checksum.
>>> The reason flashrom is interesting to us (aside from not being
>>> by AMI)
>>> is for unattended use in customer upgrade situations. Having any upgrade
>>> require a human to type something is a bit of a problem.
>>> Any helpful hints will be greatly appreciated.
>> nvramtool is what you are looking for: http://www.coreboot.org/Nvramtool
>>> Last but not least, thank you to all of you whole have put a lot of
>>> this tool for use by coreboot and others. This really validates why open
>>> is needed in the first place.
>>> flashrom mailing list
this patch series is a generic cleanup of the pci1x2x driver.
Basically it does:
- move register config from Kconfig to devicetree.cb
- use the generic pci/cardbus functions
- add proper subsystemid configuration
- remove latency. cacheline size, bridge control register settings, as such
register should be configured by the pci/cardbus code.