coreboot February 2011

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[commit] r6334 - trunk/src/superio/nsc
by repository service 05 Feb '11

05 Feb '11

Author: stuge Date: Sat Feb 5 14:32:56 2011 New Revision: 6334 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6334 Log: Actually add PC87382 into Kconfig, missing from r6332 Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/src/superio/nsc/Kconfig Modified: trunk/src/superio/nsc/Kconfig ============================================================================== --- trunk/src/superio/nsc/Kconfig Sat Feb 5 13:26:07 2011 (r6333) +++ trunk/src/superio/nsc/Kconfig Sat Feb 5 14:32:56 2011 (r6334) @@ -28,6 +28,8 @@ bool config SUPERIO_NSC_PC87366 bool +config SUPERIO_NSC_PC87382 + bool config SUPERIO_NSC_PC87392 bool config SUPERIO_NSC_PC87417

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build service results for r6332
by repository service 05 Feb '11

05 Feb '11

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stuge" checked in revision 6332 to the coreboot repository. This caused the following changes: Change Log: Add PC87382 support This patch adds support for NSC PC87382 Super I/O. It is used in many Lenovo Notebooks as Docking LPC Switch. v2 because of: - Skip some empty files - Fix newlines in Kconfig and Makefile.inc - chip.h missed uart8250.h include - add the Kconfig option in sorted order Thanks to idwer on irc for pointing that out. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> Acked-by: Peter Stuge <peter(a)stuge.se> Build Log: Compilation of a-trend:atc-6220 has been fixed If something broke during this checkin please be a pain in stuge's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[PATCH v2] Add PC87392 support
by Sven Schnelle 05 Feb '11

05 Feb '11

Hi List, this patch adds support for the NSC PC87392 Super I/O. It is used in Lenovo Docking Stations as Super I/O chip. v2 because of: - The patch added some empty files - missing newlines in Kconfig and Makefile.inc - add the Kconfig option in sorted order Thanks to idwer on irc for pointing that out. Signed-off-by: Sven Schnelle <svens(a)stackframe.org>

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[commit] r6333 - in trunk/src/superio/nsc: . pc87392
by repository service 05 Feb '11

05 Feb '11

Author: stuge Date: Sat Feb 5 13:26:07 2011 New Revision: 6333 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6333 Log: Add PC87392 support This adds support for the NSC PC87392 Super I/O. It is used in Lenovo Docking Stations as Super I/O chip. v2 because of: - skip some empty files - missing newlines in Kconfig and Makefile.inc - add the Kconfig option in sorted order Thanks to idwer on irc for pointing that out. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> Acked-by: Peter Stuge <peter(a)stuge.se> Added: trunk/src/superio/nsc/pc87392/ trunk/src/superio/nsc/pc87392/Makefile.inc trunk/src/superio/nsc/pc87392/chip.h trunk/src/superio/nsc/pc87392/early_serial.c trunk/src/superio/nsc/pc87392/pc87392.h trunk/src/superio/nsc/pc87392/superio.c Modified: trunk/src/superio/nsc/Kconfig trunk/src/superio/nsc/Makefile.inc Modified: trunk/src/superio/nsc/Kconfig ============================================================================== --- trunk/src/superio/nsc/Kconfig Sat Feb 5 13:20:23 2011 (r6332) +++ trunk/src/superio/nsc/Kconfig Sat Feb 5 13:26:07 2011 (r6333) @@ -28,6 +28,8 @@ bool config SUPERIO_NSC_PC87366 bool +config SUPERIO_NSC_PC87392 + bool config SUPERIO_NSC_PC87417 bool config SUPERIO_NSC_PC87427 Modified: trunk/src/superio/nsc/Makefile.inc ============================================================================== --- trunk/src/superio/nsc/Makefile.inc Sat Feb 5 13:20:23 2011 (r6332) +++ trunk/src/superio/nsc/Makefile.inc Sat Feb 5 13:26:07 2011 (r6333) @@ -23,6 +23,7 @@ subdirs-y += pc87360 subdirs-y += pc87366 subdirs-y += pc87382 +subdirs-y += pc87392 subdirs-y += pc87417 subdirs-y += pc87427 subdirs-y += pc97307 Added: trunk/src/superio/nsc/pc87392/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87392/Makefile.inc Sat Feb 5 13:26:07 2011 (r6333) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_SUPERIO_NSC_PC87392) += superio.c + Added: trunk/src/superio/nsc/pc87392/chip.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87392/chip.h Sat Feb 5 13:26:07 2011 (r6333) @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NSC_PC87392_CHIP_H +#define SUPERIO_NSC_PC87392_CHIP_H + +extern struct chip_operations superio_nsc_pc87392_ops; + +#include <uart8250.h> + +struct superio_nsc_pc87392_config { + struct uart8250 com1, com2; +}; + +#endif Added: trunk/src/superio/nsc/pc87392/early_serial.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87392/early_serial.c Sat Feb 5 13:26:07 2011 (r6333) @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "pc87392.h" + +static void pc87392_enable_serial(device_t dev, u16 iobase) +{ + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_iobase(dev, PNP_IDX_IO0, iobase); + pnp_set_enable(dev, 1); +} Added: trunk/src/superio/nsc/pc87392/pc87392.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87392/pc87392.h Sat Feb 5 13:26:07 2011 (r6333) @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NSC_PC87392_H +#define SUPERIO_NSC_PC87392_H + +#define PC87392_FDC 0x00 +#define PC87392_PP 0x01 +#define PC87392_SP2 0x02 +#define PC87392_SP1 0x03 +#define PC87392_GPIO 0x07 +#define PC87392_WDT 0x0A + +#endif Added: trunk/src/superio/nsc/pc87392/superio.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87392/superio.c Sat Feb 5 13:26:07 2011 (r6333) @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/device.h> +#include <device/pnp.h> +#include <console/console.h> +#include <string.h> +#include <bitops.h> +#include <uart8250.h> +#include <stdlib.h> +#include "chip.h" +#include "pc87392.h" + +static void init(device_t dev) +{ + struct superio_nsc_pc87392_config *conf = dev->chip_info; + struct resource *res0; + + if (!dev->enabled) + return; + + switch(dev->path.pnp.device) { + case PC87392_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + + case PC87392_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, PC87392_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0} }, + { &ops, PC87392_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0} }, + { &ops, PC87392_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0} }, + { &ops, PC87392_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0} }, + { &ops, PC87392_GPIO, PNP_IO0 | PNP_IRQ0, {0xfff8, 0} }, + { &ops, PC87392_WDT, PNP_IO0 | PNP_IRQ0, {0xfffc, 0} }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nsc_pc87392_ops = { + CHIP_NAME("NSC PC87392 Super I/O") + .enable_dev = enable_dev, +};

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[PATCH v2] Add PC87382 support
by Sven Schnelle 05 Feb '11

05 Feb '11

Hi List, this patch adds support for NSC PC87382 Super I/O. It is used in many Lenovo Notebooks as Docking LPC Switch. v2 because of: - The patch added some empty files - missing newlines in Kconfig and Makefile.inc - chip.h missed uart8250.h include - add the Kconfig option in sorted order Thanks to idler on irc for pointing that out. Signed-off-by: Sven Schnelle <svens(a)stackframe.org>

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[commit] r6332 - in trunk/src/superio/nsc: . pc87382
by repository service 05 Feb '11

05 Feb '11

Author: stuge Date: Sat Feb 5 13:20:23 2011 New Revision: 6332 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6332 Log: Add PC87382 support This patch adds support for NSC PC87382 Super I/O. It is used in many Lenovo Notebooks as Docking LPC Switch. v2 because of: - Skip some empty files - Fix newlines in Kconfig and Makefile.inc - chip.h missed uart8250.h include - add the Kconfig option in sorted order Thanks to idwer on irc for pointing that out. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> Acked-by: Peter Stuge <peter(a)stuge.se> Added: trunk/src/superio/nsc/pc87382/ trunk/src/superio/nsc/pc87382/Makefile.inc trunk/src/superio/nsc/pc87382/chip.h trunk/src/superio/nsc/pc87382/pc87382.h trunk/src/superio/nsc/pc87382/superio.c Modified: trunk/src/superio/nsc/Makefile.inc Modified: trunk/src/superio/nsc/Makefile.inc ============================================================================== --- trunk/src/superio/nsc/Makefile.inc Thu Feb 3 17:00:28 2011 (r6331) +++ trunk/src/superio/nsc/Makefile.inc Sat Feb 5 13:20:23 2011 (r6332) @@ -22,6 +22,7 @@ subdirs-y += pc87351 subdirs-y += pc87360 subdirs-y += pc87366 +subdirs-y += pc87382 subdirs-y += pc87417 subdirs-y += pc87427 subdirs-y += pc97307 Added: trunk/src/superio/nsc/pc87382/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87382/Makefile.inc Sat Feb 5 13:20:23 2011 (r6332) @@ -0,0 +1,22 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_SUPERIO_NSC_PC87382) += superio.c + Added: trunk/src/superio/nsc/pc87382/chip.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87382/chip.h Sat Feb 5 13:20:23 2011 (r6332) @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NSC_PC87382_CHIP_H +#define SUPERIO_NSC_PC87382_CHIP_H + +#include <uart8250.h> +extern struct chip_operations superio_nsc_pc87382_ops; + +struct superio_nsc_pc87382_config { + struct uart8250 com1, com2; +}; + +#endif Added: trunk/src/superio/nsc/pc87382/pc87382.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87382/pc87382.h Sat Feb 5 13:20:23 2011 (r6332) @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_NSC_PC87382_H +#define SUPERIO_NSC_PC87382_H + +#define PC87382_IR 0x02 +#define PC87382_SP1 0x03 +#define PC87382_GPIO 0x07 +#define PC87382_DOCK 0x19 +#endif Added: trunk/src/superio/nsc/pc87382/superio.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/src/superio/nsc/pc87382/superio.c Sat Feb 5 13:20:23 2011 (r6332) @@ -0,0 +1,83 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens(a)stackframe.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/device.h> +#include <device/pnp.h> +#include <console/console.h> +#include <string.h> +#include <bitops.h> +#include <uart8250.h> +#include <pc80/keyboard.h> +#include <stdlib.h> +#include "chip.h" +#include "pc87382.h" + +static void init(device_t dev) +{ + struct superio_nsc_pc87382_config *conf = dev->chip_info; + struct resource *res0; + + if (!dev->enabled) + return; + + switch(dev->path.pnp.device) { + case PC87382_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case PC87382_IR: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + + case PC87382_DOCK: + break; + + case PC87382_GPIO: + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, PC87382_IR, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x07f8, 0 } }, + { &ops, PC87382_SP1, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0 } }, + { &ops, PC87382_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } }, + { &ops, PC87382_DOCK, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0 } }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_nsc_pc87382_ops = { + CHIP_NAME("NSC PC87382 Docking LPC Switch") + .enable_dev = enable_dev, +};

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a question about reset16.lds
by ali hagigat 05 Feb '11

05 Feb '11

SECTIONS { /* Trigger an error if I have an unuseable start address */ _bogus = ASSERT(_start >= 0xffff0000, "_start too low. Please decrease CONFIG_ROM_IMAGE_SIZE"); _ROMTOP = 0xfffffff0; . = _ROMTOP; .reset . : { *(.reset) . = 15 ; BYTE(0x00); } } ------------------------------------------------------------------ What does (.=15;) mean? It seems a mistake! and can be: . = .+1;

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rs690 mmconfig access
by Josef Kellermann 04 Feb '11

04 Feb '11

attached is a patch to enable mmconf access on RS690. This patch is required for the upcoming Siemens sitemp mainboard. 1. Overwrite read resources in src/southbridge/amd/rs690/ht.c a. disable and hide BAR3 so pci_get_resource() doesn't touch. b. add an mmconf resource 2. Overwrite set_resources so that it: a. writes the mmconf resource base to the BAR3 b. disable writes and hide BAR3 c. find a not assigned resource in the K8 mmio and setup base and limit with flag nonposted 3. Add the resource as reserved in add_mainboard_resources() 4. in the mainboard's acpi_tables.c a. pass the mmconf base to the dsdt. b. create a ACPI mcfg table I've testet with Linux 2.6.12, Linux 2.6.26 and Windows XP SP3 + ATI X1200 driver, Linux 2.6.26 comes up with the following messages: [ 0.232014] PCI: MCFG configuration 0: base e0000000 segment 0 buses 0 - 31 [ 0.232014] PCI: MCFG area at e0000000 reserved in E820 [ 0.232014] PCI: Using MMCONFIG at e0000000 - e1ffffff [ 0.232014] PCI: Using configuration type 1 for base access lspci -xxxx shows me 4Kb ext config space for some devices. Can somebody please comment on the patch ? Would be nice ! Signed-off-by: Josef Kellermann<seppk(a)arcor.de> <mailto://seppk@arcor.de>

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build service results for r6331
by repository service 03 Feb '11

03 Feb '11

Dear coreboot readers! This is the automatic build system of coreboot. The developer "jakllsch" checked in revision 6331 to the coreboot repository. This caused the following changes: Change Log: Add support for the IT8720F Super I/O Signed-off-by: Christian Ruppert <idl0r(a)gentoo.org> Acked-by: Stefan Reinauer <stepan(a)coreboot.org> Build Log: Compilation of a-trend:atc-6220 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=6331&device=atc-6220&vendo… If something broke during this checkin please be a pain in jakllsch's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r6331 - trunk/util/superiotool
by repository service 03 Feb '11

03 Feb '11

Author: jakllsch Date: Thu Feb 3 17:00:28 2011 New Revision: 6331 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6331 Log: Add support for the IT8720F Super I/O Signed-off-by: Christian Ruppert <idl0r(a)gentoo.org> Acked-by: Stefan Reinauer <stepan(a)coreboot.org> Modified: trunk/util/superiotool/ite.c Modified: trunk/util/superiotool/ite.c ============================================================================== --- trunk/util/superiotool/ite.c Thu Feb 3 10:29:57 2011 (r6330) +++ trunk/util/superiotool/ite.c Thu Feb 3 17:00:28 2011 (r6331) @@ -603,7 +603,51 @@ {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, {EOT}}}, - {0x8720, "IT8720F", { /* From sensors-detect */ + {0x8720, "IT8720F", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, + {0x87,0x20,0x05,0x00,0x00,0x00,EOT}}, + {0x0, "Floppy", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT}, + {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}}, + {0x1, "COM1", + {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, + {0x00,0x03,0xf8,0x04,0x00,0x50,EOT}}, + {0x2, "COM2", + {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, + {0x00,0x02,0xf8,0x03,0x00,0x50,EOT}}, + {0x3, "Parallel port", + {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT}, + {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}}, + {0x4, "Environment controller", + {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3, + 0xf4,0xf5,0xf6,EOT}, + {0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00, + 0x00,NANA,NANA,EOT}}, + {0x5, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x48,EOT}}, + {0x6, "Mouse", + {0x30,0x70,0x71,0xf0,EOT}, + {0x00,0x0c,0x02,0x00,EOT}}, + {0x7, "GPIO", + {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62, + 0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1, + 0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd, + 0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc, + 0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xf0, + 0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa, + 0xfb,0xfc,0xfd,0xfe,0xff,EOT}, + {0x00,0xff,0x00,0x40,0x00,0x00,0x03,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,NANA,0x38,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00, + 0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,NANA,0x00,0x00,0x00,EOT}}, + {0xa, "Consumer IR", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0x03,0x10,0x0b,0x06,EOT}}, {EOT}}}, {0x8721, "IT8721F", { {EOT}}},

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coreboot February 2011