coreboot December 2011

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Trac reminder: list of new ticket(s)
by coreboot tracker 26 Dec '11

26 Dec '11

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Patch merged into coreboot/master: 482f534 Fix Fam10 MMCONF_SUPPORT_DEFAULT setting.
by gerrit＠coreboot.org 26 Dec '11

26 Dec '11

the following patch was just integrated into master: commit 482f5346ca1a49602cf0b3a3f69a22442a25dab1 Author: Marc Jones <marcj303(a)gmail.com> Date: Wed Dec 14 15:33:33 2011 -0700 Fix Fam10 MMCONF_SUPPORT_DEFAULT setting. I misunderstood how kconfig select works. It needs to be selected with a config option. Moved the select to the correct location. Change-Id: If9b1e21e6cbc5af4671efb76cf87dd18dbbe2234 Signed-off-by: Marc Jones <marcj303(a)gmail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Mon Dec 26 08:53:00 2011, giving +2 See http://review.coreboot.org/487 for details. -gerrit

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Patch merged into coreboot/master: 1818697 trivial:change the value type of POST_PORT in Kconfig from int to hex
by gerrit＠coreboot.org 26 Dec '11

26 Dec '11

the following patch was just integrated into master: commit 181869715598f0ad7cc665027d98671d013908ca Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Mon Dec 26 02:08:44 2011 +0530 trivial:change the value type of POST_PORT in Kconfig from int to hex trivial change in src/console/Kconfig Change-Id: Ib6bb4ccfabaa3af18b48a23a51a576b872d807a8 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Mon Dec 26 08:52:06 2011, giving +2 See http://review.coreboot.org/505 for details. -gerrit

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New patch to review for coreboot: 1818697 trivial:change the value type of POST_PORT in Kconfig from int to hex
by Vikram Narayanan 25 Dec '11

25 Dec '11

Vikram Narayanan (vikram186(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/505 -gerrit commit 181869715598f0ad7cc665027d98671d013908ca Author: Vikram Narayanan <vikram186(a)gmail.com> Date: Mon Dec 26 02:08:44 2011 +0530 trivial:change the value type of POST_PORT in Kconfig from int to hex trivial change in src/console/Kconfig Change-Id: Ib6bb4ccfabaa3af18b48a23a51a576b872d807a8 Signed-off-by: Vikram Narayanan <vikram186(a)gmail.com> --- src/console/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 8382695..dbd11f6 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -334,7 +334,7 @@ config NO_POST default n config POST_PORT - int + hex default 0x80 config CONSOLE_POST

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Patch set updated for coreboot: 257dc76 Cleanup access to vendor/part # info
by Philip Prindeville 25 Dec '11

25 Dec '11

Philip Prindeville (pprindeville(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/502 -gerrit commit 257dc761876550715f9969ce6042b4b50f27b005 Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Sat Dec 24 22:12:37 2011 -0700 Cleanup access to vendor/part # info Instead of macros to access MAINBOARD record, use convenience functions. Store pointers to MAINBOARD and HEADER for use outside of CB code. Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12 Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> --- payloads/coreinfo/coreboot_module.c | 4 ++-- payloads/libpayload/arch/i386/coreboot.c | 5 +++++ payloads/libpayload/include/coreboot_tables.h | 16 ++++++++++------ payloads/libpayload/include/sysinfo.h | 3 +++ 4 files changed, 20 insertions(+), 8 deletions(-) diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index 7289366..d33ea9e 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -142,8 +142,8 @@ static void parse_mainboard(unsigned char *ptr) { struct cb_mainboard *mb = (struct cb_mainboard *)ptr; - strncpy(cb_info.vendor, (const char *)MB_VENDOR_STRING(mb), 31); - strncpy(cb_info.part, (const char *)MB_PART_STRING(mb), 31); + strncpy(cb_info.vendor, cb_mb_vendor_part(mb), 31); + strncpy(cb_info.part, cb_mb_part_string(mb), 31); } static void parse_strings(unsigned char *ptr) diff --git a/payloads/libpayload/arch/i386/coreboot.c b/payloads/libpayload/arch/i386/coreboot.c index 135c59c..7fe286e 100644 --- a/payloads/libpayload/arch/i386/coreboot.c +++ b/payloads/libpayload/arch/i386/coreboot.c @@ -137,6 +137,8 @@ static int cb_parse_header(void *addr, void *end, struct sysinfo_t *info) header->table_bytes) != header->table_checksum) return -1; + info->header = header; + /* Now, walk the tables. */ ptr += header->header_bytes; @@ -173,6 +175,9 @@ static int cb_parse_header(void *addr, void *end, struct sysinfo_t *info) cb_parse_framebuffer(ptr, info); break; #endif + case CB_TAG_MAINBOARD: + info->mainboard = (struct cb_mainboard *)ptr; + break; } ptr += rec->size; diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h index e362d06..c68ccc9 100644 --- a/payloads/libpayload/include/coreboot_tables.h +++ b/payloads/libpayload/include/coreboot_tables.h @@ -228,6 +228,16 @@ static inline u16 cb_checksum(const void *ptr, unsigned len) return ipchksum(ptr, len); } +static inline const char *cb_mb_vendor_string(const struct cb_mainboard *cbm) +{ + return (char *)(cbm->strings + cbm->vendor_idx); +} + +static inline const char *cb_mb_part_string(const struct cb_mainboard *cbm) +{ + return (char *)(cbm->strings + cbm->part_number_idx); +} + /* Helpful macros */ #define MEM_RANGE_COUNT(_rec) \ @@ -237,10 +247,4 @@ static inline u16 cb_checksum(const void *ptr, unsigned len) (void *)(((u8 *) (_rec)) + sizeof(*(_rec)) \ + (sizeof((_rec)->map[0]) * (_idx))) -#define MB_VENDOR_STRING(_mb) \ - (((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx) - -#define MB_PART_STRING(_mb) \ - (((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx) - #endif diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index c1d2002..778dfe9 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -56,6 +56,9 @@ struct sysinfo_t { struct cb_framebuffer *framebuffer; unsigned long *mbtable; /** Pointer to the multiboot table */ + + struct cb_header *header; + struct cb_mainboard *mainboard; }; extern struct sysinfo_t lib_sysinfo;

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Patch set updated for coreboot: a97069d cb_parse_header() should not assume table in 4K of contiguous memory
by Philip Prindeville 25 Dec '11

25 Dec '11

Philip Prindeville (pprindeville(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/501 -gerrit commit a97069d0d5ab55d2eb250c7870c1422b007e61ae Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 18:09:25 2011 -0700 cb_parse_header() should not assume table in 4K of contiguous memory If we have the CB table in E820 memory, we might not have an entire 4K (0x1000) bytes of memory to scan through. Instead, a better strategy is to pass in a pointer to the end of the region or the start + 4K (which ever is lower). This change prepares the cb_parse_header() calling convention for that change. Change-Id: I9257726c6a7065b5596d4c32ab451edd0a3cdc10 Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> --- payloads/libpayload/arch/i386/coreboot.c | 22 ++++++++++++++-------- 1 files changed, 14 insertions(+), 8 deletions(-) diff --git a/payloads/libpayload/arch/i386/coreboot.c b/payloads/libpayload/arch/i386/coreboot.c index 709f8ae..135c59c 100644 --- a/payloads/libpayload/arch/i386/coreboot.c +++ b/payloads/libpayload/arch/i386/coreboot.c @@ -109,21 +109,21 @@ static void cb_parse_framebuffer(void *ptr, struct sysinfo_t *info) } #endif -static int cb_parse_header(void *addr, int len, struct sysinfo_t *info) +static int cb_parse_header(void *addr, void *end, struct sysinfo_t *info) { struct cb_header *header; - unsigned char *ptr = addr; + unsigned char *ptr; void *forward; int i; - for (i = 0; i < len; i += 16, ptr += 16) { + for (ptr = addr; (void *)ptr < end; ptr += 16) { header = (struct cb_header *)ptr; if (!strncmp((const char *)header->signature, "LBIO", 4)) break; } /* We walked the entire space and didn't find anything. */ - if (i >= len) + if ((void *)ptr >= end) return -1; if (!header->table_bytes) @@ -147,7 +147,7 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info) switch (rec->tag) { case CB_TAG_FORWARD: forward = phys_to_virt((void *)(unsigned long)((struct cb_forward *)rec)->forward); - return cb_parse_header(forward, len, info); + return cb_parse_header(forward, forward + 0x1000, info); continue; case CB_TAG_MEMORY: cb_parse_memory(ptr, info); @@ -176,6 +176,9 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info) } ptr += rec->size; + + if ((void *)ptr >= end) + return -1; } return 1; @@ -186,10 +189,13 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info) int get_coreboot_info(struct sysinfo_t *info) { - int ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info); + void *base = phys_to_virt(0x00000000); + int ret = cb_parse_header(base, base + 0x1000, info); - if (ret != 1) - ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info); + if (ret != 1) { + base = phys_to_virt(0x000f0000); + ret = cb_parse_header(base, base + 0x1000, info); + } return (ret == 1) ? 0 : -1; }

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[PATCH] superiotool.h: Add `EOT` to end of entry
by Paul Menzel 25 Dec '11

25 Dec '11

Date: Mon, 19 Dec 2011 23:50:32 +0100 This is a fix up for commit 3d1d6bb4 which forgot to add `EOT` at the end. commit 3d1d6bb4ecb15a12f48f871c623882bee9c0c576 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Mon Nov 7 10:56:42 2011 -0600 superiotool: add detection and dump of Infineon SLB9635 TPM Carl-Daniel explained the continuous integration tool Jenkins did not catch that, since this is a run time bug. It accesses uninitialized memory until it crashes and writes random data to random I/O locations. Reported-by (on IRC): Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- util/superiotool/superiotool.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 5583ec5..94918b8 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -247,7 +247,7 @@ static const struct { {probe_idregs_amd, {0xaa, EOT}}, #endif {probe_idregs_serverengines, {0x2e, EOT}}, - {probe_idregs_infineon, {0x2e, 0x4e}}, + {probe_idregs_infineon, {0x2e, 0x4e, EOT}}, }; /** Table of functions to print out supported Super I/O chips. */ -- 1.7.7.3

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[PATCH] superiotool: add EOT for Infineon ports
by Joshua Roys 25 Dec '11

25 Dec '11

Hello, This patch prevents a long loop through memory until superiotool finds an EOT. Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Thanks, Josh

2 1

Patch merged into coreboot/master: c56b7fb Sconfig: parse Kconfig options from devicetree.cb
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit c56b7fb47a0088292046d5cc2b6f4941273fb675 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Dec 5 20:33:55 2011 +0200 Sconfig: parse Kconfig options from devicetree.cb Mainboard and chip Kconfig files have several build options that are redundant with information in devicetree.cb. This patch enables sconfig to auto-generate equivalent configuration. sconfig -s Generates mainboard's static.c file, as before. sconfig -b This operation creates mainboard's bootblock init code. By default, for every chip listed in mainboard/devicetree.cb, if there is a chip/bootblock.c file, the init function is called. A mainboard/bootblock.c file can be added to override default behaviour. sconfig -k This operation generates select -options for component paths. Change-Id: I808d44af552dbc5e0565d6a0f4f72c7be9f5740e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 12:25:09 2011, giving +2 See http://review.coreboot.org/472 for details. -gerrit

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Patch merged into coreboot/master: c5ffb4f Only BSP CPU writes CMOS in bootblock code
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit c5ffb4f0fcb1bf57a6376234ecf411678080569c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Dec 5 20:17:17 2011 +0200 Only BSP CPU writes CMOS in bootblock code CMOS accesses are not safe for multi-processor and only the BSP CPU should count reboots and test CMOS sanity. A questionable single byte CMOS read access from AP CPUs remains. AP CPUs should always select the same romstage prefix as BSP CPU. Change-Id: I29118e33c07c0080c94abb90f703e38312c72432 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 12:10:01 2011, giving +2 See http://review.coreboot.org/446 for details. -gerrit

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coreboot December 2011