coreboot December 2011

coreboot@coreboot.org

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174 discussions

Patch merged into coreboot/master: 9f7c092 libpayload: remove uhci_reg_maskX
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit 9f7c092cc6dc9101fcc3db20914b0efb69686e84 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Fri Nov 18 14:44:16 2011 +0100 libpayload: remove uhci_reg_maskX Not that good an idea to start with. Coccinelle patch: @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...) { ... } @@ @@ -void ( -uhci_reg_mask8 | -uhci_reg_mask16 | -uhci_reg_mask32 ) - (...); @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask32 (ctrl, reg, ~0, ormask) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask16 (ctrl, reg, ~0, ormask) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) | ormask) @@ expression ctrl, reg, ormask; @@ -uhci_reg_mask8 (ctrl, reg, ~0, ormask) +uhci_reg_write8 (ctrl, reg, uhci_reg_read8 (ctrl, reg) | ormask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask32 (ctrl, reg, andmask, 0) +uhci_reg_write32 (ctrl, reg, uhci_reg_read32 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) @@ expression ctrl, reg, andmask; @@ -uhci_reg_mask16 (ctrl, reg, andmask, 0) +uhci_reg_write16 (ctrl, reg, uhci_reg_read16 (ctrl, reg) & andmask) Change-Id: Id0eb8327293831e54249d43fd06d50963c793699 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/477 for details. -gerrit

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Patch merged into coreboot/master: e11cec9 Let lib_get_sysinfo() pass through the success of get_coreboot_info()
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit e11cec94e22b2a6c4086656006a0667ec648e0d5 Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 18:33:05 2011 -0700 Let lib_get_sysinfo() pass through the success of get_coreboot_info() The return status of get_coreboot_info() might be handy to a platform driver calling lib_get_sysinfo() to test for the presence of coreboot. Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 12:02:12 2011, giving +2 See http://review.coreboot.org/503 for details. -gerrit

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Patch merged into coreboot/master: 98cd3c8 Fix missing cast back to void *
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit 98cd3c8d5b16d4369e25ddca6a313d59f2a0bf4a Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 17:53:26 2011 -0700 Fix missing cast back to void * MEM_RANGE_PTR() also needs to return a pointer to untyped memory. Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1 Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 11:56:51 2011, giving +2 See http://review.coreboot.org/500 for details. -gerrit

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Patch merged into coreboot/master: db051bf Fix missing VM mapping
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit db051bf5228810b95952960bdc66fb37f004c09f Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 17:36:09 2011 -0700 Fix missing VM mapping When processing FORWARD records, we weren't accounting for the pointer being in the physical address space and not the virtual space instead. Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 11:53:34 2011, giving +2 See http://review.coreboot.org/499 for details. -gerrit

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Patch merged into coreboot/master: 956c9c2 Use void pointers for untyped memory
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit 956c9c27504107109f11ef7113efa6448acea6df Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 17:28:59 2011 -0700 Use void pointers for untyped memory To avoid unnecessary casts, we can use untyped pointers when accessing individual records. Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3 Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 11:52:15 2011, giving +2 See http://review.coreboot.org/498 for details. -gerrit

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Patch merged into coreboot/master: bde7653 Use convenience function to checksum
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit bde765381d216bb9144b3950aa101d6e987ebc07 Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 17:22:05 2011 -0700 Use convenience function to checksum That coreboot uses the IP checksum is an artifact, not a deliberate requirement to be compatible with the Internet Protocole suite. Use a wrapper to abstract the computation of coreboot's checksum. Change-Id: I6491b9ba5efb9ffe5cb12a6172653a6ac80a1370 Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 11:51:13 2011, giving +2 See http://review.coreboot.org/497 for details. -gerrit

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Patch merged into coreboot/master: 250f8aa Replace UNPACK_CB64 macro with inline
by gerrit＠coreboot.org 24 Dec '11

24 Dec '11

the following patch was just integrated into master: commit 250f8aa63a19efbeecca74d4330dd5c483c741d3 Author: Philip Prindeville <philipp(a)redfish-solutions.com> Date: Fri Dec 23 17:09:02 2011 -0700 Replace UNPACK_CB64 macro with inline Having submitted a module based on coreboot to LKML for acceptance, it was requested that fewer macros and more inlines be used (because of their superior type-checking when performing pointer casts, etc). This is the first of several changes to make the relevant parts of coreboot comply to linux code standards. Change-Id: Iffe7061fa62fa639e0cb6ccb9125eb3403d06b1a Signed-off-by: Philip Prindeville <philipp(a)redfish-solutions.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 24 11:50:07 2011, giving +2 See http://review.coreboot.org/495 for details. -gerrit

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Re: [coreboot] New patch to review for coreboot: db051bf Fix missing VM mapping
by Patrick Georgi 24 Dec '11

24 Dec '11

Am 24.12.2011 05:16, schrieb ron minnich: > I'm just getting back to coreboot. Is libpayload used verbatim in the > kernel? The phys/virt map in coreboot is 1:1 by design. The mapping > seems unnecessary to me. Just wondering. libpayload provides phys/virt mapping because FILO relocates itself to high memory. Side note: At some point, I'd like to see generic relocation support in libpayload as most payloads can benefit from being moved to top-of-ram, to make space for OS kernels. Patrick

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Asus M4A78LT-M status
by Christian Ruppert 24 Dec '11

24 Dec '11

Hi guys, I currently try to get coreboot working on my "Asus M4A78LT-M". Using the M4A785T-M [1] as template works fine so far as the hardware is almost equal but there are a few issues: a) My RAM sticks [2] (tried both separate) doesn't work (see serial-ram- fail.txt). It is present but not valid, it seems the CRC check fails in src/northbridge/amd/amdmct/mct_ddr3/mct_d.c and I have no idea why... My other RAM sticks [3] (only one tested) seem to work (see serial-ram- works.txt) Do you guys have any ideas why the other sticks do not work? b) Neither the NVIDIA (ZOTAC GeForce 210 Synergy Edition 512MB) PCIe card nor the on-board ATI Radeon HD 3000 works. I tried to extract the VGA bios of the on-board card by using the bios_extract script mentioned at [4] as well as Peter's shell command mentioned at [5]. bios_extract doesn't seem to find the VGA bios, at least the PCI IDs doesn't match. I get amipci_1002_4392.rom, amipci_1002_FFF1.rom and amipci_1002_FFF2.rom but the PCI ID of the on-board ATI card is: 1002:9616. So I tried Peter's command and that seems to work at least partially. I do get some strange stuff on the screen incl. a flashing cursor but that's it... So I'd like to know how to get the PCIe card working at least (which is totally enough for me or resp. exactly what I want). The on-board one would be only interesting for my Wiki article, so for others. c) Not sure if I just misunderstood something.. I have GRUB 1 / legacy installed on my disk and SeaBIOS tries to load GRUB but then it freezes. From what I've read only GRUB 2 is supported as *payload*. Does it also apply to GRUB on a disk? d) Using the microcode update stuff results into some strange boot issues (see serial-microcode_fail.txt, note the "rscp7u80S_eetAaMrDlyM_SsRe tup()") and freezes. Is it a known issue? Any workarounds? Even "Juhe" (the author of the M4A785T-M [1] article mentioned that.. In my case it is a AMD Athlon II X2 245e. So as you can see in serial-ram-works.txt it's almost working. I guess it'll boot "fine" if you guys are able to help me with the issues above. If you (like me) prefer IRC then just poke me (idl0r) and I'll post any successfully results either here or on the Wiki article later. [1] http://www.coreboot.org/ASUS_M4A785T-M [2] http://www.gskill.com/products.php?index=223 [3] http://www.gskill.com/products.php?index=243 [4] http://www.coreboot.org/VGA_support#RECOMMENDED:_Extracting_from_your_vendo… [5] http://www.coreboot.org/VGA_support#Extracting_from_the_system_.28if_everyt… -- Regards, Christian Ruppert

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Re: [coreboot] New patch to review for coreboot: db051bf Fix missing VM mapping
by Philip Prindeville 24 Dec '11

24 Dec '11

On 12/23/11 9:16 PM, ron minnich wrote: > I'm just getting back to coreboot. Is libpayload used verbatim in the > kernel? The phys/virt map in coreboot is 1:1 by design. The mapping > seems unnecessary to me. Just wondering. > > ron > The code is being borrowed to use in linux as well to help parse the coreboot tables for platform drivers that need to determine they're running on the correct model/part # of the motherboard.

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coreboot December 2011