coreboot December 2011

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174 discussions

New patch to review for coreboot: 6cd0925 asus k8v-x: explicitly set RAM and bus voltages
by Florian Zumbiehl 10 Dec '11

10 Dec '11

Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/482 -gerrit commit 6cd0925c8ba4a894ca053fa40477d79122cd6fba Author: Florian Zumbiehl <florz(a)florz.de> Date: Tue Dec 6 10:31:10 2011 +0100 asus k8v-x: explicitly set RAM and bus voltages Change-Id: I9426cafc252ee765d723af569c4a90e090d313d9 Signed-off-by: Florian Zumbiehl <florz(a)florz.de> --- src/mainboard/asus/k8v-x/romstage.c | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c index 014ce68..f24c4d4 100644 --- a/src/mainboard/asus/k8v-x/romstage.c +++ b/src/mainboard/asus/k8v-x/romstage.c @@ -199,6 +199,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) smbus_write_byte(0x48, 0x07, smbus_read_byte(0x48, 0x07) | 0x80); smbus_write_byte(0x4a, 0x07, smbus_read_byte(0x4a, 0x07) | 0x10); + unsigned char mask; + + mask = 0; +// mask |= 1 /* AGP voltage 1.7 V (not verified, just vendor BIOS value) */ +// mask |= 2 /* V-Link voltage 2.6 V (not verified either) */ + smbus_write_byte(0x4a, 0x00, (smbus_read_byte(0x4a, 0x00) & ~0x0f) | (0x0f ^ (mask << 2))); + smbus_write_byte(0x4a, 0x01, (smbus_read_byte(0x4a, 0x01) & ~0x03) | (0x03 ^ mask)); + + mask = 25; /* RAM voltage in decivolts, valid range from 25 to 28 */ + mask = 3 - (mask - 25); + smbus_write_byte(0x4a, 0x02, 0x4f | (mask << 4)); + smbus_write_byte(0x4a, 0x03, 0x04 | mask); + sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); post_cache_as_ram(); }

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New patch to review for coreboot: 242cb03 k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x
by Florian Zumbiehl 10 Dec '11

10 Dec '11

Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/481 -gerrit commit 242cb03ce02bde431666e5e6ac7d0eb1375eeba0 Author: Florian Zumbiehl <florz(a)florz.de> Date: Sat Dec 10 19:39:49 2011 +0100 k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x Change-Id: Ia457f92f6fb7e287defb838db07f12d0f1766757 Signed-off-by: Florian Zumbiehl <florz(a)florz.de> --- src/mainboard/asus/k8v-x/Kconfig | 1 + src/northbridge/amd/amdk8/Kconfig | 6 ++++++ src/northbridge/amd/amdk8/raminit.c | 4 ++-- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig index d297143..114c609 100644 --- a/src/mainboard/asus/k8v-x/Kconfig +++ b/src/mainboard/asus/k8v-x/Kconfig @@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select SET_FIDVID + select K8_FORCE_2T_DRAM_TIMING config MAINBOARD_DIR string diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 858041a..70e75e9 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -37,6 +37,12 @@ config MEM_TRAIN_SEQ int default 0 +# Force 2T DRAM timing (vendor BIOS does it even for single DIMM setups and +# single DIMM is indeed unreliable without it). +config K8_FORCE_2T_DRAM_TIMING + bool + default n + config HW_MEM_HOLE_SIZEK hex default 0x100000 diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 98044d4..eb33a39 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -1477,7 +1477,7 @@ hw_error: if (dloading != 0) { /* we have valid combination check the restrictions */ dcl = pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW); - dcl |= (dimm_loading_config[dpos][rpos] & DDR_2T) ? (DCL_En2T) : 0; + dcl |= ((dimm_loading_config[dpos][rpos] & DDR_2T) || CONFIG_K8_FORCE_2T_DRAM_TIMING) ? (DCL_En2T) : 0; /* Set DuallDimm is second channel is completely empty (revD+) */ if (((cpuid_eax(1) & 0xfff0f) >= 0x10f00) && ((dpos & 0x5) == 0)) { printk(BIOS_DEBUG, "Setting DualDIMMen\n"); @@ -1661,7 +1661,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * goto hw_error; #if CONFIG_CPU_AMD_SOCKET_754 - if (freq < max_freq_1t) { + if (freq < max_freq_1t || CONFIG_K8_FORCE_2T_DRAM_TIMING) { pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW) | DCL_En2T); }

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Re: [coreboot] [SeaBIOS] usb boot issue
by Kevin O'Connor 10 Dec '11

10 Dec '11

On Fri, Oct 14, 2011 at 05:49:39PM +0200, Wolfgang Kamp - datakamp wrote: > Hi Kevin, > > the problem occurs when I try to boot from USB Stick on AMD DBFT1 Persimmon board. > I have tried a couple of sticks in different USB slots but it is always the same issue. > If Ubuntu has booted from HD the stick will be recognized correctly. > The log is attached. Tell me if you need more information. [...] > USB MSC vendor='' product='USB DISK 2.0' rev='PMAP' type=0 removable=1 > ehci_wait_td error - status=80d40 > ehci_send_bulk failed > USB transmission failed > Unable to configure USB MSC device. There is a good chance this is now fixed due to several EHCI bug fixes committed to seabios git a few weeks back. Can you retest? -Kevin

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Re: [coreboot] [SeaBIOS] usb boot issue
by Kevin O'Connor 10 Dec '11

10 Dec '11

On Thu, Oct 13, 2011 at 03:56:48PM +0200, Wolfgang Kamp - datakamp wrote: > > Hi, > > is there any solution for the usb boot issue of the AMD SB800 Persimmon platform > with SeaBIOS 1.6.3 and actual Coreboot version? I'm unfamiliar with the issue. Can you post the SeaBIOS debug output along with a description of the issue you are seeing? -Kevin

4 4

Patch set updated for coreboot: 5763ba7 Use MMCONF for all AMD family 10 CPUs.
by Marc Jones 08 Dec '11

08 Dec '11

Marc Jones (marcj303(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/455 -gerrit commit 5763ba7b96d997412c6e014714edacf852910f57 Author: Marc Jones <marcj303(a)gmail.com> Date: Wed Nov 23 17:49:19 2011 -0700 Use MMCONF for all AMD family 10 CPUs. This fixes problems in AP init when multiple APs are trying to access PCI config space. All Fam10 CPUs setup and support MMCONF. Change-Id: I00a25bbf4e4152c89024f14a3c4c1c36b48d0128 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- src/cpu/amd/model_10xxx/Kconfig | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 6aab30a..310f98d 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -48,8 +48,7 @@ config SET_FIDVID_CORE_RANGE int default 0 -endif -endif +endif # SET_FIDVID config UPDATE_CPU_MICROCODE bool @@ -82,3 +81,7 @@ config UPDATE_CPU_MICROCODE Note that some operating system include these same microcode patches, so you may need to also disable microcode updates in your operating system in order for this option to matter. + +select MMCONF_SUPPORT_DEFAULT + +endif # CPU_AMD_MODEL_10XXX

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Patch merged into coreboot/master: 7480cad Change DSDT Table ID for M4A785T-M board
by gerrit＠coreboot.org 08 Dec '11

08 Dec '11

the following patch was just integrated into master: commit 7480cad50c33e1cd8ca8f091318404468c48627f Author: Alec Ari <neotheuser(a)ymail.com> Date: Wed Dec 7 01:50:52 2011 -0600 Change DSDT Table ID for M4A785T-M board Change the DSDT Table ID for M4A785T-M from M4A785-M to M4A785T-M. This fixes a small copypasta. This is an updated patch set. Change-Id: I43ee024222cf04d03685ffaee616971100cc9e6c Signed-off-by: Alec Ari <neotheuser(a)ymail.com> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Thu Dec 8 22:42:03 2011, giving +2 See http://review.coreboot.org/474 for details. -gerrit

1 0

Patch set updated for coreboot: 7480cad Change DSDT Table ID for M4A785T-M board
by Alec Ari 08 Dec '11

08 Dec '11

Alec Ari (neotheuser(a)ymail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/474 -gerrit commit 7480cad50c33e1cd8ca8f091318404468c48627f Author: Alec Ari <neotheuser(a)ymail.com> Date: Wed Dec 7 01:50:52 2011 -0600 Change DSDT Table ID for M4A785T-M board Change the DSDT Table ID for M4A785T-M from M4A785-M to M4A785T-M. This fixes a small copypasta. This is an updated patch set. Change-Id: I43ee024222cf04d03685ffaee616971100cc9e6c Signed-off-by: Alec Ari <neotheuser(a)ymail.com> --- src/mainboard/asus/m4a785t-m/dsdt.asl | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/asus/m4a785t-m/dsdt.asl b/src/mainboard/asus/m4a785t-m/dsdt.asl index 34ddd3a..d6a4355 100644 --- a/src/mainboard/asus/m4a785t-m/dsdt.asl +++ b/src/mainboard/asus/m4a785t-m/dsdt.asl @@ -22,8 +22,8 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ 0x02, /* DSDT Revision, needs to be 2 for 64bit */ - "ASUS ", /* OEMID */ - "M4A785-M ", /* TABLE ID */ + "ASUS", /* OEMID */ + "M4A785T ", /* TABLE ID */ 0x00010001 /* OEM Revision */ ) { /* Start of ASL file */

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New patch to review for coreboot: 340d640 libpayload: Remove bitfield use from EHCI data structures
by Patrick Georgi 08 Dec '11

08 Dec '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/480 -gerrit commit 340d64045cf4798d301d28664d24bc9ef78050e6 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Nov 24 13:19:57 2011 +0100 libpayload: Remove bitfield use from EHCI data structures We agreed that bitfields are a Bad Idea[tm]. Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- payloads/libpayload/drivers/usb/ehci.c | 144 +++++++------- payloads/libpayload/drivers/usb/ehci_private.h | 249 ++++++------------------ payloads/libpayload/drivers/usb/ehci_rh.c | 41 ++--- 3 files changed, 139 insertions(+), 295 deletions(-) diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index 71fbd7a..9500059 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -34,19 +34,19 @@ static void dump_td(u32 addr) { qtd_t *td = phys_to_virt(addr); - debug("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n babble: %x, xact_err: %x, missed_mframe: %x\n splitxstate: %x, perr: %x\n\n", - addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr); - debug("- cerr: %x, total_len: %x\n\n", td->cerr, td->total_len); + debug("td at phys(%x): status: %x\n\n", addr, td->token & QTD_STATUS_MASK); + debug("- cerr: %x, total_len: %x\n\n", (td->token & QTD_CERR_MASK) >> QTD_CERR_SHIFT, + (td->token & QTD_TOTAL_LEN_MASK) >> QTD_TOTAL_LEN_SHIFT); } static void ehci_start (hci_t *controller) { - EHCI_INST(controller)->operation->rs = 1; + EHCI_INST(controller)->operation->usbcmd |= HC_OP_RS; } static void ehci_stop (hci_t *controller) { - EHCI_INST(controller)->operation->rs = 0; + EHCI_INST(controller)->operation->usbcmd &= ~HC_OP_RS; } static void ehci_reset (hci_t *controller) @@ -61,20 +61,19 @@ static void ehci_shutdown (hci_t *controller) enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 }; -/* returns handled bytes */ -int fill_td(qtd_t *td, void* data, int datalen) +/* returns handled bytes. assumes that the fields it writes are empty on entry */ +static int fill_td(qtd_t *td, void* data, int datalen) { u32 total_len = 0; - u32 page_minus_1 = 0; + u32 page_no = 0; u32 start = virt_to_phys(data); u32 page = start & ~4095; u32 offset = start & 4095; u32 page_len = 4096 - offset; - td->c_page = 0; - td->bufptr0 = page; - td->cur_off = offset; + td->token |= 0 << QTD_CPAGE_SHIFT; + td->bufptrs[page_no++] = start; if (datalen <= page_len) { total_len = datalen; @@ -82,26 +81,25 @@ int fill_td(qtd_t *td, void* data, int datalen) datalen -= page_len; total_len += page_len; - do { + while (page_no < 5) { /* we have a continguous mapping between virtual and physical memory */ page += 4096; - td->bufptrs[page_minus_1] = page; + td->bufptrs[page_no++] = page; if (datalen <= 4096) { total_len += datalen; break; } - page_minus_1++; datalen -= 4096; total_len += 4096; - } while (page_minus_1<4); + } } - td->total_len = total_len; + td->token |= total_len << QTD_TOTAL_LEN_SHIFT; return total_len; } /* free up data structures */ -void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) +static void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) { qtd_t *next; while (cur) { @@ -112,14 +110,14 @@ void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) free(qh); } -int wait_for_tds(qtd_t *head) +static int wait_for_tds(qtd_t *head) { int result = 0; qtd_t *cur = head; while (1) { if (0) dump_td(virt_to_phys(cur)); - while (cur->active && !cur->halted) udelay(60); - if (cur->halted) { + while ((cur->token & QTD_ACTIVE) && !(cur->token & QTD_HALTED)) udelay(60); + if (cur->token & QTD_HALTED) { printf("ERROR with packet\n"); dump_td(virt_to_phys(cur)); debug("-----------------\n"); @@ -146,17 +144,16 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize) qtd_t *cur = head; while (1) { memset(cur, 0, sizeof(qtd_t)); - cur->active = 1; - cur->pid = pid; - cur->cerr = 0; + cur->token = QTD_ACTIVE | + (pid << QTD_PID_SHIFT) | + (0 << QTD_CERR_SHIFT); u32 chunk = fill_td(cur, data, size); size -= chunk; data += chunk; - cur->alt_terminate = 1; + cur->alt_next_qtd = QTD_TERMINATE; if (size == 0) { - cur->next_qtd = virt_to_phys(0); - cur->terminate = 1; + cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE; break; } else { qtd_t *next = memalign(32, sizeof(qtd_t)); @@ -168,36 +165,35 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize) /* create QH */ ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); memset(qh, 0, sizeof(ehci_qh_t)); - qh->horiz_link_ptr = virt_to_phys(qh); - qh->type = 1; // FIXME: proper symbols for type. this is QH - qh->addr = ep->dev->address; - qh->ep = endp; - qh->eps = ep->dev->speed; - qh->dtc = 0; - qh->reclaim_head = 1; - qh->max_packet_len = ep->maxpacketsize; - qh->nak_cnt_reload = 0; - qh->pipe_multiplier = 3; + qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH; + qh->epchar = ep->dev->address | + (endp << QH_EP_SHIFT) | + (ep->dev->speed << QH_EPS_SHIFT) | + (0 << QH_DTC_SHIFT) | + (1 << QH_RECLAIM_HEAD_SHIFT) | + (ep->maxpacketsize << QH_MPS_SHIFT) | + (0 << QH_NAK_CNT_SHIFT); + qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT; qh->td.next_qtd = virt_to_phys(head); - qh->td.dt = ep->toggle; - head->dt = ep->toggle; + qh->td.token |= (ep->toggle?QTD_TOGGLE_DATA1:0); + head->token |= (ep->toggle?QTD_TOGGLE_DATA1:0); /* hook up QH */ EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh); /* start async schedule */ - EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1; - while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ + EHCI_INST(ep->dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN; + while (!(EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */ /* wait for result */ result = wait_for_tds(head); /* disable async schedule */ - EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0; - while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ + EHCI_INST(ep->dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN; + while (EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */ - ep->toggle = cur->dt; + ep->toggle = (cur->token & QTD_TOGGLE_MASK) >> QTD_TOGGLE_SHIFT; free_qh_and_tds(qh, head); return result; @@ -217,16 +213,16 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq qtd_t *head = memalign(32, sizeof(qtd_t)); qtd_t *cur = head; memset(cur, 0, sizeof(qtd_t)); - cur->active = 1; - cur->dt = toggle; - cur->pid = EHCI_SETUP; - cur->cerr = 3; + cur->token = QTD_ACTIVE | + (toggle?QTD_TOGGLE_DATA1:0) | + (EHCI_SETUP << QTD_PID_SHIFT) | + (3 << QTD_CERR_SHIFT); if (fill_td(cur, devreq, drlen) != drlen) { printf("ERROR: couldn't send the entire device request\n"); } qtd_t *next = memalign(32, sizeof(qtd_t)); cur->next_qtd = virt_to_phys(next); - cur->alt_terminate = 1; + cur->alt_next_qtd = QTD_TERMINATE; /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now. * Figure out, how toggle can be set sensibly in this scenario */ @@ -234,58 +230,56 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq toggle ^= 1; cur = next; memset(cur, 0, sizeof(qtd_t)); - cur->active = 1; - cur->dt = toggle; - cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN; - cur->cerr = 3; + cur->token = QTD_ACTIVE | + (toggle?QTD_TOGGLE_DATA1:0) | + (((dir == OUT)?EHCI_OUT:EHCI_IN) << QTD_PID_SHIFT) | + (3 << QTD_CERR_SHIFT); if (fill_td(cur, data, dalen) != dalen) { printf("ERROR: couldn't send the entire control payload\n"); } next = memalign(32, sizeof(qtd_t)); cur->next_qtd = virt_to_phys(next); - cur->alt_terminate = 1; + cur->alt_next_qtd = QTD_TERMINATE; } toggle = 1; cur = next; memset(cur, 0, sizeof(qtd_t)); - cur->active = 1; - cur->dt = toggle; - cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT; - cur->cerr = 0; + cur->token = QTD_ACTIVE | + (toggle?QTD_TOGGLE_DATA1:QTD_TOGGLE_DATA0) | + ((dir == OUT)?EHCI_IN:EHCI_OUT) << QTD_PID_SHIFT | + (0 << QTD_CERR_SHIFT); fill_td(cur, NULL, 0); - cur->next_qtd = virt_to_phys(0); - cur->terminate = 1; - cur->alt_terminate = 1; + cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE; + cur->alt_next_qtd = QTD_TERMINATE; /* create QH */ ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); memset(qh, 0, sizeof(ehci_qh_t)); - qh->horiz_link_ptr = virt_to_phys(qh); - qh->type = 1; // FIXME: proper symbols for type. this is QH - qh->addr = dev->address; - qh->ep = endp; - qh->eps = dev->speed; - qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */ - qh->reclaim_head = 1; - qh->max_packet_len = mlen; - qh->non_hs_control_ep = 0; // no support for non-HS devices at this time - qh->nak_cnt_reload = 0; - qh->pipe_multiplier = 3; + qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH; + qh->epchar = dev->address | + (endp << QH_EP_SHIFT) | + (dev->speed << QH_EPS_SHIFT) | + (1 << QH_DTC_SHIFT) | /* ctrl transfers are special: take toggle bit from TD */ + (1 << QH_RECLAIM_HEAD_SHIFT) | + (mlen << QH_MPS_SHIFT) | + (0 << QH_NON_HS_CTRL_EP_SHIFT) | /* no non-HS device support yet */ + (0 << QH_NAK_CNT_SHIFT); + qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT; qh->td.next_qtd = virt_to_phys(head); /* hook up QH */ EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh); /* start async schedule */ - EHCI_INST(dev->controller)->operation->async_sched_enable = 1; - while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ + EHCI_INST(dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN; + while (!(EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */ result = wait_for_tds(head); /* disable async schedule */ - EHCI_INST(dev->controller)->operation->async_sched_enable = 0; - while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ + EHCI_INST(dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN; + while (EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */ free_qh_and_tds(qh, head); return result; diff --git a/payloads/libpayload/drivers/usb/ehci_private.h b/payloads/libpayload/drivers/usb/ehci_private.h index f4890cc..22fd7b2 100644 --- a/payloads/libpayload/drivers/usb/ehci_private.h +++ b/payloads/libpayload/drivers/usb/ehci_private.h @@ -37,134 +37,35 @@ #define FLADJ 0x61 #define FLADJ_framelength(x) (((x)-59488)/16) -typedef volatile union { - u32 val; - volatile struct { - unsigned long current_conn_status:1; - unsigned long conn_status_change:1; - unsigned long port_enable:1; - unsigned long port_enable_change:1; - unsigned long overcurrent:1; - unsigned long overcurrent_change:1; - unsigned long force_port_resume:1; - unsigned long suspend:1; - unsigned long port_reset:1; - unsigned long:1; - unsigned long line_status:2; - unsigned long pp:1; - unsigned long port_owner:1; - unsigned long port_indicator_control:2; - unsigned long port_test_control:4; - unsigned long wake_on_connect_en:1; - unsigned long wake_on_disconnect_en:1; - unsigned long wake_on_overcurrent_en:1; - unsigned long:9; - } __attribute__ ((packed)); -} __attribute__ ((packed)) portsc_t; +typedef volatile u32 portsc_t; +#define P_CURR_CONN_STATUS (1 << 0) +#define P_CONN_STATUS_CHANGE (1 << 1) +#define P_PORT_ENABLE (1 << 2) +#define P_PORT_RESET (1 << 8) +#define P_LINE_STATUS (3 << 10) +#define P_LINE_STATUS_LOWSPEED (1 << 10) +#define P_PP (1 << 12) +#define P_PORT_OWNER (1 << 13) typedef volatile struct { +#define HCS_NPORTS_MASK 0xf u8 caplength; u8 res1; u16 hciversion; - union { - u32 hcsparams; - struct { - unsigned long n_ports:4; - unsigned long ppc:1; - unsigned long:2; - unsigned long port_routing_rules:1; - unsigned long n_pcc:4; - unsigned long n_cc:4; - unsigned long p_indicator:1; - unsigned long:3; - unsigned long debug_port_number:4; - unsigned long:8; - } __attribute__ ((packed)); - }; - union { - u32 hccparams; - struct { - unsigned long cap_64b_addr:1; - unsigned long cap_prog_framelist_size:1; - unsigned long cap_async_park:1; - unsigned long:1; - unsigned long isoc_sched_threshold:4; - unsigned long eecp:8; - unsigned long:16; - } __attribute__ ((packed)); - }; - union { - u64 hcsp_portroute; - struct { - unsigned long portroute0:4; - unsigned long portroute1:4; - unsigned long portroute2:4; - unsigned long portroute3:4; - unsigned long portroute4:4; - unsigned long portroute5:4; - unsigned long portroute6:4; - unsigned long portroute7:4; - unsigned long portroute8:4; - unsigned long portroute9:4; - unsigned long portroute10:4; - unsigned long portroute11:4; - unsigned long portroute12:4; - unsigned long portroute13:4; - unsigned long portroute14:4; - unsigned long portroute15:4; - unsigned long:4; - } __attribute__ ((packed)); - }; + u32 hcsparams; + u32 hccparams; + u64 hcsp_portroute; } __attribute__ ((packed)) hc_cap_t; typedef volatile struct { - union { - u32 usbcmd; - volatile struct { - unsigned long rs:1; - unsigned long hcreset:1; - unsigned long frame_list_size:2; - unsigned long periodic_sched_enable:1; - unsigned long async_sched_enable:1; - unsigned long irq_on_async_advance_doorbell:1; - unsigned long light_hc_reset:1; - unsigned long async_sched_park_mode_count:2; - unsigned long:1; - unsigned long async_sched_park_mode_enable:1; - unsigned long:4; - unsigned long irq_threshold_count:8; - unsigned long:8; - } __attribute__ ((packed)); - }; - union { - u32 usbsts; - struct { - unsigned long usbint:1; - unsigned long usberrint:1; - unsigned long port_change_detect:1; - unsigned long frame_list_rollover:1; - unsigned long host_system_error:1; - unsigned long irq_on_async_advance:1; - unsigned long:6; - unsigned long hchalted:1; - unsigned long reclamation:1; - unsigned long periodic_sched_status:1; - unsigned long async_sched_status:1; - unsigned long:16; - } __attribute__ ((packed)); - }; - union { - u32 usbintr; - struct { - unsigned long en_usb_irq:1; - unsigned long en_usb_err_irq:1; - unsigned long en_port_change_irq:1; - unsigned long en_frame_list_rollover_irq:1; - unsigned long en_host_system_error_irq:1; - unsigned long en_irq_on_async_advance:1; - unsigned long:26; - } __attribute__ ((packed)); - }; + u32 usbcmd; +#define HC_OP_RS 1 +#define HC_OP_ASYNC_SCHED_EN_SHIFT 5 +#define HC_OP_ASYNC_SCHED_EN (1 << HC_OP_ASYNC_SCHED_EN_SHIFT) + u32 usbsts; +#define HC_OP_ASYNC_SCHED_STAT_SHIFT 15 +#define HC_OP_ASYNC_SCHED_STAT (1 << HC_OP_ASYNC_SCHED_STAT_SHIFT) + u32 usbintr; u32 frindex; u32 ctrldssegment; u32 periodiclistbase; @@ -175,82 +76,46 @@ typedef volatile struct { } hc_op_t; typedef volatile struct { - union { - u32 next_qtd; - struct { - unsigned long terminate:1; - unsigned long:4; - unsigned long:27; - } __attribute__ ((packed)); - }; - union { - u32 alt_next_qtd; - struct { - unsigned long alt_terminate:1; - unsigned long:4; - unsigned long:27; - } __attribute__ ((packed)); - }; - struct { - union { - volatile u8 status; - struct { - volatile unsigned long perr:1; - volatile unsigned long splitxstate:1; - volatile unsigned long missed_mframe:1; - volatile unsigned long xact_err:1; - volatile unsigned long babble:1; - volatile unsigned long data_buf_err:1; - volatile unsigned long halted:1; - volatile unsigned long active:1; - } __attribute__ ((packed)); - }; - unsigned long pid:2; - volatile unsigned long cerr:2; - volatile unsigned long c_page:3; - unsigned long ioc:1; - volatile unsigned long total_len:15; - volatile unsigned long dt:1; - } __attribute__ ((packed)); - union { - u32 bufptr0; - struct { - volatile unsigned long cur_off:12; - unsigned long:20; - } __attribute__ ((packed)); - }; - u32 bufptrs[4]; +#define QTD_TERMINATE 1 + u32 next_qtd; + u32 alt_next_qtd; + u32 token; +#define QTD_STATUS_MASK 0xff +#define QTD_HALTED (1 << 14) +#define QTD_ACTIVE (1 << 15) +#define QTD_PID_SHIFT 8 +#define QTD_PID_MASK (3 << QTD_PID_SHIFT) +#define QTD_CERR_SHIFT 10 +#define QTD_CERR_MASK (3 << QTD_CERR_SHIFT) +#define QTD_CPAGE_SHIFT 12 +#define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT) +#define QTD_TOTAL_LEN_SHIFT 16 +#define QTD_TOTAL_LEN_MASK (((1<<15)-1) << QTD_TOTAL_LEN_SHIFT) +#define QTD_TOGGLE_SHIFT 31 +#define QTD_TOGGLE_MASK (1 << 31) +#define QTD_TOGGLE_DATA0 0 +#define QTD_TOGGLE_DATA1 (1 << QTD_TOGGLE_SHIFT) + u32 bufptrs[5]; u32 bufptrs64[5]; } __attribute__ ((packed)) qtd_t; typedef volatile struct { - union { - u32 horiz_link_ptr; - struct { - unsigned long terminate:1; - unsigned long type:2; - unsigned long:1; - unsigned long:28; - } __attribute__ ((packed)); - }; - struct { - unsigned long addr:7; - unsigned long inactivate:1; - unsigned long ep:4; - unsigned long eps:2; - unsigned long dtc:1; - unsigned long reclaim_head:1; - unsigned long max_packet_len:11; - unsigned long non_hs_control_ep:1; - unsigned long nak_cnt_reload:4; - } __attribute__ ((packed)); - struct { - unsigned long irq_sched_mask:8; - unsigned long split_compl_mask:8; - unsigned long hub_addr:7; - unsigned long port_num:7; - unsigned long pipe_multiplier:2; - } __attribute__ ((packed)); + u32 horiz_link_ptr; +#define QH_TERMINATE 1 +#define QH_iTD (0<<1) +#define QH_QH (1<<1) +#define QH_siTD (2<<1) +#define QH_FSTN (3<<1) + u32 epchar; +#define QH_EP_SHIFT 8 +#define QH_EPS_SHIFT 12 +#define QH_DTC_SHIFT 14 +#define QH_RECLAIM_HEAD_SHIFT 15 +#define QH_MPS_SHIFT 16 +#define QH_NON_HS_CTRL_EP_SHIFT 27 +#define QH_NAK_CNT_SHIFT 28 + u32 epcaps; +#define QH_PIPE_MULTIPLIER_SHIFT 30 volatile u32 current_td_ptr; volatile qtd_t td; } ehci_qh_t; diff --git a/payloads/libpayload/drivers/usb/ehci_rh.c b/payloads/libpayload/drivers/usb/ehci_rh.c index 22476c1..d9ba8e4 100644 --- a/payloads/libpayload/drivers/usb/ehci_rh.c +++ b/payloads/libpayload/drivers/usb/ehci_rh.c @@ -54,19 +54,14 @@ static void ehci_rh_hand_over_port (usbdev_t *dev, int port) { volatile portsc_t *p = &(RH_INST(dev)->ports[port]); - volatile portsc_t tmp; debug("giving up port %x, it's USB1\n", port+1); /* Lowspeed device. Hand over to companion */ - tmp = *p; - tmp.port_owner = 1; - *p = tmp; - do {} while (!p->conn_status_change); + *p |= P_PORT_OWNER; + do {} while (!(*p & P_CONN_STATUS_CHANGE)); /* RW/C register, so clear it by writing 1 */ - tmp = *p; - tmp.conn_status_change = 1; - *p = tmp; + *p |= P_CONN_STATUS_CHANGE; return; } @@ -74,16 +69,15 @@ static void ehci_rh_scanport (usbdev_t *dev, int port) { volatile portsc_t *p = &(RH_INST(dev)->ports[port]); - volatile portsc_t tmp; if (RH_INST(dev)->devices[port]!=-1) { debug("Unregister device at port %x\n", port+1); usb_detach_device(dev->controller, RH_INST(dev)->devices[port]); RH_INST(dev)->devices[port]=-1; } /* device connected, handle */ - if (p->current_conn_status) { + if (*p & P_CURR_CONN_STATUS) { mdelay(100); - if (p->line_status == 0x1) { + if ((*p & P_LINE_STATUS) == P_LINE_STATUS_LOWSPEED) { ehci_rh_hand_over_port(dev, port); return; } @@ -91,21 +85,17 @@ ehci_rh_scanport (usbdev_t *dev, int port) /* Deassert enable, assert reset. These must change * atomically. */ - tmp = *p; - tmp.port_enable = 0; - tmp.port_reset = 1; - *p = tmp; + *p = (*p & ~P_PORT_ENABLE) | P_PORT_RESET; /* Wait a bit while reset is active. */ mdelay(50); /* Deassert reset. */ - tmp.port_reset = 0; - *p = tmp; + *p &= ~P_PORT_RESET; /* Wait for flag change to finish. The controller might take a while */ - while (p->port_reset) ; - if (!p->port_enable) { + while (*p & P_PORT_RESET) ; + if (!(*p & P_PORT_ENABLE)) { ehci_rh_hand_over_port(dev, port); return; } @@ -113,9 +103,7 @@ ehci_rh_scanport (usbdev_t *dev, int port) RH_INST(dev)->devices[port] = usb_attach_device(dev->controller, dev->address, port, 2); } /* RW/C register, so clear it by writing 1 */ - tmp = *p; - tmp.conn_status_change = 1; - *p = tmp; + *p |= P_CONN_STATUS_CHANGE; } static int @@ -123,7 +111,7 @@ ehci_rh_report_port_changes (usbdev_t *dev) { int i; for (i=0; i<RH_INST(dev)->n_ports; i++) { - if (RH_INST(dev)->ports[i].conn_status_change) + if (RH_INST(dev)->ports[i] & P_CONN_STATUS_CHANGE) return i; } return -1; @@ -143,14 +131,13 @@ ehci_rh_init (usbdev_t *dev) { int i; volatile portsc_t *p; - volatile portsc_t tmp; dev->destroy = ehci_rh_destroy; dev->poll = ehci_rh_poll; dev->data = malloc(sizeof(rh_inst_t)); - RH_INST(dev)->n_ports = EHCI_INST(dev->controller)->capabilities->n_ports; + RH_INST(dev)->n_ports = EHCI_INST(dev->controller)->capabilities->hcsparams & HCS_NPORTS_MASK; RH_INST(dev)->ports = EHCI_INST(dev->controller)->operation->portsc; debug("root hub has %x ports\n", RH_INST(dev)->n_ports); @@ -159,9 +146,7 @@ ehci_rh_init (usbdev_t *dev) for (i=0; i < RH_INST(dev)->n_ports; i++) { p = &(RH_INST(dev)->ports[i]); RH_INST(dev)->devices[i] = -1; - tmp = *p; - tmp.pp = 1; - *p = tmp; + *p |= P_PP; } dev->address = 0;

1 0

New patch to review for coreboot: 8f5c7b3 libpayload: Remove bitfield use from OHCI data structures
by Patrick Georgi 08 Dec '11

08 Dec '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/479 -gerrit commit 8f5c7b3a920532a36375705092ad1edd27599326 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Nov 24 09:12:11 2011 +0100 libpayload: Remove bitfield use from OHCI data structures We agreed that bitfields are a Bad Idea[tm]. Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- payloads/libpayload/drivers/usb/ohci.c | 83 +++++++++++------------- payloads/libpayload/drivers/usb/ohci_private.h | 62 ++++++++---------- 2 files changed, 65 insertions(+), 80 deletions(-) diff --git a/payloads/libpayload/drivers/usb/ohci.c b/payloads/libpayload/drivers/usb/ohci.c index 60866d8..4095d69 100644 --- a/payloads/libpayload/drivers/usb/ohci.c +++ b/payloads/libpayload/drivers/usb/ohci.c @@ -188,7 +188,8 @@ dump_td(td_t *cur, int level) #ifdef USB_DEBUG static const char *spaces=" "; const char *spc=spaces+(10-level); - debug("%std at %x (%s), condition code: %s\n", spc, cur, direction[cur->direction], completion_codes[cur->condition_code & 0xf]); + debug("%std at %x (%s), condition code: %s\n", spc, cur, direction[(cur->config & TD_DIRECTION_MASK) >> TD_DIRECTION_SHIFT], + completion_codes[(cur->config & TD_CC_MASK) >> TD_CC_SHIFT]); debug("%s toggle: %x\n", spc, cur->toggle); #endif } @@ -201,7 +202,7 @@ wait_for_ed(usbdev_t *dev, ed_t *head) /* wait for results */ while (((head->head_pointer & ~3) != head->tail_pointer) && !(head->head_pointer & 1) && - ((((td_t*)phys_to_virt(head->head_pointer & ~3))->condition_code & 0xf)>=0xe)) { + ((((td_t*)phys_to_virt(head->head_pointer & ~3))->config & TD_CC_MASK) >= TD_CC_NOACCESS)) { debug("intst: %x; ctrl: %x; cmdst: %x; head: %x -> %x, tail: %x, condition: %x\n", OHCI_INST(dev->controller)->opreg->HcInterruptStatus, OHCI_INST(dev->controller)->opreg->HcControl, @@ -209,7 +210,7 @@ wait_for_ed(usbdev_t *dev, ed_t *head) head->head_pointer, ((td_t*)phys_to_virt(head->head_pointer & ~3))->next_td, head->tail_pointer, - ((td_t*)phys_to_virt(head->head_pointer & ~3))->condition_code); + (((td_t*)phys_to_virt(head->head_pointer & ~3))->config & TD_CC_MASK) >> TD_CC_SHIFT); mdelay(1); } mdelay(5); @@ -266,12 +267,11 @@ ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen } tds[td_count + 3].next_td = 0; - tds[0].direction = OHCI_SETUP; - tds[0].toggle_from_td = 1; - tds[0].toggle = 0; - tds[0].error_count = 0; - tds[0].delay_interrupt = 7; - tds[0].condition_code = 0xf; + tds[0].config = TD_DIRECTION_SETUP | + TD_DELAY_INTERRUPT_NODELAY | + TD_TOGGLE_FROM_TD | + TD_TOGGLE_DATA0 | + TD_CC_NOACCESS; tds[0].current_buffer_pointer = virt_to_phys(devreq); tds[0].buffer_end = virt_to_phys(devreq + drlen - 1); @@ -279,12 +279,10 @@ ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen while (pages > 0) { cur++; - cur->direction = (dir==IN)?OHCI_IN:OHCI_OUT; - cur->toggle_from_td = 0; - cur->toggle = 1; - cur->error_count = 0; - cur->delay_interrupt = 7; - cur->condition_code = 0xf; + cur->config = (dir==IN)?TD_DIRECTION_IN:TD_DIRECTION_OUT | + TD_DELAY_INTERRUPT_NODELAY | + TD_TOGGLE_FROM_ED | + TD_CC_NOACCESS; cur->current_buffer_pointer = virt_to_phys(data); pages--; int consumed = (4096 - ((unsigned long)data % 4096)); @@ -308,12 +306,11 @@ ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen } cur++; - cur->direction = (dir==IN)?OHCI_OUT:OHCI_IN; - cur->toggle_from_td = 1; - cur->toggle = 1; - cur->error_count = 0; - cur->delay_interrupt = 7; - cur->condition_code = 0xf; + cur->config = (dir==IN)?TD_DIRECTION_OUT:TD_DIRECTION_IN | + TD_DELAY_INTERRUPT_NODELAY | + TD_TOGGLE_FROM_TD | + TD_TOGGLE_DATA1 | + TD_CC_NOACCESS; cur->current_buffer_pointer = 0; cur->buffer_end = 0; @@ -323,18 +320,15 @@ ohci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen /* Data structures */ ed_t *head = memalign(sizeof(ed_t), sizeof(ed_t)); memset((void*)head, 0, sizeof(*head)); - head->function_address = dev->address; - head->endpoint_number = 0; - head->direction = OHCI_FROM_TD; - head->lowspeed = dev->speed; - head->format = 0; - head->maximum_packet_size = dev->endpoints[0].maxpacketsize; + head->config = (dev->address << ED_FUNC_SHIFT) | + (0 << ED_EP_SHIFT) | + (OHCI_FROM_TD << ED_DIR_SHIFT) | + (dev->speed?ED_LOWSPEED:0) | + (dev->endpoints[0].maxpacketsize << ED_MPS_SHIFT); head->tail_pointer = virt_to_phys(cur); head->head_pointer = virt_to_phys(tds); - head->halted = 0; - head->toggle = 0; - debug("doing control transfer with %x. first_td at %x\n", head->function_address, virt_to_phys(tds)); + debug("doing control transfer with %x. first_td at %x\n", head->config & ED_FUNC_MASK, virt_to_phys(tds)); /* activate schedule */ OHCI_INST(dev->controller)->opreg->HcControlHeadED = virt_to_phys(head); @@ -379,11 +373,10 @@ ohci_bulk (endpoint_t *ep, int dalen, u8 *data, int finalize) } for (cur = tds; cur->next_td != 0; cur++) { - cur->toggle_from_td = 0; - cur->error_count = 0; - cur->delay_interrupt = 7; - cur->condition_code = 0xf; - cur->direction = (ep->direction==IN)?OHCI_IN:OHCI_OUT; + cur->config = (ep->direction==IN)?TD_DIRECTION_IN:TD_DIRECTION_OUT | + TD_DELAY_INTERRUPT_NODELAY | + TD_TOGGLE_FROM_ED | + TD_CC_NOACCESS; cur->current_buffer_pointer = virt_to_phys(data); pages--; if (dalen == 0) { @@ -415,18 +408,16 @@ ohci_bulk (endpoint_t *ep, int dalen, u8 *data, int finalize) /* Data structures */ ed_t *head = memalign(sizeof(ed_t), sizeof(ed_t)); memset((void*)head, 0, sizeof(*head)); - head->function_address = ep->dev->address; - head->endpoint_number = ep->endpoint & 0xf; - head->direction = (ep->direction==IN)?OHCI_IN:OHCI_OUT; - head->lowspeed = ep->dev->speed; - head->format = 0; - head->maximum_packet_size = ep->maxpacketsize; + head->config = (ep->dev->address << ED_FUNC_SHIFT) | + ((ep->endpoint & 0xf) << ED_EP_SHIFT) | + (((ep->direction==IN)?OHCI_IN:OHCI_OUT) << ED_DIR_SHIFT) | + (ep->dev->speed?ED_LOWSPEED:0) | + (ep->maxpacketsize << ED_MPS_SHIFT); head->tail_pointer = virt_to_phys(cur); - head->head_pointer = virt_to_phys(tds); - head->halted = 0; - head->toggle = ep->toggle; + head->head_pointer = virt_to_phys(tds) | (ep->toggle?ED_TOGGLE:0); - debug("doing bulk transfer with %x(%x). first_td at %x, last %x\n", head->function_address, head->endpoint_number, virt_to_phys(tds), virt_to_phys(cur)); + debug("doing bulk transfer with %x(%x). first_td at %x, last %x\n", head->config & ED_FUNC_MASK, + (head->config & ED_EP_MASK) >> ED_EP_SHIFT, virt_to_phys(tds), virt_to_phys(cur)); /* activate schedule */ OHCI_INST(ep->dev->controller)->opreg->HcBulkHeadED = virt_to_phys(head); @@ -436,7 +427,7 @@ ohci_bulk (endpoint_t *ep, int dalen, u8 *data, int finalize) int failure = wait_for_ed(ep->dev, head); OHCI_INST(ep->dev->controller)->opreg->HcControl &= ~BulkListEnable; - ep->toggle = head->toggle; + ep->toggle = head->head_pointer & ED_TOGGLE; /* free memory */ free((void*)tds); diff --git a/payloads/libpayload/drivers/usb/ohci_private.h b/payloads/libpayload/drivers/usb/ohci_private.h index a340be1..d0b8ffc 100644 --- a/payloads/libpayload/drivers/usb/ohci_private.h +++ b/payloads/libpayload/drivers/usb/ohci_private.h @@ -206,49 +206,43 @@ typedef enum { OHCI_SETUP=0, OHCI_OUT=1, OHCI_IN=2, OHCI_FROM_TD=3 } ohci_pid_t; typedef volatile struct { - union { - u32 dword0; - struct { - unsigned long function_address:7; - unsigned long endpoint_number:4; - unsigned long direction:2; - unsigned long lowspeed:1; - unsigned long skip:1; - unsigned long format:1; - unsigned long maximum_packet_size:11; - unsigned long:5; - } __attribute__ ((packed)); - }; + u32 config; u32 tail_pointer; - union { - u32 head_pointer; - struct { - unsigned long halted:1; - unsigned long toggle:1; - unsigned long:30; - } __attribute__ ((packed)); - }; + u32 head_pointer; u32 next_ed; } __attribute__ ((packed)) ed_t; +#define ED_HALTED 1 +#define ED_TOGGLE 2 + +#define ED_FUNC_SHIFT 0 +#define ED_FUNC_MASK MASK(7, 0) +#define ED_EP_SHIFT 7 +#define ED_EP_MASK MASK(4, 7) +#define ED_DIR_SHIFT 11 +#define ED_DIR_MASK MASK(2, 11) +#define ED_LOWSPEED (1 << 13) +#define ED_MPS_SHIFT 16 typedef volatile struct { - union { - u32 dword0; - struct { - unsigned long:18; - unsigned long buffer_rounding:1; - unsigned long direction:2; - unsigned long delay_interrupt:3; - unsigned long toggle:1; - unsigned long toggle_from_td:1; - unsigned long error_count:2; - unsigned long condition_code:4; - } __attribute__ ((packed)); - }; + u32 config; u32 current_buffer_pointer; u32 next_td; u32 buffer_end; } __attribute__ ((packed)) td_t; +#define TD_DIRECTION_SHIFT 19 +#define TD_DIRECTION_MASK MASK(2, TD_DIRECTION_SHIFT) +#define TD_DIRECTION_SETUP OHCI_SETUP << TD_DIRECTION_SHIFT +#define TD_DIRECTION_IN OHCI_IN << TD_DIRECTION_SHIFT +#define TD_DIRECTION_OUT OHCI_OUT << TD_DIRECTION_SHIFT +#define TD_DELAY_INTERRUPT_NODELAY (7 << 21) +#define TD_TOGGLE_DATA0 0 +#define TD_TOGGLE_DATA1 (1 << 24) +#define TD_TOGGLE_FROM_ED 0 +#define TD_TOGGLE_FROM_TD (1 << 25) +#define TD_CC_SHIFT 28 +#define TD_CC_MASK MASK(4, TD_CC_SHIFT) +#define TD_CC_NOERR 0 +#define TD_CC_NOACCESS (14 << TD_CC_SHIFT) /* the lower of the two values, so "no access" can be tested with >= */ #define OHCI_INST(controller) ((ohci_t*)((controller)->instance))

1 0

New patch to review for coreboot: c10f527 libpayload: Remove bitfield use from UHCI data structures
by Patrick Georgi 08 Dec '11

08 Dec '11

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/478 -gerrit commit c10f52730fcfd22693cea27d6cc0fbf66000d8e2 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Nov 24 11:55:46 2011 +0100 libpayload: Remove bitfield use from UHCI data structures We agreed that bitfields are a Bad Idea[tm]. Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- payloads/libpayload/drivers/usb/uhci.c | 250 ++++++++++-------------- payloads/libpayload/drivers/usb/uhci_private.h | 73 +++----- 2 files changed, 133 insertions(+), 190 deletions(-) diff --git a/payloads/libpayload/drivers/usb/uhci.c b/payloads/libpayload/drivers/usb/uhci.c index b964ee7..07a0742 100644 --- a/payloads/libpayload/drivers/usb/uhci.c +++ b/payloads/libpayload/drivers/usb/uhci.c @@ -66,7 +66,7 @@ td_dump (td_t *td) { char td_value[3]; const char *td_type; - switch (td->pid) { + switch (td->token & TD_PID_MASK) { case UHCI_SETUP: td_type="SETUP"; break; @@ -77,23 +77,24 @@ td_dump (td_t *td) td_type="OUT"; break; default: - sprintf(td_value, "%x", td->pid); + sprintf(td_value, "%x", td->token & TD_PID_MASK); td_type=td_value; } debug ("%s packet (at %lx) to %x.%x failed\n", td_type, - virt_to_phys (td), td->dev_addr, td->endp); - debug ("td (counter at %x) returns: ", td->counter); - debug (" bitstuff err: %x, ", td->status_bitstuff_err); - debug (" CRC err: %x, ", td->status_crc_err); - debug (" NAK rcvd: %x, ", td->status_nakrcvd); - debug (" Babble: %x, ", td->status_babble); - debug (" Data Buffer err: %x, ", td->status_databuf_err); - debug (" Stalled: %x, ", td->status_stalled); - debug (" Active: %x\n", td->status_active); - if (td->status_babble) + virt_to_phys (td), (td->token & TD_DEVADDR_MASK) >> TD_DEVADDR_SHIFT, + (td->token & TD_EP_MASK) >> TD_EP_SHIFT); + debug ("td (counter at %x) returns: ", td->ctrlsts >> TD_COUNTER_SHIFT); + debug (" bitstuff err: %x, ", !!(td->ctrlsts & TD_STATUS_BITSTUFF_ERR)); + debug (" CRC err: %x, ", !!(td->ctrlsts & TD_STATUS_CRC_ERR)); + debug (" NAK rcvd: %x, ", !!(td->ctrlsts & TD_STATUS_NAK_RCVD)); + debug (" Babble: %x, ", !!(td->ctrlsts & TD_STATUS_BABBLE)); + debug (" Data Buffer err: %x, ", !!(td->ctrlsts & TD_STATUS_DATABUF_ERR)); + debug (" Stalled: %x, ", !!(td->ctrlsts & TD_STATUS_STALLED)); + debug (" Active: %x\n", !!(td->ctrlsts & TD_STATUS_ACTIVE)); + if (td->ctrlsts & TD_STATUS_BABBLE) debug (" Babble because of %s\n", - td->status_bitstuff_err ? "host" : "device"); - if (td->status_active) + (td->ctrlsts & TD_STATUS_BITSTUFF_ERR) ? "host" : "device"); + if (td->ctrlsts & TD_STATUS_ACTIVE) debug (" still active - timeout?\n"); } @@ -197,34 +198,24 @@ uhci_init (pcidev_t addr) ! UHCI_INST (controller)->qh_last) fatal("Not enough memory for USB controller queues.\n"); - UHCI_INST (controller)->qh_prei->headlinkptr.ptr = - virt_to_phys (UHCI_INST (controller)->qh_intr); - UHCI_INST (controller)->qh_prei->headlinkptr.queue_head = 1; - UHCI_INST (controller)->qh_prei->elementlinkptr.ptr = 0; - UHCI_INST (controller)->qh_prei->elementlinkptr.terminate = 1; - - UHCI_INST (controller)->qh_intr->headlinkptr.ptr = - virt_to_phys (UHCI_INST (controller)->qh_data); - UHCI_INST (controller)->qh_intr->headlinkptr.queue_head = 1; - UHCI_INST (controller)->qh_intr->elementlinkptr.ptr = 0; - UHCI_INST (controller)->qh_intr->elementlinkptr.terminate = 1; - - UHCI_INST (controller)->qh_data->headlinkptr.ptr = - virt_to_phys (UHCI_INST (controller)->qh_last); - UHCI_INST (controller)->qh_data->headlinkptr.queue_head = 1; - UHCI_INST (controller)->qh_data->elementlinkptr.ptr = 0; - UHCI_INST (controller)->qh_data->elementlinkptr.terminate = 1; - - UHCI_INST (controller)->qh_last->headlinkptr.ptr = virt_to_phys (UHCI_INST (controller)->qh_data); - UHCI_INST (controller)->qh_last->headlinkptr.terminate = 1; - UHCI_INST (controller)->qh_last->elementlinkptr.ptr = virt_to_phys (antiberserk); - UHCI_INST (controller)->qh_last->elementlinkptr.terminate = 1; + UHCI_INST (controller)->qh_prei->headlinkptr = + virt_to_phys (UHCI_INST (controller)->qh_intr) | FLISTP_QH; + UHCI_INST (controller)->qh_prei->elementlinkptr = 0 | FLISTP_TERMINATE; + + UHCI_INST (controller)->qh_intr->headlinkptr = + virt_to_phys (UHCI_INST (controller)->qh_data) | FLISTP_QH; + UHCI_INST (controller)->qh_intr->elementlinkptr = 0 | FLISTP_TERMINATE; + + UHCI_INST (controller)->qh_data->headlinkptr = + virt_to_phys (UHCI_INST (controller)->qh_last) | FLISTP_QH; + UHCI_INST (controller)->qh_data->elementlinkptr = 0 | FLISTP_TERMINATE; + + UHCI_INST (controller)->qh_last->headlinkptr = virt_to_phys (UHCI_INST (controller)->qh_data) | FLISTP_TERMINATE; + UHCI_INST (controller)->qh_last->elementlinkptr = virt_to_phys (antiberserk) | FLISTP_TERMINATE; for (i = 0; i < 1024; i++) { - UHCI_INST (controller)->framelistptr[i].ptr = - virt_to_phys (UHCI_INST (controller)->qh_prei); - UHCI_INST (controller)->framelistptr[i].terminate = 0; - UHCI_INST (controller)->framelistptr[i].queue_head = 1; + UHCI_INST (controller)->framelistptr[i] = + virt_to_phys (UHCI_INST (controller)->qh_prei) | FLISTP_QH; } controller->devices[0]->controller = controller; controller->devices[0]->init = uhci_rh_init; @@ -272,18 +263,18 @@ static td_t * wait_for_completed_qh (hci_t *controller, qh_t *qh) { int timeout = 1000000; /* max 30 ms. */ - void *current = GET_TD (qh->elementlinkptr.ptr); - while ((qh->elementlinkptr.terminate == 0) && (timeout-- > 0)) { - if (current != GET_TD (qh->elementlinkptr.ptr)) { - current = GET_TD (qh->elementlinkptr.ptr); + void *current = GET_TD (qh->elementlinkptr); + while (((qh->elementlinkptr & FLISTP_TERMINATE) == 0) && (timeout-- > 0)) { + if (current != GET_TD (qh->elementlinkptr)) { + current = GET_TD (qh->elementlinkptr); timeout = 1000000; } uhci_reg_write16(controller, USBSTS, uhci_reg_read16(controller, USBSTS) | 0); // clear resettable registers udelay (30); } - return (GET_TD (qh->elementlinkptr.ptr) == - 0) ? 0 : GET_TD (phys_to_virt (qh->elementlinkptr.ptr)); + return (GET_TD (qh->elementlinkptr) == + 0) ? 0 : GET_TD (phys_to_virt (qh->elementlinkptr)); } static int @@ -314,57 +305,51 @@ uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen memset (tds, 0, sizeof (td_t) * count); count--; /* to compensate for 0-indexed array */ for (i = 0; i < count; i++) { - tds[i].ptr = virt_to_phys (&tds[i + 1]); - tds[i].depth_first = 1; - tds[i].terminate = 0; + tds[i].ptr = virt_to_phys (&tds[i + 1]) | TD_DEPTH_FIRST; } - tds[count].ptr = 0; - tds[count].depth_first = 1; - tds[count].terminate = 1; - - tds[0].pid = UHCI_SETUP; - tds[0].dev_addr = dev->address; - tds[0].endp = endp; - tds[0].maxlen = maxlen (drlen); - tds[0].counter = 3; - tds[0].data_toggle = 0; - tds[0].lowspeed = dev->speed; + tds[count].ptr = 0 | TD_DEPTH_FIRST | TD_TERMINATE; + + tds[0].token = UHCI_SETUP | + dev->address << TD_DEVADDR_SHIFT | + endp << TD_EP_SHIFT | + TD_TOGGLE_DATA0 | + maxlen(drlen) << TD_MAXLEN_SHIFT; tds[0].bufptr = virt_to_phys (devreq); - tds[0].status_active = 1; + tds[0].ctrlsts = (3 << TD_COUNTER_SHIFT) | + (dev->speed?TD_LOWSPEED:0) | + TD_STATUS_ACTIVE; int toggle = 1; for (i = 1; i < count; i++) { switch (dir) { - case SETUP: tds[i].pid = UHCI_SETUP; break; - case IN: tds[i].pid = UHCI_IN; break; - case OUT: tds[i].pid = UHCI_OUT; break; + case SETUP: tds[i].token = UHCI_SETUP; break; + case IN: tds[i].token = UHCI_IN; break; + case OUT: tds[i].token = UHCI_OUT; break; } - tds[i].dev_addr = dev->address; - tds[i].endp = endp; - tds[i].maxlen = maxlen (min (mlen, dalen)); - tds[i].counter = 3; - tds[i].data_toggle = toggle; - tds[i].lowspeed = dev->speed; + tds[i].token |= dev->address << TD_DEVADDR_SHIFT | + endp << TD_EP_SHIFT | + maxlen (min (mlen, dalen)) << TD_MAXLEN_SHIFT | + toggle << TD_TOGGLE_SHIFT; tds[i].bufptr = virt_to_phys (data); - tds[i].status_active = 1; + tds[i].ctrlsts = (3 << TD_COUNTER_SHIFT) | + (dev->speed?TD_LOWSPEED:0) | + TD_STATUS_ACTIVE; toggle ^= 1; dalen -= mlen; data += mlen; } - tds[count].pid = (dir == OUT) ? UHCI_IN : UHCI_OUT; - tds[count].dev_addr = dev->address; - tds[count].endp = endp; - tds[count].maxlen = maxlen (0); - tds[count].counter = 0; /* as per linux 2.4.10 */ - tds[count].data_toggle = 1; - tds[count].lowspeed = dev->speed; + tds[count].token = (dir == OUT) ? UHCI_IN : UHCI_OUT | + dev->address << TD_DEVADDR_SHIFT | + endp << TD_EP_SHIFT | + maxlen(0) << TD_MAXLEN_SHIFT | + TD_TOGGLE_DATA1; tds[count].bufptr = 0; - tds[count].status_active = 1; - UHCI_INST (dev->controller)->qh_data->elementlinkptr.ptr = - virt_to_phys (tds); - UHCI_INST (dev->controller)->qh_data->elementlinkptr.queue_head = 0; - UHCI_INST (dev->controller)->qh_data->elementlinkptr.terminate = 0; + tds[0].ctrlsts = (0 << TD_COUNTER_SHIFT) | /* as Linux 2.4.10 does */ + (dev->speed?TD_LOWSPEED:0) | + TD_STATUS_ACTIVE; + UHCI_INST (dev->controller)->qh_data->elementlinkptr = + virt_to_phys (tds) & ~(FLISTP_QH | FLISTP_TERMINATE); td_t *td = wait_for_completed_qh (dev->controller, UHCI_INST (dev->controller)-> qh_data); @@ -389,15 +374,9 @@ create_schedule (int numpackets) memset (tds, 0, sizeof (td_t) * numpackets); int i; for (i = 0; i < numpackets; i++) { - tds[i].ptr = virt_to_phys (&tds[i + 1]); - tds[i].terminate = 0; - tds[i].queue_head = 0; - tds[i].depth_first = 1; + tds[i].ptr = virt_to_phys (&tds[i + 1]) | TD_DEPTH_FIRST; } - tds[numpackets - 1].ptr = 0; - tds[numpackets - 1].terminate = 1; - tds[numpackets - 1].queue_head = 0; - tds[numpackets - 1].depth_first = 0; + tds[numpackets - 1].ptr = 0 | TD_TERMINATE; return tds; } @@ -406,32 +385,26 @@ fill_schedule (td_t *td, endpoint_t *ep, int length, unsigned char *data, int *toggle) { switch (ep->direction) { - case IN: td->pid = UHCI_IN; break; - case OUT: td->pid = UHCI_OUT; break; - case SETUP: td->pid = UHCI_SETUP; break; + case IN: td->token = UHCI_IN; break; + case OUT: td->token = UHCI_OUT; break; + case SETUP: td->token = UHCI_SETUP; break; } - td->dev_addr = ep->dev->address; - td->endp = ep->endpoint & 0xf; - td->maxlen = maxlen (length); - if (ep->direction == SETUP) - td->counter = 3; - else - td->counter = 0; - td->data_toggle = *toggle & 1; - td->lowspeed = ep->dev->speed; + td->token |= ep->dev->address << TD_DEVADDR_SHIFT | + (ep->endpoint & 0xf) << TD_EP_SHIFT | + maxlen (length) << TD_MAXLEN_SHIFT | + (*toggle & 1) << TD_TOGGLE_SHIFT; td->bufptr = virt_to_phys (data); - - td->status_active = 1; + td->ctrlsts = ((ep->direction == SETUP?3:0) << TD_COUNTER_SHIFT) | + ep->dev->speed?TD_LOWSPEED:0 | + TD_STATUS_ACTIVE; *toggle ^= 1; } static int run_schedule (usbdev_t *dev, td_t *td) { - UHCI_INST (dev->controller)->qh_data->elementlinkptr.ptr = - virt_to_phys (td); - UHCI_INST (dev->controller)->qh_data->elementlinkptr.queue_head = 0; - UHCI_INST (dev->controller)->qh_data->elementlinkptr.terminate = 0; + UHCI_INST (dev->controller)->qh_data->elementlinkptr = + virt_to_phys (td) | ~(FLISTP_QH | FLISTP_TERMINATE); td = wait_for_completed_qh (dev->controller, UHCI_INST (dev->controller)->qh_data); if (td == 0) { @@ -493,9 +466,7 @@ uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming if (!data || !tds || !qh) fatal("Not enough memory to create USB intr queue prerequisites.\n"); - qh->elementlinkptr.ptr = virt_to_phys(tds); - qh->elementlinkptr.queue_head = 0; - qh->elementlinkptr.terminate = 0; + qh->elementlinkptr = virt_to_phys(tds); intr_q *q = malloc(sizeof(intr_q)); if (!q) @@ -512,37 +483,28 @@ uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming int i; for (i = 0; i < reqcount; i++) { tds[i].ptr = virt_to_phys (&tds[i + 1]); - tds[i].terminate = 0; - tds[i].queue_head = 0; - tds[i].depth_first = 0; switch (ep->direction) { - case IN: tds[i].pid = UHCI_IN; break; - case OUT: tds[i].pid = UHCI_OUT; break; - case SETUP: tds[i].pid = UHCI_SETUP; break; + case IN: tds[i].token = UHCI_IN; break; + case OUT: tds[i].token = UHCI_OUT; break; + case SETUP: tds[i].token = UHCI_SETUP; break; } - tds[i].dev_addr = ep->dev->address; - tds[i].endp = ep->endpoint & 0xf; - tds[i].maxlen = maxlen (reqsize); - tds[i].counter = 0; - tds[i].data_toggle = ep->toggle & 1; - tds[i].lowspeed = ep->dev->speed; + tds[i].token |= ep->dev->address << TD_DEVADDR_SHIFT | + (ep->endpoint & 0xf) << TD_EP_SHIFT | + maxlen (reqsize) << TD_MAXLEN_SHIFT | + (ep->toggle & 1) << TD_TOGGLE_SHIFT; tds[i].bufptr = virt_to_phys (data); - tds[i].status_active = 1; + tds[i].ctrlsts = (0 << TD_COUNTER_SHIFT) | + ep->dev->speed?TD_LOWSPEED:0 | + TD_STATUS_ACTIVE; ep->toggle ^= 1; data += reqsize; } - tds[reqcount - 1].ptr = 0; - tds[reqcount - 1].terminate = 1; - tds[reqcount - 1].queue_head = 0; - tds[reqcount - 1].depth_first = 0; + tds[reqcount - 1].ptr = 0 | TD_TERMINATE; for (i = reqtiming; i < 1024; i += reqtiming) { /* FIXME: wrap in another qh, one for each occurance of the qh in the framelist */ - qh->headlinkptr.ptr = UHCI_INST (ep->dev->controller)->framelistptr[i].ptr; - qh->headlinkptr.terminate = 0; - UHCI_INST (ep->dev->controller)->framelistptr[i].ptr = virt_to_phys(qh); - UHCI_INST (ep->dev->controller)->framelistptr[i].terminate = 0; - UHCI_INST (ep->dev->controller)->framelistptr[i].queue_head = 1; + qh->headlinkptr = UHCI_INST (ep->dev->controller)->framelistptr[i] & ~FLISTP_TERMINATE; + UHCI_INST (ep->dev->controller)->framelistptr[i] = virt_to_phys(qh) | FLISTP_QH; } return q; } @@ -557,15 +519,15 @@ uhci_destroy_intr_queue (endpoint_t *ep, void *q_) int i; for (i=0; i<1024; i++) { u32 oldptr = 0; - u32 ptr = UHCI_INST (ep->dev->controller)->framelistptr[i].ptr; + u32 ptr = UHCI_INST (ep->dev->controller)->framelistptr[i]; while (ptr != end) { - if (((qh_t*)phys_to_virt(ptr))->elementlinkptr.ptr == val) { - ((qh_t*)phys_to_virt(oldptr))->headlinkptr.ptr = ((qh_t*)phys_to_virt(ptr))->headlinkptr.ptr; + if (((qh_t*)phys_to_virt(ptr))->elementlinkptr == val) { + ((qh_t*)phys_to_virt(oldptr))->headlinkptr = ((qh_t*)phys_to_virt(ptr))->headlinkptr; free(phys_to_virt(ptr)); break; } oldptr = ptr; - ptr = ((qh_t*)phys_to_virt(ptr))->headlinkptr.ptr; + ptr = ((qh_t*)phys_to_virt(ptr))->headlinkptr; } } free(q->data); @@ -582,7 +544,7 @@ static u8* uhci_poll_intr_queue (void *q_) { intr_q *q = (intr_q*)q_; - if (q->tds[q->lastread].status_active == 0) { + if ((q->tds[q->lastread].ctrlsts & TD_STATUS_ACTIVE) == 0) { /* FIXME: handle errors */ int current = q->lastread; int previous; @@ -591,15 +553,13 @@ uhci_poll_intr_queue (void *q_) } else { previous = q->lastread - 1; } - q->tds[previous].status = 0; - q->tds[previous].ptr = 0; - q->tds[previous].terminate = 1; + q->tds[previous].ctrlsts &= ~TD_STATUS_MASK; + q->tds[previous].ptr = 0 | TD_TERMINATE; if (q->last_td != &q->tds[previous]) { - q->last_td->ptr = virt_to_phys(&q->tds[previous]); - q->last_td->terminate = 0; + q->last_td->ptr = virt_to_phys(&q->tds[previous]) & ~TD_TERMINATE; q->last_td = &q->tds[previous]; } - q->tds[previous].status_active = 1; + q->tds[previous].ctrlsts |= TD_STATUS_ACTIVE; q->lastread = (q->lastread + 1) % q->total; return &q->data[current*q->reqsize]; } diff --git a/payloads/libpayload/drivers/usb/uhci_private.h b/payloads/libpayload/drivers/usb/uhci_private.h index adcd91c..f650c4a 100644 --- a/payloads/libpayload/drivers/usb/uhci_private.h +++ b/payloads/libpayload/drivers/usb/uhci_private.h @@ -32,55 +32,38 @@ typedef enum { UHCI_SETUP = 0x2d, UHCI_IN = 0x69, UHCI_OUT = 0xe1 } uhci_pid_t; -typedef union { - struct { - unsigned long terminate:1; - unsigned long queue_head:1; - unsigned long:2; - unsigned long ptr_part:28; - }; - u32 ptr; -} __attribute__ ((packed)) flistp_t; +typedef u32 flistp_t; +#define FLISTP_TERMINATE 1 +#define FLISTP_QH 2 typedef struct { - union { - struct { - unsigned long terminate:1; - unsigned long queue_head:1; - unsigned long depth_first:1; - unsigned long:29; - } __attribute__ ((packed)); - u32 ptr; - } __attribute__ ((packed)); + u32 ptr; +#define TD_TERMINATE 1 +#define TD_QH 2 +#define TD_DEPTH_FIRST 4 - volatile unsigned long actlen:11; - volatile unsigned long:5; - union { - struct { - unsigned long:1; // bit 0 - unsigned long status_bitstuff_err:1; - unsigned long status_crc_err:1; - unsigned long status_nakrcvd:1; - unsigned long status_babble:1; - unsigned long status_databuf_err:1; - unsigned long status_stalled:1; - unsigned long status_active:1; // bit 7 - } __attribute__ ((packed)); - unsigned char status; - } __attribute__ ((packed)); - volatile unsigned long ioc:1; /* interrupt on complete */ - volatile unsigned long isochronous:1; - volatile unsigned long lowspeed:1; - volatile unsigned long counter:2; - volatile unsigned long shortpck:1; - volatile unsigned long:2; + u32 ctrlsts; +#define TD_STATUS_MASK (0xff << 16) +#define TD_STATUS_BITSTUFF_ERR (1 << 17) +#define TD_STATUS_CRC_ERR (1 << 18) +#define TD_STATUS_NAK_RCVD (1 << 19) +#define TD_STATUS_BABBLE (1 << 20) +#define TD_STATUS_DATABUF_ERR (1 << 21) +#define TD_STATUS_STALLED (1 << 22) +#define TD_STATUS_ACTIVE (1 << 23) +#define TD_LOWSPEED (1 << 26) +#define TD_COUNTER_SHIFT 27 - unsigned long pid:8; - unsigned long dev_addr:7; - unsigned long endp:4; - unsigned long data_toggle:1; - unsigned long:1; - unsigned long maxlen:11; + u32 token; +#define TD_PID_MASK 0xff +#define TD_DEVADDR_SHIFT 8 +#define TD_DEVADDR_MASK (((1<<7)-1) << TD_DEVADDR_SHIFT) +#define TD_EP_SHIFT 15 +#define TD_EP_MASK (0xf << TD_EP_SHIFT) +#define TD_TOGGLE_SHIFT 19 +#define TD_MAXLEN_SHIFT 21 +#define TD_TOGGLE_DATA0 0 +#define TD_TOGGLE_DATA1 (1 << TD_TOGGLE_SHIFT) u32 bufptr;

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coreboot December 2011