coreboot December 2011

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174 discussions

Patch set updated for coreboot: 79e8a62 .gitignore util/crossgcc build-* and unpacked source directories
by Peter Stuge 14 Dec '11

14 Dec '11

Peter Stuge (peter(a)stuge.se) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/484 -gerrit commit 79e8a6273de62857770852ab6a2ec8297f55b15c Author: Peter Stuge <peter(a)stuge.se> Date: Wed Dec 14 07:32:15 2011 +0100 .gitignore util/crossgcc build-* and unpacked source directories Change-Id: I85b9dffbbe0c7f1ae8cc2b584196775ba2f816df Signed-off-by: Peter Stuge <peter(a)stuge.se> --- .gitignore | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore index 6ea623e..0375ad5 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,19 @@ payloads/external/FILO/filo/ payloads/external/SeaBIOS/seabios/ util/crossgcc/tarballs/ util/crossgcc/xgcc/ +util/crossgcc/acpica-unix-*/ +util/crossgcc/binutils-*/ +util/crossgcc/build-binutils/ +util/crossgcc/build-gcc/ +util/crossgcc/build-gmp/ +util/crossgcc/build-libelf/ +util/crossgcc/build-mpc/ +util/crossgcc/build-mpfr/ +util/crossgcc/gcc-*/ +util/crossgcc/gmp-*/ +util/crossgcc/libelf-*/ +util/crossgcc/mpc-*/ +util/crossgcc/mpfr-*/ *.o *.elf *.debug

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New patch to review for coreboot: cf5e777 .gitignore crossgcc ectool inteltool msrtool nvramtool and superiotool
by Peter Stuge 14 Dec '11

14 Dec '11

Peter Stuge (peter(a)stuge.se) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/484 -gerrit commit cf5e777f569fb6fe66ade00a322e877a4ef81b30 Author: Peter Stuge <peter(a)stuge.se> Date: Wed Dec 14 07:32:15 2011 +0100 .gitignore crossgcc ectool inteltool msrtool nvramtool and superiotool Change-Id: I85b9dffbbe0c7f1ae8cc2b584196775ba2f816df Signed-off-by: Peter Stuge <peter(a)stuge.se> --- .gitignore | 22 ++++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) diff --git a/.gitignore b/.gitignore index 6ea623e..98d0b81 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,19 @@ payloads/external/FILO/filo/ payloads/external/SeaBIOS/seabios/ util/crossgcc/tarballs/ util/crossgcc/xgcc/ +util/crossgcc/acpica-unix-*/ +util/crossgcc/binutils-*/ +util/crossgcc/build-binutils/ +util/crossgcc/build-gcc/ +util/crossgcc/build-gmp/ +util/crossgcc/build-libelf/ +util/crossgcc/build-mpc/ +util/crossgcc/build-mpfr/ +util/crossgcc/gcc-*/ +util/crossgcc/gmp-*/ +util/crossgcc/libelf-*/ +util/crossgcc/mpc-*/ +util/crossgcc/mpfr-*/ *.o *.elf *.debug @@ -14,3 +27,12 @@ util/crossgcc/xgcc/ *.\# *.swp *.bin +util/ectool/ectool +util/inteltool/.dependencies +util/inteltool/inteltool +util/msrtool/Makefile +util/msrtool/Makefile.deps +util/msrtool/msrtool +util/nvramtool/.dependencies +util/nvramtool/nvramtool +util/superiotool/superiotool

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via pc2500e form factor and ROM protocol
by Nathan OWENS 14 Dec '11

14 Dec '11

Howdy All, I've been playing with a Via PC2500e mainboard. It is listed as a mini-ITX board on the supported boards page, but it is in fact a micro ATX board (190mm x 228mm) I'd also like to add the that it uses LPC as the ROM chip protocol. It is currently listed as unknown. No worky worky (technical term) with the SPI chips. Keep up the good work. This is an excellent project. Nathan Owens

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Patch merged into coreboot/master: 6f65e88 Fix console output in real mode int10 implementation.
by gerrit＠coreboot.org 13 Dec '11

13 Dec '11

the following patch was just integrated into master: commit 6f65e8878ed0391c826404035e1d999ee09991d4 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Dec 13 23:08:03 2011 +0100 Fix console output in real mode int10 implementation. Checking RBIL, int10 AH=0x10 does never output a character. The two output functions are AH=0x09 and AH=0x0e. Change-Id: Id7f4d260b63024748ef771f949e8b60f934bacbc Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Build-Tested: build bot (Jenkins) at Tue Dec 13 23:36:01 2011, giving +1 Reviewed-By: Rudolf Marek <r.marek(a)assembler.cz> at Tue Dec 13 23:46:24 2011, giving +2 See http://review.coreboot.org/483 for details. -gerrit

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Patch merged into coreboot/master: 38d51a3 libpayload: add set_option() function
by gerrit＠coreboot.org 13 Dec '11

13 Dec '11

the following patch was just integrated into master: commit 38d51a3033e667fbde619793de3f8dc127669da6 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Nov 22 13:07:45 2011 +0100 libpayload: add set_option() function It allows to change CMOS values from payloads Change-Id: I4872fc27476923adafe13504126235b92b30de85 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/445 for details. -gerrit

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Patch merged into coreboot/master: 47c17ed Fix CMOS handling for non-USE_OPTION_TABLE configuration
by gerrit＠coreboot.org 13 Dec '11

13 Dec '11

the following patch was just integrated into master: commit 47c17ed4903029017a2e2cce390e549e3dce7f19 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Nov 22 10:27:24 2011 +0100 Fix CMOS handling for non-USE_OPTION_TABLE configuration The read_option macro still emitted CMOS_VSTART_*/CMOS_VEND_* symbols, which fail without an option table (as no option_table.h defines them). Discard them by using a macro instead of a static inline function. Change-Id: I8d001f971681277a344b6788725746491546b607 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/442 for details. -gerrit

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New patch to review for coreboot: 6f65e88 Fix console output in real mode int10 implementation.
by Stefan Reinauer 13 Dec '11

13 Dec '11

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/483 -gerrit commit 6f65e8878ed0391c826404035e1d999ee09991d4 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Dec 13 23:08:03 2011 +0100 Fix console output in real mode int10 implementation. Checking RBIL, int10 AH=0x10 does never output a character. The two output functions are AH=0x09 and AH=0x0e. Change-Id: Id7f4d260b63024748ef771f949e8b60f934bacbc Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/devices/oprom/x86_interrupts.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/devices/oprom/x86_interrupts.c b/src/devices/oprom/x86_interrupts.c index 86d20d7..bada546 100644 --- a/src/devices/oprom/x86_interrupts.c +++ b/src/devices/oprom/x86_interrupts.c @@ -70,7 +70,7 @@ int int10_handler(struct eregs *regs) res = 0; break; case 0x09: // Write Character and attribute - case 0x10: // Write Character + case 0x0e: // Write Character printk(BIOS_INFO, "%c", regs->eax & 0xff); res = 0; break;

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Belkin Direct Connect USB 2.0
by nap 13 Dec '11

13 Dec '11

on the following two ASUS motherboard: P5QPL-AM (uATX, socket 755, G31) PZKPL-CM (uATX, socket 755, G41) To have a debug access, as the two MB have a serial port, this way is available (not yet tested), but I wonder about the usability of the following Belkin product "Direct Connect USB 2.0" ( marketed as a laptop accessory) as a EHCI debug port device like the NET20DC, as new boxes mostly don't have a serial port, even an Ethernet port for some (wireless only), but at least a USB 2.0 port. I have not found any technical info on the web, including the Belkin website. Anybody has some info about it, even a way to test it ? caracol

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Patch merged into coreboot/master: 5763ba7 Use MMCONF for all AMD family 10 CPUs.
by gerrit＠coreboot.org 13 Dec '11

13 Dec '11

the following patch was just integrated into master: commit 5763ba7b96d997412c6e014714edacf852910f57 Author: Marc Jones <marcj303(a)gmail.com> Date: Wed Nov 23 17:49:19 2011 -0700 Use MMCONF for all AMD family 10 CPUs. This fixes problems in AP init when multiple APs are trying to access PCI config space. All Fam10 CPUs setup and support MMCONF. Change-Id: I00a25bbf4e4152c89024f14a3c4c1c36b48d0128 Signed-off-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Thu Dec 8 23:15:22 2011, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Fri Dec 9 21:46:13 2011, giving +2 See http://review.coreboot.org/455 for details. -gerrit

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Trac reminder: list of new ticket(s)
by coreboot tracker 12 Dec '11

12 Dec '11

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coreboot December 2011