coreboot December 2011

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174 discussions

Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by She, Kerry 19 Dec '11

19 Dec '11

Hello, Ron > -----Original Message----- > From: coreboot-bounces+kerry.she=amd.com(a)coreboot.org [mailto:coreboot- > bounces+kerry.she=amd.com(a)coreboot.org] On Behalf Of ron minnich > Sent: Monday, December 19, 2011 1:07 PM > To: Kerry Sheh > Cc: coreboot(a)coreboot.org > Subject: Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix > multipleVGA cards resource conflict on Windows > > > + /* It isn't safe to enable multiple VGA cards. > > + * Windows will report resource conflict when more than > one > > + * VGA-compatible legacy graphic card in the system. > > + */ > > +#if CONFIG_VGA_BRIDGE_SETUP == 1 > > + extern device_t vga_pri; > > + if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) && > > + (dev != vga_pri)) { > > + if (((vga_pri->class >> 8) == > PCI_CLASS_DISPLAY_VGA) && > > + ((dev->class >> 8) == > PCI_CLASS_DISPLAY_VGA)) { > > + dev->command &= ~(PCI_COMMAND_IO | > PCI_COMMAND_MEMORY); > > + } > > + } > > +#endif > > What do Linux or *BSD do in the same situation? Do they handle it cleanly? Linux VGA Arbiter module(vgaarb) will handle this explicitly. So dual vga card would works together, even coreboot not disable IO& MEM decoding on the second vga card. thanks > thanks > > ron > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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Trac reminder: list of new ticket(s)
by coreboot tracker 19 Dec '11

19 Dec '11

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Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by She, Kerry 19 Dec '11

19 Dec '11

Hello, Anthony From: She, Kerry Sent: Monday, December 19, 2011 6:51 PM To: 'Anthony Crenshaw'; 'Gregg Levine' Cc: 'coreboot' Subject: Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows Hello, Anthony From: coreboot-bounces(a)coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Anthony Crenshaw Sent: Monday, December 19, 2011 6:04 PM To: Gregg Levine Cc: coreboot Subject: Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows Have you tried svga_HDMI.exe I don't think so. I don't know what's "vga_HDMI.exe" is, can you drop me some more information? Thanks I have to mention that I only verified 2 amd graphic devices. Hardware: 2 AMD graphic devices(one is an internal graphic device in the APU chip, other one is external PCIE graphic card ). OS: Debian 5(Lenny) and Windows 7. 2 graphic device works at the same time with no resource conflict, Crossfire works as well with the ATI proprietary graphic driver installed. Thanks Kerry

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Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by She, Kerry 19 Dec '11

19 Dec '11

Hello, Anthony From: coreboot-bounces(a)coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Anthony Crenshaw Sent: Monday, December 19, 2011 6:04 PM To: Gregg Levine Cc: coreboot Subject: Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows Have you tried svga_HDMI.exe I don't think so. I don't know what's "vga_HDMI.exe" is, can you drop me some more information? thanks

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Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by Anthony Crenshaw 19 Dec '11

19 Dec '11

Have you tried svga_HDMI.exe

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Re: [coreboot] Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by Gregg Levine 19 Dec '11

19 Dec '11

On Mon, Dec 19, 2011 at 2:20 AM, Anthony Crenshaw <quest1914(a)gmail.com> wrote: > Hi > > I'd like to ask you how long have you been making patch's Hello! An interesting question. Ron practically started the original project. (Which is where I come in.) and Kerry started contributing to it, fairly recently. Say about one to two years now? What, say? This series is fairly interesting, given the fact that the regular BIOS that the majority of systems come with, have no clear idea as to how to work with more then one video card. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again."

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Patch set updated for coreboot: 6709bdd Fix multipleVGA cards resource conflict on Windows
by Kerry Sheh 19 Dec '11

19 Dec '11

Kerry Sheh (shekairui(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/489 -gerrit commit 6709bdd2da765178084de3e72ec7d8ce36f2ec37 Author: Kerry Sheh <shekairui(a)gmail.com> Date: Mon Dec 19 13:13:34 2011 +0800 Fix multipleVGA cards resource conflict on Windows If multiple VGA-compatible legacy graphic cards decode the IO range 3B0-3DF and MEM range A00000-BFFFF, Windows 7 complain a resource conflict, so only one VGA card can works at the same time. By disable the IO & MEM decode of the second vga graphic device, this patch resolved the resource conflict in windows7, multiple vga-compatible graphic cards can work together in windows7. There is a discuss in coreboot mail list before, please reference thread: "how to prevent legacy resource conflictwith multipleVGA cards" Linux using VGA Arbiter module(vgaarb) to resolve this resource conflict, Please see the following linux dmesg log, more information can be found in Linux source dir Documentation/vgaarbiter.txt. But it seems that windows don't dealwith this conflict. ~# dmesg | grep -i vgaarb [ 0.774076] vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem [ 0.776065] vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=none,l [ 0.780051] vgaarb: loaded [ 0.784049] vgaarb: bridge control possible 0000:01:00.0 [ 0.788050] vgaarb: bridge control possible 0000:00:01.0 For the second legacy graphic device, coreboot already disabled the IO and MEM decode in function set_vga_bridge_bits(). But it will be enabled again in function pci_set_resource(), if the second legacy vga-compatible graphic device take any IO/MEM resources. Following log printed by enable_resources() shows the problem: ...snip... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 subsystem <- 1022/1410 PCI: 00:01.0 cmd <- 07 <== The first graphic device PCI: 00:01.1 subsystem <- 1022/1410 PCI: 00:01.1 cmd <- 02 PCI: 00:02.0 bridge ctrl <- 0003 PCI: 00:02.0 cmd <- 07 ...snip... PCI: 01:00.0 cmd <- 03 <== The second graphic device PCI: 01:00.1 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 03:00.0 cmd <- 03 done. ...snip... Signed-off-by: Kerry Sheh <shekairui(a)gmail.com> Signed-off-by: Kerry Sheh <kerry.she(a)amd.com> Change-Id: I0de5e3761b51e2723d9c1dc0c39fff692e3a779d --- src/devices/pci_device.c | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c index 2ccb38a..0ba7fd2 100644 --- a/src/devices/pci_device.c +++ b/src/devices/pci_device.c @@ -494,6 +494,21 @@ static void pci_set_resource(struct device *dev, struct resource *resource) dev->command |= PCI_COMMAND_IO; if (resource->flags & IORESOURCE_PCI_BRIDGE) dev->command |= PCI_COMMAND_MASTER; + + /* It isn't safe to enable multiple VGA cards. + * Windows will report resource conflict when more than one + * VGA-compatible legacy graphic card in the system. + */ +#if CONFIG_VGA_BRIDGE_SETUP == 1 + extern device_t vga_pri; + if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) && + (dev != vga_pri)) { + if (((vga_pri->class >> 8) == PCI_CLASS_DISPLAY_VGA) && + ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) { + dev->command &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY); + } + } +#endif } /* Get the base address. */

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Dell Dimension 4700 Supported?
by James Wall 18 Dec '11

18 Dec '11

I have a Dell Dimension 4700 that I would like to put coreboot on to help improve performance and unmask CPU flags that the bios is masking. attached is the output of dmidecode, lspci -tvnn, superiotool -dV, and flashrom -V. I appreciate any suggestions to help get this project going. James Wall

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#183: SeaBIOS: test-gcc.sh executed multiple times, also during make clean
by coreboot 18 Dec '11

18 Dec '11

#183: SeaBIOS: test-gcc.sh executed multiple times, also during make clean --------------------------------------------+------------------------------ Reporter: Christian Ruppert <idl0r@…> | Owner: stepan@… Type: enhancement | Status: new Priority: minor | Milestone: Component: coreboot | Keywords: Dependencies: | Patch Status: there is no | patch --------------------------------------------+------------------------------ The test-gcc.sh script will be executed multiple times during "make" and at least once during "make clean". In "clean" there seems to be no $CC/$LD defined thus it leads to an error. So executing test-gcc.sh only once and only before compiling would fix both. -- Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/183> coreboot <http://www.coreboot.org/>

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New patch to review for coreboot: 3220062 Add Intel Socket LGA771
by Sven Schnelle 18 Dec '11

18 Dec '11

Sven Schnelle (svens(a)stackframe.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/492 -gerrit commit 3220062a8c6312889c98688c6cee0ced13e31dbf Author: Sven Schnelle <svens(a)stackframe.org> Date: Fri Dec 2 16:21:35 2011 +0100 Add Intel Socket LGA771 Change-Id: Iee7d3ff2884d8c43ff1af498160589e551bc9cc8 Signed-off-by: Sven Schnelle <svens(a)stackframe.org> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/Makefile.inc | 1 + src/cpu/intel/socket_LGA771/Kconfig | 7 +++++++ src/cpu/intel/socket_LGA771/Makefile.inc | 11 +++++++++++ src/cpu/intel/socket_LGA771/chip.h | 4 ++++ src/cpu/intel/socket_LGA771/socket_LGA771.c | 7 +++++++ 6 files changed, 31 insertions(+), 0 deletions(-) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 8cf30c9..31c701c 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -28,3 +28,4 @@ source src/cpu/intel/socket_mPGA603/Kconfig source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig +source src/cpu/intel/socket_LGA771/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 93ab7de..274c101 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -16,6 +16,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2 subdirs-$(CONFIG_CPU_INTEL_SLOT_1) += slot_1 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA771) += socket_LGA771 #socket_mPGA604_533Mhz #socket_mPGA604_800Mhz diff --git a/src/cpu/intel/socket_LGA771/Kconfig b/src/cpu/intel/socket_LGA771/Kconfig new file mode 100644 index 0000000..0821c3e --- /dev/null +++ b/src/cpu/intel/socket_LGA771/Kconfig @@ -0,0 +1,7 @@ +config CPU_INTEL_SOCKET_LGA771 + bool + select CPU_INTEL_MODEL_6FX + select CPU_INTEL_CORE2 + select SSE2 + select MMX + select AP_IN_SIPI_WAIT diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc new file mode 100644 index 0000000..319430f --- /dev/null +++ b/src/cpu/intel/socket_LGA771/Makefile.inc @@ -0,0 +1,11 @@ +ramstage-y += socket_LGA771.c +subdirs-y += ../model_6ex +subdirs-y += ../model_6fx +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../hyperthreading + diff --git a/src/cpu/intel/socket_LGA771/chip.h b/src/cpu/intel/socket_LGA771/chip.h new file mode 100644 index 0000000..d3f312e --- /dev/null +++ b/src/cpu/intel/socket_LGA771/chip.h @@ -0,0 +1,4 @@ +extern struct chip_operations cpu_intel_socket_LGA771_ops; + +struct cpu_intel_socket_LGA771_config { +}; diff --git a/src/cpu/intel/socket_LGA771/socket_LGA771.c b/src/cpu/intel/socket_LGA771/socket_LGA771.c new file mode 100644 index 0000000..21a7dc9 --- /dev/null +++ b/src/cpu/intel/socket_LGA771/socket_LGA771.c @@ -0,0 +1,7 @@ +#include <device/device.h> +#include "chip.h" + + +struct chip_operations cpu_intel_socket_LGA771_ops = { + CHIP_NAME("Socket LGA771 CPU") +};

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coreboot December 2011