coreboot January 2011

coreboot@coreboot.org

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299 discussions

Unused files
by Stefan Reinauer 14 Feb '11

14 Feb '11

These include files are unused, they are never included src/cpu/amd/model_10xxx/mc_patch_01000020.h src/cpu/amd/model_10xxx/mc_patch_01000083.h src/cpu/amd/model_10xxx/mc_patch_01000084.h src/cpu/intel/model_f1x/multiplier.h src/cpu/intel/model_f0x/multiplier.h src/southbridge/amd/cs5536/smbus2.h I vote for dropping them. Stefan

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#173: Build faiulre with gcc 4.4.3 because of src/pc80/mc146818rtc_early.c unused variable
by coreboot 12 Feb '11

12 Feb '11

#173: Build faiulre with gcc 4.4.3 because of src/pc80/mc146818rtc_early.c unused variable --------------------------+-------------------------------------- Reporter: anonymous | Owner: stepan@… Type: defect | Status: new Priority: major | Milestone: Component: coreboot | Keywords: Dependencies: | Patch Status: there is no patch --------------------------+-------------------------------------- Hello, I'm trying to build coreboot with SeaBIOS payload for a qemu x86 platform, just to give it a try. I've selected the "Use CMOS for configuration values" option in the General setup menu just as a try (I don't know if that option is supported by qemu, nor if that's related with my problem anyway, this is my very first attempt playing around with coreboot) and my build process stopped with the following error: [[BR]] {{{ cc1: warnings being treated as errors[[BR]] src/pc80/mc146818rtc_early.c: In function 'do_normal_boot': src/pc80/mc146818rtc_early.c:64: error: unused variable 'i' make: *** [build/pc80/mc146818rtc_early.romstage.o] Error 1 }}} [[BR]] As stated in this ticket summary, I'm using gcc 4.4.3; I'm also building the stable version of coreboot, retrieved with the command: [[BR]] {{{ svn co svn://coreboot.org/coreboot/trunk coreboot }}} [[BR]] A closer look to the source file showed me that variable 'i' is only used within a conditionally compiled block, so I've solved the problem by simply wrapping that variable declaration in a similar '#if' block as follows: [[BR]] {{{ static inline int do_normal_boot(void) { unsigned char byte; #if CONFIG_USE_CMOS_RECOVERY int i; #endif }}} [[BR]] (i could just be moved entirely within the conditional block, according to coding style preferences) [[BR]] Though, I don't know if the above really solves the problem (in case, for instance, 'CONFIG_USE_CMOS_RECOVERY' should be defined in my configuration or in general), so that might require some further investigation by developers actively working on that piece of code (and aware of all internals). I'm not sure what kind of priority should be given to this ticket, thus I'm leaving the default (major) for you to set it more appropriately, hoping you won't be disappointed about this. Regards. -- Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/173> coreboot <http://www.coreboot.org/>

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[PATCH] Fix superio enable calls
by Rudolf Marek 12 Feb '11

12 Feb '11

Hello, While hunting yet another bug, I noticed that part of my serial log is missing. Especially I missed the Allocating & Setting resources. It turns out that the code which enables specific LDN is somewhat buggy: static void w83627dhg_pnp_enable(device_t dev) { - if (!dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); pnp_exit_ext_func_mode(dev); } So instead of enable the device the device gets disabled. However after some time the serial line gets back, most likely some "enable resources" might fix it. I'm attaching patch which somewhat fixes the problem and changes the function to look same in all superio code. Some boards even did not convert the dev->enabled to 0,1 values. Also makes me wonder some sio call pnp_enable directly, which has yet another semantics, it wont enable already enabled devices just disable those which declared not enabled. And no PnP enter conf magic is called (maybe this is the reason). Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Not abuild tested, works on dhg. I need to know if this fix is OK this way. Thanks, Rudolf

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Reliably build any Kconfig-based SeaBIOS revision
by Peter Stuge 07 Feb '11

07 Feb '11

See patch. The new TAG-stable points to the very latest commit in seabios.git, which may not be quite right, but both stable and master must be using Kconfig. //Peter

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Moved 'pci_set_subsystem' to a weak function: Support for Siemens Mainboard
by Joseph Kellermann 02 Feb '11

02 Feb '11

I've compiled support for the Siemens 'sitemp' Mainboard. The board is similar to the AMD dbm690t. I adapt the code from dbm690t according to customer requirement specification. Linux is booting with seabios/filo. Windows XP is booting with seabios. This board comes with two hardware variants so I have to set up subvendor/device ids accordingly. Also I've found an issue: The default 'pci_set_subsystem' sets the subvendor/device id register# 0x2c. However, for a few devices in the RS690 the register is 0x4c respectively 0x50. Moved 'pci_set_subsystem' to a weak function in 'pci_device.c'. So boards can add an override for the default function in mainboard/../override_df.c (or mainboard.c) and set it up too. Hoping to receive a 'ack'. Thanks Signed-off-by: Josef Kellermann joseph.kellermann(a)heitec.de ********************************************************************************************** IMPORTANT NOTICE / WICHTIGER HINWEIS This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the intended recipient(s). If you are not the intended recipient(s) please note that any distribution, copying or use of this communication or the information in it is strictly prohibited. If you have received this communication in error please notify us immediately by email or by telephone and then delete this email and any copies of it. Diese E-Mail koennte vertrauliche und/oder rechtlich geschuetzte Informationen enthalten. Wenn Sie nicht der richtige Adressat sind oder diese E-Mail irrtuemlich erhalten haben, informieren Sie bitte sofort den Absender und vernichten Sie diese Mail. Das unerlaubte Kopieren sowie die unbefugte Weitergabe dieser Mail sind nicht gestattet. HEITEC AG, Werner-von-Siemens-Str. 61, 91052 Erlangen, HRB 7754, RG Fuerth, Vorstandsvorsitzender: Richard Heindl, Vorstand: Harald Preiml, Finanzvorstand: Rene-Oliver Rosner, Aufsichtsratsvorsitzender: Dr. Lorenz M. Raith, WWW: http://www.heitec.de **********************************************************************************************

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848P-A7 supported?
by James Wall 01 Feb '11

01 Feb '11

Hello all, I have a ECS 848P-A7 that I was wondering if it could be supported since all the chipset chips were already listed as being supported. The motherboard specification page address is http://www.ecsusa.com/ECSWebSite/Product/Product_Detail.aspx?CategoryID=1&D… and I have attached the lspci dump as well as the superiotool and flashrom dump. I noticed that the bios chip was listed as untested on the write and erase options which I tested and appear to work because I was able to erase and reimage the bios onto the chip. Thanks in advance, James Wall

2 1

build service results for r6322
by repository service 31 Jan '11

31 Jan '11

Dear coreboot readers! This is the automatic build system of coreboot. The developer "mjones" checked in revision 6322 to the coreboot repository. This caused the following changes: Change Log: Add PCI ID's for VIA K8T800 and K8M800 northbridges. Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Acked-by: Marc Jones <marcj303(a)gmail.com> Build Log: Compilation of a-trend:atc-6220 has been fixed If something broke during this checkin please be a pain in mjones's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r6321
by repository service 31 Jan '11

31 Jan '11

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 6321 to the coreboot repository. This caused the following changes: Change Log: Build failure because of src/pc80/mc146818rtc_early.c unused variable Fixes #173 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Acked-by: Stefan Reinauer <reinauer(a)google.com> Build Log: Compilation of a-trend:atc-6220 has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=6321&device=atc-6220&vendo… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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A couple of lost [PATCH]es
by Alex G. 31 Jan '11

31 Jan '11

Hi, There were a couple of patches flying around the last days, (which, I have to admit, are of specific interest to me), which seem to have died-off. I've never seen such an (IPDS) Instant Patch Death Syndrome in other projects I contributed to, so perhaps my email was not being delivered. See patches for message/sign-off. Alex

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[commit] r6323 - trunk/src/devices
by repository service 31 Jan '11

31 Jan '11

Author: mjones Date: Mon Jan 31 22:16:48 2011 New Revision: 6323 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6323 Log: Fix an infinite loop in pnp_get_ioresource(), which freezes coreboot if a rare condition arises. Based on findings by Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Acked-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Modified: trunk/src/devices/pnp_device.c Modified: trunk/src/devices/pnp_device.c ============================================================================== --- trunk/src/devices/pnp_device.c Mon Jan 31 22:14:02 2011 (r6322) +++ trunk/src/devices/pnp_device.c Mon Jan 31 22:16:48 2011 (r6323) @@ -170,6 +170,12 @@ struct resource *resource; unsigned moving, gran, step; + if (!info->mask) { + printk(BIOS_ERR, "ERROR: device %s index %d has no mask.\n", + dev_path(dev), index); + return; + } + resource = new_resource(dev, index); /* Initilize the resource. */

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coreboot January 2011