coreboot June 2010

coreboot@coreboot.org

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222 discussions

request for comments: Gigabyte GA-945PL-S3 (rev. 1.0)
by John Wyzer 18 Jun '10

18 Jun '10

I'm really interested in using coreboot and tried to follow http://www.coreboot.org/FAQ to find out about the chances for my motherboard. Note: I disabled line wrapping for better readability of command line tools output. No annoying intended. * Step 1: A very brief description of your system: board vendor, board name, CPU, northbridge, southbridge, and optionally other important details. Board: Gigabyte GA-945PL-S3 (rev. 1.0) CPU: Intel Core Duo # Northbridge: Intel® 945PL Express Chipset # Southbridge: Intel® ICH7 # Realtek 8111B Gigabit Ethernet controller further Bios details: BIOS 1. 4 Mbit flash ROM 2. Use of licensed AWARD BIOS 3. Supports Virtual Dual BIOS 4. PnP 1.0a, DMI 2.0, SM BIOS 2.3, ACPI 1.0b. Other Features 1. Supports @BIOS 2. Supports Download Center 3. Supports Q-Flash 4. Supports EasyTune 5 5. Supports Xpress Install 6. Supports Xpress Recovery2 7. Supports Virtual DualBIOS * Step 2: Linux "lspci -tvnn" output for your system, generated by booting Linux via the original BIOS and runnning lspci. -[0000:00]-+-00.0 Intel Corporation 82945G/GZ/P/PL Memory Controller Hub [8086:2770] +-1b.0 Intel Corporation 82801G (ICH7 Family) High Definition Audio Controller [8086:27d8] +-1c.0-[01]--+-00.0 JMicron Technology Corp. JMB362/JMB363 Serial ATA Controller [197b:2363] | \-00.1 JMicron Technology Corp. JMB362/JMB363 Serial ATA Controller [197b:2363] +-1c.3-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] +-1d.0 Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #1 [8086:27c8] +-1d.1 Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #2 [8086:27c9] +-1d.2 Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #3 [8086:27ca] +-1d.3 Intel Corporation 82801G (ICH7 Family) USB UHCI Controller #4 [8086:27cb] +-1d.7 Intel Corporation 82801G (ICH7 Family) USB2 EHCI Controller [8086:27cc] +-1e.0-[03]--+-00.0 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] | +-00.1 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] | +-00.2 VIA Technologies, Inc. USB 2.0 [1106:3104] | +-00.3 VIA Technologies, Inc. VT6306/7/8 [Fire II(M)] IEEE 1394 OHCI Controller [1106:3044] | \-02.0 ATI Technologies Inc 3D Rage Pro 215GP [1002:4750] +-1f.0 Intel Corporation 82801GB/GR (ICH7 Family) LPC Interface Bridge [8086:27b8] +-1f.1 Intel Corporation 82801G (ICH7 Family) IDE Controller [8086:27df] +-1f.2 Intel Corporation 82801GB/GR/GH (ICH7 Family) SATA IDE Controller [8086:27c0] \-1f.3 Intel Corporation 82801G (ICH7 Family) SMBus Controller [8086:27da] * Step 3: Super I/O chip on the mainboard (report the model numbers on the actual chip, for example "Winbond W83627HF" and/or run "superiotool -dV"). superiotool said: Found ITE IT8718F (id=0x8718, rev=0x1) at 0x2e * Step 4: Type of BIOS device (see the question "How do I identify the BIOS chip on my mainboard?" below). Please send us the output of "flashrom -V" flashrom -V said in between: [...] Found ITE Super I/O, id 8718 Found chipset "Intel ICH7/ICH7R", enabling flash write... [...] Found chip "SST SST25VF040.REMS" (512 KB, SPI) at physical address 0xfff80000. [...] * Step 5: URL to the mainboard specifications page (optional). All non-generated information comes from from http://www.gigabyte.us/Support/Motherboard/BIOS_Model.aspx?ProductID=2325 * Step 6: Any other relevant information you can provide. I'm extremely comfortable with C and linux in general and willing to invest time into making this work if possible. Please let me know if there's a chance to get coreboot running and/or if there is anything I can do to help. Please CC me - I'm subscribed but disabled reception until it makes sense to get further involved. Best regards! John

2 3

Strange ROMCC failure with Rev 5623
by Myles Watson 17 Jun '10

17 Jun '10

When compiling asus/p2b (and several others), Rev 5622 succeeds, but 5623 fails. make: *** [build/mainboard/asus/p2b/romstage.inc] Segmentation fault make: *** Deleting file `build/mainboard/asus/p2b/romstage.inc' The only difference for these boards is this line in config.h: #define CONFIG_VENDOR_ECS 0 Removing this line lets 5623 build correctly. Is there some limit on the length of this file? The number of #defines? I'm using the reference compiler to compile romcc. Thanks, Myles

6 10

Has anyone tested Windows Server 2008 with Hyper-V on coreboot(SeaBIOS)
by Jiang Wang 17 Jun '10

17 Jun '10

Hi: I want to install Win 2008 server with Hyper-V (64bit OS and requires VT or AMD-V) on a coreboot based mainboard. I found following link : http://www.coreboot.org/SeaBIOS#Windows It only mentioned client version of WINDOWS (xp, vista, 7). Has anyone tested the server versions and Hyper-V? Thanks. Regards, Jiang

1 0

[commit] r5633 - in trunk/src: devices drivers/i2c/adt7463 include/device mainboard/emulation/qemu-x86 mainboard/tyan/s2881 northbridge/amd/amdfam10 northbridge/amd/amdk8 northbridge/amd/gx1 northb...
by repository service 17 Jun '10

17 Jun '10

Author: myles Date: Thu Jun 17 18:16:56 2010 New Revision: 5633 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5633 Log: Always enable parent resources before child resources. Always initialize parents before children. Move s2881 code into a driver. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Added: trunk/src/drivers/i2c/adt7463/ trunk/src/drivers/i2c/adt7463/adt7463.c (contents, props changed) - copied, changed from r5632, trunk/src/mainboard/tyan/s2881/mainboard.c trunk/src/drivers/i2c/adt7463/chip.h (contents, props changed) - copied, changed from r5632, trunk/src/drivers/i2c/adm1027/chip.h Modified: trunk/src/devices/cardbus_device.c trunk/src/devices/device.c trunk/src/devices/pci_device.c trunk/src/devices/root_device.c trunk/src/include/device/device.h trunk/src/mainboard/emulation/qemu-x86/northbridge.c trunk/src/mainboard/tyan/s2881/mainboard.c trunk/src/northbridge/amd/amdfam10/northbridge.c trunk/src/northbridge/amd/amdk8/northbridge.c trunk/src/northbridge/amd/gx1/northbridge.c trunk/src/northbridge/amd/gx2/northbridge.c trunk/src/northbridge/amd/lx/northbridge.c trunk/src/northbridge/intel/e7501/northbridge.c trunk/src/northbridge/intel/e7520/northbridge.c trunk/src/northbridge/intel/e7525/northbridge.c trunk/src/northbridge/intel/i3100/northbridge.c trunk/src/northbridge/intel/i3100/pciexp_porta_ep80579.c trunk/src/northbridge/intel/i440bx/northbridge.c trunk/src/northbridge/intel/i440lx/northbridge.c trunk/src/northbridge/intel/i82810/northbridge.c trunk/src/northbridge/intel/i82830/northbridge.c trunk/src/northbridge/intel/i855/northbridge.c trunk/src/northbridge/intel/i945/northbridge.c trunk/src/northbridge/via/cn400/northbridge.c trunk/src/northbridge/via/cn700/northbridge.c trunk/src/northbridge/via/cx700/cx700_lpc.c trunk/src/northbridge/via/cx700/northbridge.c trunk/src/northbridge/via/vt8601/northbridge.c trunk/src/northbridge/via/vt8623/northbridge.c trunk/src/northbridge/via/vx800/northbridge.c trunk/src/northbridge/via/vx800/vx800_lpc.c trunk/src/southbridge/amd/amd8111/amd8111_lpc.c trunk/src/southbridge/amd/cs5530/cs5530_isa.c trunk/src/southbridge/amd/cs5535/cs5535.c trunk/src/southbridge/amd/cs5536/cs5536.c trunk/src/southbridge/amd/sb600/sb600_lpc.c trunk/src/southbridge/amd/sb700/sb700_lpc.c trunk/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c trunk/src/southbridge/intel/esb6300/esb6300_lpc.c trunk/src/southbridge/intel/i3100/i3100_lpc.c trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c trunk/src/southbridge/intel/i82801dx/i82801dx_lpc.c trunk/src/southbridge/intel/i82801ex/i82801ex_lpc.c trunk/src/southbridge/intel/i82801gx/i82801gx_lpc.c trunk/src/southbridge/intel/i82801gx/i82801gx_pci.c trunk/src/southbridge/nvidia/ck804/ck804_lpc.c trunk/src/southbridge/nvidia/mcp55/mcp55_lpc.c trunk/src/southbridge/sis/sis966/sis966_lpc.c trunk/src/southbridge/via/vt8235/vt8235_lpc.c trunk/src/southbridge/via/vt8237r/vt8237r_lpc.c Modified: trunk/src/devices/cardbus_device.c ============================================================================== --- trunk/src/devices/cardbus_device.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/devices/cardbus_device.c Thu Jun 17 18:16:56 2010 (r5633) @@ -170,8 +170,6 @@ pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); pci_dev_enable_resources(dev); - - enable_childrens_resources(dev); } struct device_operations default_cardbus_ops_bus = { Modified: trunk/src/devices/device.c ============================================================================== --- trunk/src/devices/device.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/devices/device.c Thu Jun 17 18:16:56 2010 (r5633) @@ -782,33 +782,34 @@ } /** - * @brief Enable the resources for a specific device + * @brief Enable the resources for devices on a link * - * @param dev the device whose resources are to be enabled + * @param link the link whose devices' resources are to be enabled * * Enable resources of the device by calling the device specific * enable_resources() method. * * The parent's resources should be enabled first to avoid having enabling * order problem. This is done by calling the parent's enable_resources() - * method and let that method to call it's children's enable_resoruces() - * method via the (global) enable_childrens_resources(). + * method before its childrens' enable_resources() methods. * - * Indirect mutual recursion: - * enable_resources() -> device_operations::enable_resource() - * device_operations::enable_resource() -> enable_children_resources() - * enable_children_resources() -> enable_resources() */ -void enable_resources(struct device *dev) +static void enable_resources(struct bus *link) { - if (!dev->enabled) { - return; + struct device *dev; + struct bus *c_link; + + for (dev = link->children; dev; dev = dev->sibling) { + if (dev->enabled && dev->ops && dev->ops->enable_resources) { + dev->ops->enable_resources(dev); + } } - if (!dev->ops || !dev->ops->enable_resources) { - printk(BIOS_ERR, "%s missing enable_resources\n", dev_path(dev)); - return; + + for (dev = link->children; dev; dev = dev->sibling) { + for (c_link = dev->link_list; c_link; c_link = c_link->next) { + enable_resources(c_link); + } } - dev->ops->enable_resources(dev); } /** @@ -1036,39 +1037,77 @@ */ void dev_enable(void) { + struct bus *link; + printk(BIOS_INFO, "Enabling resources...\n"); /* now enable everything. */ - enable_resources(&dev_root); + for (link = dev_root.link_list; link; link = link->next) + enable_resources(link); printk(BIOS_INFO, "done.\n"); } /** - * @brief Initialize all devices in the global device list. + * @brief Initialize a specific device + * + * @param dev the device to be initialized + * + * The parent should be initialized first to avoid having an ordering + * problem. This is done by calling the parent's init() + * method before its childrens' init() methods. * - * Starting at the first device on the global device link list, - * walk the list and call the device's init() method to do deivce - * specific setup. */ -void dev_initialize(void) +static void init_dev(struct device *dev) +{ + if (!dev->enabled) { + return; + } + + if (!dev->initialized && dev->ops && dev->ops->init) { + if (dev->path.type == DEVICE_PATH_I2C) { + printk(BIOS_DEBUG, "smbus: %s[%d]->", + dev_path(dev->bus->dev), dev->bus->link_num); + } + + printk(BIOS_DEBUG, "%s init\n", dev_path(dev)); + dev->initialized = 1; + dev->ops->init(dev); + } +} + +static void init_link(struct bus *link) { struct device *dev; + struct bus *c_link; - printk(BIOS_INFO, "Initializing devices...\n"); - for (dev = all_devices; dev; dev = dev->next) { - if (dev->enabled && !dev->initialized && - dev->ops && dev->ops->init) { - if (dev->path.type == DEVICE_PATH_I2C) { - printk(BIOS_DEBUG, "smbus: %s[%d]->", - dev_path(dev->bus->dev), - dev->bus->link_num); - } - printk(BIOS_DEBUG, "%s init\n", dev_path(dev)); - dev->initialized = 1; - dev->ops->init(dev); + for (dev = link->children; dev; dev = dev->sibling) { + init_dev(dev); + } + + for (dev = link->children; dev; dev = dev->sibling) { + for (c_link = dev->link_list; c_link; c_link = c_link->next) { + init_link(c_link); } } +} + +/** + * @brief Initialize all devices in the global device tree. + * + * Starting at the root device, call the device's init() method to do device- + * specific setup, then call each child's init() method. + */ +void dev_initialize(void) +{ + struct bus *link; + + printk(BIOS_INFO, "Initializing devices...\n"); + + /* now initialize everything. */ + for (link = dev_root.link_list; link; link = link->next) + init_link(link); + printk(BIOS_INFO, "Devices initialized\n"); show_all_devs(BIOS_SPEW, "After init."); } Modified: trunk/src/devices/pci_device.c ============================================================================== --- trunk/src/devices/pci_device.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/devices/pci_device.c Thu Jun 17 18:16:56 2010 (r5633) @@ -621,7 +621,6 @@ pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); pci_dev_enable_resources(dev); - enable_childrens_resources(dev); } void pci_bus_reset(struct bus *bus) Modified: trunk/src/devices/root_device.c ============================================================================== --- trunk/src/devices/root_device.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/devices/root_device.c Thu Jun 17 18:16:56 2010 (r5633) @@ -32,7 +32,7 @@ * that encompass the resources for the entire system. * @param root Pointer to the device structure for the system root device */ -void root_dev_read_resources(device_t root) +static void root_dev_read_resources(device_t root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -44,7 +44,7 @@ * and every device under it which are all of the devices. * @param root Pointer to the device structure for the system root device */ -void root_dev_set_resources(device_t root) +static void root_dev_set_resources(device_t root) { printk(BIOS_ERR, "%s should never be called.\n", __func__); } @@ -115,33 +115,8 @@ return max; } -/** - * @brief Enable resources for children devices - * - * @param dev the device whos children's resources are to be enabled - * - * This function is called by the global enable_resource() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() - */ -void enable_childrens_resources(device_t dev) -{ - struct bus *link; - for(link = dev->link_list; link; link = link->next) { - device_t child; - for(child = link->children; child; child = child->sibling) { - enable_resources(child); - } - } -} - -void root_dev_enable_resources(device_t dev) +static void root_dev_enable_resources(device_t dev) { - enable_childrens_resources(dev); } /** @@ -152,16 +127,16 @@ * * This function is the default scan_bus() method of the root device. */ -unsigned int root_dev_scan_bus(device_t root, unsigned int max) +static unsigned int root_dev_scan_bus(device_t root, unsigned int max) { return scan_static_bus(root, max); } -void root_dev_init(device_t root) +static void root_dev_init(device_t root) { } -void root_dev_reset(struct bus *bus) +static void root_dev_reset(struct bus *bus) { printk(BIOS_INFO, "Reseting board...\n"); hard_reset(); Copied and modified: trunk/src/drivers/i2c/adt7463/adt7463.c (from r5632, trunk/src/mainboard/tyan/s2881/mainboard.c) ============================================================================== --- trunk/src/mainboard/tyan/s2881/mainboard.c Thu Jun 17 00:21:19 2010 (r5632, copy source) +++ trunk/src/drivers/i2c/adt7463/adt7463.c Thu Jun 17 18:16:56 2010 (r5633) @@ -28,6 +28,8 @@ /** * Do some S2881-specific HWM initialization for the ADT7463 chip. * + * Should be factored out so that it can be more general. + * * See Analog Devices ADT7463 datasheet, Rev C (2004): * http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html */ @@ -98,56 +100,23 @@ printk(BIOS_DEBUG, "ADT7463 properly initialized\n"); } -static void dummy_noop(device_t dummy) +static void adt7463_noop(device_t dummy) { } -static struct device_operations dummy_operations = { - .read_resources = dummy_noop, - .set_resources = dummy_noop, - .enable_resources = dummy_noop, +static struct device_operations adt7463_operations = { + .read_resources = adt7463_noop, + .set_resources = adt7463_noop, + .enable_resources = adt7463_noop, .init = adt7463_init, }; -static unsigned int scan_root_bus(device_t root, unsigned int max) -{ - struct device_path path; - device_t dummy; - - max = root_dev_scan_bus(root, max); - - printk(BIOS_DEBUG, "scan_root_bus ok\n"); - - /* The following is a little silly. We need a hook into the boot - * process *after* the ADT7463 device has been initialized. So we - * create this dummy device, and we put the ADT7463 S2881 specific - * settings in its init function, which gets called - * as the last device to be initialized. - */ - - path.type = DEVICE_PATH_PNP; - path.pnp.port = 0; - path.pnp.device = 0; - dummy = alloc_dev(root->link_list, &path); - dummy->ops = &dummy_operations; - - return max; -} - -static struct device_operations mainboard_operations = { - .read_resources = root_dev_read_resources, - .set_resources = root_dev_set_resources, - .enable_resources = root_dev_enable_resources, - .init = root_dev_init, - .scan_bus = scan_root_bus, -}; - static void enable_dev(struct device *dev) { - dev->ops = &mainboard_operations; + dev->ops = &adt7463_operations; } struct chip_operations mainboard_ops = { - CHIP_NAME("Tyan S2881 Mainboard") + CHIP_NAME("adt7463") .enable_dev = enable_dev, }; Copied and modified: trunk/src/drivers/i2c/adt7463/chip.h (from r5632, trunk/src/drivers/i2c/adm1027/chip.h) ============================================================================== --- trunk/src/drivers/i2c/adm1027/chip.h Thu Jun 17 00:21:19 2010 (r5632, copy source) +++ trunk/src/drivers/i2c/adt7463/chip.h Thu Jun 17 18:16:56 2010 (r5633) @@ -1,4 +1,4 @@ -extern struct chip_operations drivers_i2c_adm1027_ops; +extern struct chip_operations drivers_i2c_adt7463_ops; -struct drivers_i2c_adm1027_config { +struct drivers_i2c_adt7463_config { }; Modified: trunk/src/include/device/device.h ============================================================================== --- trunk/src/include/device/device.h Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/include/device/device.h Thu Jun 17 18:16:56 2010 (r5633) @@ -107,7 +107,6 @@ int reset_bus(struct bus *bus); unsigned int scan_bus(struct device *bus, unsigned int max); void assign_resources(struct bus *bus); -void enable_resources(struct device *dev); void enumerate_static_device(void); void enumerate_static_devices(void); const char *dev_path(device_t dev); @@ -146,12 +145,5 @@ extern struct device_operations default_dev_ops_root; void pci_domain_read_resources(struct device *dev); unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max); -void root_dev_read_resources(device_t dev); -void root_dev_set_resources(device_t dev); unsigned int scan_static_bus(device_t bus, unsigned int max); -void enable_childrens_resources(device_t dev); -void root_dev_enable_resources(device_t dev); -unsigned int root_dev_scan_bus(device_t root, unsigned int max); -void root_dev_init(device_t dev); -void root_dev_reset(struct bus *bus); #endif /* DEVICE_H */ Modified: trunk/src/mainboard/emulation/qemu-x86/northbridge.c ============================================================================== --- trunk/src/mainboard/emulation/qemu-x86/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/mainboard/emulation/qemu-x86/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -122,8 +122,8 @@ static struct device_operations pci_domain_ops = { .read_resources = cpu_pci_domain_read_resources, .set_resources = cpu_pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/mainboard/tyan/s2881/mainboard.c ============================================================================== --- trunk/src/mainboard/tyan/s2881/mainboard.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/mainboard/tyan/s2881/mainboard.c Thu Jun 17 18:16:56 2010 (r5633) @@ -21,133 +21,8 @@ */ #include <device/device.h> -#include <console/console.h> -#include <device/smbus.h> #include "chip.h" -/** - * Do some S2881-specific HWM initialization for the ADT7463 chip. - * - * See Analog Devices ADT7463 datasheet, Rev C (2004): - * http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html - */ -static void adt7463_init(device_t dev) -{ - device_t smbus_dev, adt7463; - struct device_path path; - int result; - - /* Find the SMBus controller (AMD-8111). */ - smbus_dev = dev_find_device(0x1022, 0x746b, 0); - if (!smbus_dev) - die("SMBus controller not found\n"); - printk(BIOS_DEBUG, "SMBus controller found\n"); - - /* Find the ADT7463 device. */ - path.type = DEVICE_PATH_I2C; - path.i2c.device = 0x2d; - adt7463 = find_dev_path(smbus_dev->link_list, &path); - if (!adt7463) - die("ADT7463 not found\n"); - printk(BIOS_DEBUG, "ADT7463 found\n"); - - /* Set all fans to 'Fastest Speed Calculated by All 3 Temperature - * Channels Controls PWMx'. - */ - result = smbus_write_byte(adt7463, 0x5c, 0xc2); - result = smbus_write_byte(adt7463, 0x5d, 0xc2); - result = smbus_write_byte(adt7463, 0x5e, 0xc2); - - /* Make sure that our fans never stop when temp. falls below Tmin, - * but rather keep going at minimum duty cycle (applies to automatic - * fan control mode only). - */ - result = smbus_write_byte(adt7463, 0x62, 0xc0); - - /* Set minimum PWM duty cycle to 25%, rather than the default 50%. */ - result = smbus_write_byte(adt7463, 0x64, 0x40); - result = smbus_write_byte(adt7463, 0x65, 0x40); - result = smbus_write_byte(adt7463, 0x66, 0x40); - - /* Set Tmin to 55C, rather than the default 90C. Above this temperature - * the fans will start blowing harder as temperature increases - * (automatic mode only). - */ - result = smbus_write_byte(adt7463, 0x67, 0x37); - result = smbus_write_byte(adt7463, 0x68, 0x37); - result = smbus_write_byte(adt7463, 0x69, 0x37); - - /* Set THERM limit to 70C, rather than the default 100C. - * The fans will kick in at 100% if the sensors reach this temperature, - * (only in automatic mode, but supposedly even when hardware is - * locked up). This is a failsafe measure. - */ - result = smbus_write_byte(adt7463, 0x6a, 0x46); - result = smbus_write_byte(adt7463, 0x6b, 0x46); - result = smbus_write_byte(adt7463, 0x6c, 0x46); - - /* Remote temperature 1 offset (LSB == 0.25C). */ - result = smbus_write_byte(adt7463, 0x70, 0x02); - - /* Remote temperature 2 offset (LSB == 0.25C). */ - result = smbus_write_byte(adt7463, 0x72, 0x01); - - /* Set TACH measurements to normal (1/second). */ - result = smbus_write_byte(adt7463, 0x78, 0xf0); - - printk(BIOS_DEBUG, "ADT7463 properly initialized\n"); -} - -static void dummy_noop(device_t dummy) -{ -} - -static struct device_operations dummy_operations = { - .read_resources = dummy_noop, - .set_resources = dummy_noop, - .enable_resources = dummy_noop, - .init = adt7463_init, -}; - -static unsigned int scan_root_bus(device_t root, unsigned int max) -{ - struct device_path path; - device_t dummy; - - max = root_dev_scan_bus(root, max); - - printk(BIOS_DEBUG, "scan_root_bus ok\n"); - - /* The following is a little silly. We need a hook into the boot - * process *after* the ADT7463 device has been initialized. So we - * create this dummy device, and we put the ADT7463 S2881 specific - * settings in its init function, which gets called - * as the last device to be initialized. - */ - - path.type = DEVICE_PATH_PNP; - path.pnp.port = 0; - path.pnp.device = 0; - dummy = alloc_dev(root->link_list, &path); - dummy->ops = &dummy_operations; - - return max; -} - -static struct device_operations mainboard_operations = { - .read_resources = root_dev_read_resources, - .set_resources = root_dev_set_resources, - .enable_resources = root_dev_enable_resources, - .init = root_dev_init, - .scan_bus = scan_root_bus, -}; - -static void enable_dev(struct device *dev) -{ - dev->ops = &mainboard_operations; -} - struct chip_operations mainboard_ops = { CHIP_NAME("Tyan S2881 Mainboard") - .enable_dev = enable_dev, }; Modified: trunk/src/northbridge/amd/amdfam10/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/amdfam10/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/amd/amdfam10/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -604,12 +604,6 @@ } } -static void amdfam10_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void mcf0_control_init(struct device *dev) { } @@ -617,7 +611,7 @@ static struct device_operations northbridge_operations = { .read_resources = amdfam10_read_resources, .set_resources = amdfam10_set_resources, - .enable_resources = amdfam10_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = mcf0_control_init, .scan_bus = amdfam10_scan_chains, .enable = 0, @@ -1145,8 +1139,8 @@ static struct device_operations pci_domain_ops = { .read_resources = amdfam10_domain_read_resources, .set_resources = amdfam10_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = amdfam10_domain_scan_bus, #if CONFIG_MMCONF_SUPPORT_DEFAULT .ops_pci_bus = &pci_ops_mmconf, Modified: trunk/src/northbridge/amd/amdk8/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/amd/amdk8/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -574,12 +574,6 @@ } } -static void amdk8_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void mcf0_control_init(struct device *dev) { #if 0 @@ -593,7 +587,7 @@ static struct device_operations northbridge_operations = { .read_resources = amdk8_read_resources, .set_resources = amdk8_set_resources, - .enable_resources = amdk8_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = mcf0_control_init, .scan_bus = amdk8_scan_chains, .enable = 0, @@ -1119,8 +1113,8 @@ static struct device_operations pci_domain_ops = { .read_resources = amdk8_domain_read_resources, .set_resources = amdk8_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = amdk8_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, }; Modified: trunk/src/northbridge/amd/gx1/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/gx1/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/amd/gx1/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -169,8 +169,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/amd/gx2/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/gx2/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/amd/gx2/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -448,8 +448,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/amd/lx/northbridge.c ============================================================================== --- trunk/src/northbridge/amd/lx/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/amd/lx/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -441,7 +441,7 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, + .enable_resources = NULL, .scan_bus = pci_domain_scan_bus, .enable = pci_domain_enable, }; Modified: trunk/src/northbridge/intel/e7501/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/e7501/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/e7501/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -141,8 +141,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, }; Modified: trunk/src/northbridge/intel/e7520/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/e7520/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/e7520/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -163,8 +163,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = e7520_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; Modified: trunk/src/northbridge/intel/e7525/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/e7525/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/e7525/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -163,8 +163,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = e7525_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; Modified: trunk/src/northbridge/intel/i3100/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i3100/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i3100/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -184,8 +184,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = i3100_domain_scan_bus, .ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */ }; Modified: trunk/src/northbridge/intel/i3100/pciexp_porta_ep80579.c ============================================================================== --- trunk/src/northbridge/intel/i3100/pciexp_porta_ep80579.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i3100/pciexp_porta_ep80579.c Thu Jun 17 18:16:56 2010 (r5633) @@ -64,7 +64,6 @@ dev->command |= PCI_COMMAND_MEMORY; } pci_dev_enable_resources(dev); - enable_childrens_resources(dev); } Modified: trunk/src/northbridge/intel/i440bx/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i440bx/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i440bx/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -124,8 +124,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = i440bx_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/intel/i440lx/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i440lx/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i440lx/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -152,8 +152,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = i440lx_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/intel/i82810/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i82810/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i82810/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -184,8 +184,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/intel/i82830/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i82830/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i82830/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -164,8 +164,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/intel/i855/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i855/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i855/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -140,8 +140,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/intel/i945/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i945/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/intel/i945/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -224,8 +224,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, #if CONFIG_MMCONF_SUPPORT_DEFAULT .ops_pci_bus = &pci_ops_mmconf, Modified: trunk/src/northbridge/via/cn400/northbridge.c ============================================================================== --- trunk/src/northbridge/via/cn400/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/cn400/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -283,8 +283,8 @@ static struct device_operations pci_domain_ops = { .read_resources = cn400_domain_read_resources, .set_resources = cn400_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = cn400_domain_scan_bus, }; Modified: trunk/src/northbridge/via/cn700/northbridge.c ============================================================================== --- trunk/src/northbridge/via/cn700/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/cn700/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -205,8 +205,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/via/cx700/cx700_lpc.c ============================================================================== --- trunk/src/northbridge/via/cx700/cx700_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/cx700/cx700_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -270,7 +270,6 @@ { /* Enable SuperIO decoding */ pci_dev_enable_resources(dev); - enable_childrens_resources(dev); } static void cx700_lpc_init(struct device *dev) Modified: trunk/src/northbridge/via/cx700/northbridge.c ============================================================================== --- trunk/src/northbridge/via/cx700/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/cx700/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -134,8 +134,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/via/vt8601/northbridge.c ============================================================================== --- trunk/src/northbridge/via/vt8601/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/vt8601/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -146,8 +146,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/via/vt8623/northbridge.c ============================================================================== --- trunk/src/northbridge/via/vt8623/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/vt8623/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -207,8 +207,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/via/vx800/northbridge.c ============================================================================== --- trunk/src/northbridge/via/vx800/northbridge.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/vx800/northbridge.c Thu Jun 17 18:16:56 2010 (r5633) @@ -181,8 +181,8 @@ static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, .set_resources = pci_domain_set_resources, - .enable_resources = enable_childrens_resources, - .init = 0, + .enable_resources = NULL, + .init = NULL, .scan_bus = pci_domain_scan_bus, }; Modified: trunk/src/northbridge/via/vx800/vx800_lpc.c ============================================================================== --- trunk/src/northbridge/via/vx800/vx800_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/northbridge/via/vx800/vx800_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -322,16 +322,6 @@ pci_dev_set_resources(dev); } -static void vx800_enable_resources(device_t dev) -{ - /* vx800 is not a pci bridge and has no resources of its own (other than - standard PC i/o addresses). however it does control the isa bus and so - we need to manually call enable childrens resources on that bus */ - /* TODO: do we even care about ISA? If so, for what? SuperIO on LPC bus */ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void southbridge_init(struct device *dev) { printk(BIOS_DEBUG, "vx800 sb init\n"); @@ -375,8 +365,8 @@ static struct device_operations vx800_lpc_ops = { .read_resources = vx800_read_resources, .set_resources = vx800_set_resources, - .enable_resources = vx800_enable_resources, - .init = &southbridge_init, + .enable_resources = pci_dev_enable_resources, + .init = southbridge_init, .scan_bus = scan_static_bus, }; Modified: trunk/src/southbridge/amd/amd8111/amd8111_lpc.c ============================================================================== --- trunk/src/southbridge/amd/amd8111/amd8111_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/amd8111/amd8111_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -106,12 +106,6 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void amd8111_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) { pci_write_config32(dev, 0x70, @@ -125,7 +119,7 @@ static struct device_operations lpc_ops = { .read_resources = amd8111_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = amd8111_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = amd8111_enable, Modified: trunk/src/southbridge/amd/cs5530/cs5530_isa.c ============================================================================== --- trunk/src/southbridge/amd/cs5530/cs5530_isa.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/cs5530/cs5530_isa.c Thu Jun 17 18:16:56 2010 (r5633) @@ -47,17 +47,10 @@ { } -static void cs5530_pci_dev_enable_resources(device_t dev) -{ - // TODO: Needed? - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations isa_ops = { .read_resources = cs5530_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = cs5530_pci_dev_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = isa_init, .enable = 0, .scan_bus = scan_static_bus, Modified: trunk/src/southbridge/amd/cs5535/cs5535.c ============================================================================== --- trunk/src/southbridge/amd/cs5535/cs5535.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/cs5535/cs5535.c Thu Jun 17 18:16:56 2010 (r5633) @@ -87,17 +87,10 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void cs5535_pci_dev_enable_resources(device_t dev) -{ - printk(BIOS_DEBUG, "%s()\n", __func__); - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations southbridge_ops = { .read_resources = cs5535_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = cs5535_pci_dev_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = southbridge_init, .enable = southbridge_enable, .scan_bus = scan_static_bus, Modified: trunk/src/southbridge/amd/cs5536/cs5536.c ============================================================================== --- trunk/src/southbridge/amd/cs5536/cs5536.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/cs5536/cs5536.c Thu Jun 17 18:16:56 2010 (r5633) @@ -667,17 +667,10 @@ } -static void cs5536_pci_dev_enable_resources(device_t dev) -{ - printk(BIOS_DEBUG, "%s()\n", __func__); - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations southbridge_ops = { .read_resources = cs5536_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = cs5536_pci_dev_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = southbridge_init, // .enable = southbridge_enable, .scan_bus = scan_static_bus, Modified: trunk/src/southbridge/amd/sb600/sb600_lpc.c ============================================================================== --- trunk/src/southbridge/amd/sb600/sb600_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/sb600/sb600_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -96,13 +96,6 @@ * * @param dev the device whos children's resources are to be enabled * - * This function is call by the global enable_resources() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() */ static void sb600_lpc_enable_childrens_resources(device_t dev) { @@ -118,7 +111,6 @@ device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; Modified: trunk/src/southbridge/amd/sb700/sb700_lpc.c ============================================================================== --- trunk/src/southbridge/amd/sb700/sb700_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/amd/sb700/sb700_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -108,13 +108,6 @@ * * @param dev the device whos children's resources are to be enabled * - * This function is call by the global enable_resources() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() */ static void sb700_lpc_enable_childrens_resources(device_t dev) { @@ -130,7 +123,6 @@ device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; Modified: trunk/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c ============================================================================== --- trunk/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -57,13 +57,6 @@ * * @param dev the device whos children's resources are to be enabled * - * This function is call by the global enable_resources() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() */ static void bcm5785_lpc_enable_childrens_resources(device_t dev) { @@ -75,7 +68,6 @@ for (link = dev->link_list; link; link = link->next) { device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; for(res = child->resource_list; res; res = res->next) { Modified: trunk/src/southbridge/intel/esb6300/esb6300_lpc.c ============================================================================== --- trunk/src/southbridge/intel/esb6300/esb6300_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/esb6300/esb6300_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -351,8 +351,6 @@ gpio_cntl = pci_read_config8(dev, 0x5c); gpio_cntl |= (1 << 4); pci_write_config8(dev, 0x5c, gpio_cntl); - - enable_childrens_resources(dev); } static struct pci_operations lops_pci = { Modified: trunk/src/southbridge/intel/i3100/i3100_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i3100/i3100_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i3100/i3100_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -404,8 +404,6 @@ /* Enable the RCBA */ pci_write_config32(dev, RCBA, pci_read_config32(dev, RCBA) | (1 << 0)); - - enable_childrens_resources(dev); } static struct pci_operations lops_pci = { Modified: trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -332,16 +332,10 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void i82801ax_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations lpc_ops = { .read_resources = i82801ax_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = i82801ax_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801ax_enable, Modified: trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -332,16 +332,10 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void i82801bx_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations lpc_ops = { .read_resources = i82801bx_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = i82801bx_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801bx_enable, Modified: trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -229,16 +229,10 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void i82801cx_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations lpc_ops = { .read_resources = i82801cx_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = i82801cx_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = 0, Modified: trunk/src/southbridge/intel/i82801dx/i82801dx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801dx/i82801dx_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801dx/i82801dx_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -322,16 +322,10 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void i82801dx_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static struct device_operations lpc_ops = { .read_resources = i82801dx_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = i82801dx_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801dx_enable, Modified: trunk/src/southbridge/intel/i82801ex/i82801ex_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801ex/i82801ex_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801ex/i82801ex_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -335,8 +335,6 @@ gpio_cntl = pci_read_config8(dev, 0x5c); gpio_cntl |= (1 << 4); pci_write_config8(dev, 0x5c, gpio_cntl); - - enable_childrens_resources(dev); } static struct pci_operations lops_pci = { Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_lpc.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -481,12 +481,6 @@ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void i82801gx_lpc_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void set_subsystem(device_t dev, unsigned vendor, unsigned device) { if (!vendor || !device) { @@ -505,7 +499,7 @@ static struct device_operations device_ops = { .read_resources = i82801gx_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = i82801gx_lpc_enable_resources, + .enable_resources = pci_dev_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801gx_enable, Modified: trunk/src/southbridge/intel/i82801gx/i82801gx_pci.c ============================================================================== --- trunk/src/southbridge/intel/i82801gx/i82801gx_pci.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/intel/i82801gx/i82801gx_pci.c Thu Jun 17 18:16:56 2010 (r5633) @@ -110,8 +110,6 @@ /* This is the reason we need our own pci_bus_enable_resources */ ich_pci_dev_enable_resources(dev); - - enable_childrens_resources(dev); } static void set_subsystem(device_t dev, unsigned vendor, unsigned device) Modified: trunk/src/southbridge/nvidia/ck804/ck804_lpc.c ============================================================================== --- trunk/src/southbridge/nvidia/ck804/ck804_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/nvidia/ck804/ck804_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -222,12 +222,6 @@ * This function is called by the global enable_resources() indirectly via the * device_operation::enable_resources() method of devices. * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() - * - * @param dev The device whose children's resources are to be enabled. */ static void ck804_lpc_enable_childrens_resources(device_t dev) { @@ -240,7 +234,6 @@ for (link = dev->link_list; link; link = link->next) { device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; for (res = child->resource_list; res; res = res->next) { Modified: trunk/src/southbridge/nvidia/mcp55/mcp55_lpc.c ============================================================================== --- trunk/src/southbridge/nvidia/mcp55/mcp55_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/nvidia/mcp55/mcp55_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -195,13 +195,6 @@ * * @param dev the device whos children's resources are to be enabled * - * This function is called by the global enable_resources() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() */ static void mcp55_lpc_enable_childrens_resources(device_t dev) { @@ -215,7 +208,6 @@ for (link = dev->link_list; link; link = link->next) { device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; for(res = child->resource_list; res; res = res->next) { Modified: trunk/src/southbridge/sis/sis966/sis966_lpc.c ============================================================================== --- trunk/src/southbridge/sis/sis966/sis966_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/sis/sis966/sis966_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -188,13 +188,6 @@ * * @param dev the device whos children's resources are to be enabled * - * This function is call by the global enable_resources() indirectly via the - * device_operation::enable_resources() method of devices. - * - * Indirect mutual recursion: - * enable_childrens_resources() -> enable_resources() - * enable_resources() -> device_operation::enable_resources() - * device_operation::enable_resources() -> enable_children_resources() */ static void sis966_lpc_enable_childrens_resources(device_t dev) { @@ -208,7 +201,6 @@ for (link = dev->link_list; link; link = link->next) { device_t child; for (child = link->children; child; child = child->sibling) { - enable_resources(child); if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) { struct resource *res; for(res = child->resource_list; res; res = res->next) { Modified: trunk/src/southbridge/via/vt8235/vt8235_lpc.c ============================================================================== --- trunk/src/southbridge/via/vt8235/vt8235_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/via/vt8235/vt8235_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -241,14 +241,6 @@ pci_dev_set_resources(dev); } -static void vt8235_enable_resources(device_t dev) -{ - /* vt8235 is not a pci bridge and has no resources of its own (other than standard PC i/o addresses) - however it does control the isa bus and so we need to manually call enable childrens resources on that bus */ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void southbridge_init(struct device *dev) { vt8235_init(dev); @@ -258,8 +250,8 @@ static struct device_operations vt8235_lpc_ops = { .read_resources = vt8235_read_resources, .set_resources = vt8235_set_resources, - .enable_resources = vt8235_enable_resources, - .init = &southbridge_init, + .enable_resources = pci_dev_enable_resources, + .init = southbridge_init, .scan_bus = scan_static_bus, }; Modified: trunk/src/southbridge/via/vt8237r/vt8237r_lpc.c ============================================================================== --- trunk/src/southbridge/via/vt8237r/vt8237r_lpc.c Thu Jun 17 00:21:19 2010 (r5632) +++ trunk/src/southbridge/via/vt8237r/vt8237r_lpc.c Thu Jun 17 18:16:56 2010 (r5633) @@ -505,17 +505,6 @@ res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -/** - * The VT8237R is not a PCI bridge and has no resources of its own (other - * than standard PC I/O addresses), however it does control the ISA bus - * and so we need to manually call enable childrens resources on that bus. - */ -static void vt8237r_enable_resources(device_t dev) -{ - pci_dev_enable_resources(dev); - enable_childrens_resources(dev); -} - static void init_keyboard(struct device *dev) { u8 regval = pci_read_config8(dev, 0x51); @@ -535,16 +524,16 @@ static const struct device_operations vt8237r_lpc_ops_s = { .read_resources = vt8237r_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = vt8237r_enable_resources, - .init = &vt8237s_init, + .enable_resources = pci_dev_enable_resources, + .init = vt8237s_init, .scan_bus = scan_static_bus, }; static const struct device_operations vt8237r_lpc_ops_r = { .read_resources = vt8237r_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = vt8237r_enable_resources, - .init = &vt8237r_init, + .enable_resources = pci_dev_enable_resources, + .init = vt8237r_init, .scan_bus = scan_static_bus, };

1 0

jetway PA78VM5 spi flashing
by Qing Pei Wang 17 Jun '10

17 Jun '10

hi all, Recently i found that the mainboard which i used(Jetway PA78VM-H-LF) is not stable, most of the spi flashing caused data error. the data writing is ok, but the bios data does not as the same as the original. the SPI FLASH is Winbond W25X80A In the other hand, the board can not boot correctly, i am wondering if it's because of the CPU. Olsen, have you ever met this problem? -- Wang Qing Pei MSN:wangqingpei@hotmail.com <MSN%3Awangqingpei(a)hotmail.com> Gmail:wangqingpei@gmail.com <Gmail%3Awangqingpei(a)gmail.com> Phone:86+13426369984

2 4

Will my board be supported?
by Alexander Hug 17 Jun '10

17 Jun '10

Hello! I am interested in Coreboot and want to try it on my "old" desktop. It is an "ASUS A7V880", but i cannot find it in the list of boards. So here is my hardware, i hope everything is included: ASUS A7V880 with AthlonXP 2600+, 2GB Ram, HD connected to the SATA controller. The Manual says (highlights): Chipset VIA KT880, VIA VT8237 FSB 400,333,266,200 1x AGPx8, 5xPCI 2x UDMA(IDE) 133 2x SATA ASUS EZ Flash ASUS CrashFree BIOS 2 ASUS Q-Fan 4Mb Flash EEPROM, Award BIOS, PnP, DMI2.0, WfM2.0, SM Bios 2.3, ACPI $ lspci -tvnn -[0000:00]-+-00.0 VIA Technologies, Inc. KT880 Host Bridge [1106:0269] +-00.1 VIA Technologies, Inc. KT880 Host Bridge [1106:1269] +-00.2 VIA Technologies, Inc. KT880 Host Bridge [1106:2269] +-00.3 VIA Technologies, Inc. KT880 Host Bridge [1106:3269] +-00.4 VIA Technologies, Inc. KT880 Host Bridge [1106:4269] +-00.7 VIA Technologies, Inc. KT880 Host Bridge [1106:7269] +-01.0-[0000:01]----00.0 nVidia Corporation NV34 [GeForce FX 5200] [10de:0322] +-0a.0 Intel Corporation 82557/8/9/0/1 Ethernet Pro 100 [8086:1229] +-0e.0 VIA Technologies Inc. VT1720/24 [Envy24PT/HT] PCI Multi-Channel Audio Controller [1412:1724] +-0f.0 VIA Technologies, Inc. VIA VT6420 SATA RAID Controller [1106:3149] +-0f.1 VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE [1106:0571] +-10.0 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.1 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.2 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.3 VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038] +-10.4 VIA Technologies, Inc. USB 2.0 [1106:3104] +-11.0 VIA Technologies, Inc. VT8237 ISA bridge [KT600/K8T800/K8T890 South] [1106:3227] +-11.5 VIA Technologies, Inc. VT8233/A/8235/8237 AC97 Audio Controller [1106:3059] \-11.6 VIA Technologies, Inc. AC'97 Modem Controller [1106:3068] $superiotool -d (I skipped V because it reports only "failed") superiotool r3125 Found ITE IT8712F (id=0x8712, rev=0x5) at 0x2e Register dump: idx 07 20 21 22 23 24 2b val 0a 87 12 05 01 00 00 def NA 87 12 08 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 val 01 03 f0 06 02 00 00 def 00 03 f0 06 02 00 00 LDN 0x01 (COM1) idx 30 60 61 70 f0 f1 f2 f3 val 00 00 00 00 00 50 00 7f def 00 03 f8 04 00 50 00 7f LDN 0x02 (COM2) idx 30 60 61 70 f0 f1 f2 f3 val 00 02 f8 03 00 50 00 7f def 00 02 f8 03 00 50 00 7f LDN 0x03 (Parallel port) idx 30 60 61 62 63 70 74 f0 val 00 00 00 00 00 00 04 00 def 00 03 78 07 78 07 03 03 LDN 0x04 (Environment controller) idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 val 01 0c 00 0b 00 00 00 00 06 00 80 00 ff def 00 02 90 02 30 09 00 00 00 00 00 NA NA LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 71 f0 val 01 00 60 00 64 01 02 00 def 01 00 60 00 64 01 02 08 LDN 0x06 (Mouse) idx 30 70 71 f0 val 01 0c 02 00 def 00 0c 02 00 LDN 0x07 (GPIO) idx 25 26 27 28 29 2a 2c 60 61 62 63 64 65 70 71 72 73 74 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c8 c9 ca cb cc e0 e1 e2 e3 e4 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc fd val 00 00 36 80 00 00 00 00 00 04 80 00 00 00 00 00 00 04 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 34 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 16 00 def 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 40 00 01 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA 00 LDN 0x08 (MIDI port) idx 30 60 61 70 f0 val 00 00 00 00 00 def 00 03 00 0a 00 LDN 0x09 (Game port) idx 30 60 61 val 00 00 00 def 00 02 01 LDN 0x0a (Consumer IR) idx 30 60 61 70 f0 val 00 03 10 0b 06 def 00 03 10 0b 00 $ flashrom -v Calibrating delay loop... OK. No coreboot table found. Found chipset "VIA VT8237", enabling flash write... OK. Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000. URL to ASUS http://support.asus.com/download/download.aspx?SLanguage=de-de&model=A7V880…

2 2

Can not add bug report via website.
by Greg.Chandler＠wellsfargo.com 17 Jun '10

17 Jun '10

I've tried to add this several times to via the bug report tool on the website, but get stuck in a loop on the captcha page. Can I post this here to get it looked at? Filo does not boot from the CF or PCMCIA controllers. I did find a work around, some 70 prom flashes later.. I've limited the scope of my work to ide.c, for the legacy boot, not the grub-compatible. This is one will need the help of a real developer to fix properly. Here is what I've found: Problem 1: There are 2 types of detections for IDE interfaces: if ((sata && class == 0x180) || (pata && class == 0x101)) { and if (hdr == HEADER_TYPE_BRIDGE || hdr == HEADER_TYPE_CARDBUS) { The 2nd does not work... The first excludes the CF/PC-CARD because it doesn't include the correct class. I have no idea how to fix the CARDBUS check. It's got stuff that reaches into the libpayload code.. So I've made this modification: if ((sata && class == 0x180) || (pata && class == 0x101) || (pata && class == 0x607)) { This explicitly directs the driver to treat the CF as an IDE device. That part works, and it does to a proper detection once it's in the "if" statement. The problem is, as far as I can tell detects this card before all others, and stops. I can see no other IDE channels once I set this. Problem 2: We enter this in "native PCI mode", which is ok. if ((prog_if & mask) || (devclass != 0x0101)) { debug("native PCI mode\n"); if ((ctrl_index & 1) == 0) { /* Primary channel */ ctrl->cmd_base = pci_read_resource(dev, 0); ctrl->ctrl_base = pci_read_resource(dev, 1); } else { /* Secondary channel */ ctrl->cmd_base = pci_read_resource(dev, 2); ctrl->ctrl_base = pci_read_resource(dev, 3); } ctrl->cmd_base &= ~3; ctrl->ctrl_base &= ~3; What is not ok, is that we are now using pci_read_resource to set the ctrl->* stuff when we _explicitly_ listed those elsewhere.. Obviously that doesn't work... I have no idea why we do the "&= ~3" either, so I'm not inclined to mess with it. What does work, is adding these two lines after those: ctrl->cmd_base = 0x1e0; ctrl->ctrl_base = 0x1ec; Obviously we just overwrite all the crap we just set with the pci_read call and the additional lines. Once these are done, the machine can boot of the CF slot, but ONLY the CF slot. A real fix would probably be cool.

1 0

[PATCH] i810E and ICH2 inteltool support
by Joseph Smith 17 Jun '10

17 Jun '10

This patch adds inteltool support for i810E and ICH2. Signed-off-by: Joseph Smith <joe(a)settoplinux.org> -- Thanks, Joseph Smith Set-Top-Linux www.settoplinux.org

2 2

[commit] r5632 - trunk/util/inteltool
by repository service 17 Jun '10

17 Jun '10

Author: linux_junkie Date: Thu Jun 17 00:21:19 2010 New Revision: 5632 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5632 Log: This patch adds inteltool support for i810E and ICH2. Signed-off-by: Joseph Smith <joe(a)settoplinux.org> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/inteltool/gpio.c trunk/util/inteltool/inteltool.c trunk/util/inteltool/inteltool.h trunk/util/inteltool/memory.c trunk/util/inteltool/pcie.c trunk/util/inteltool/powermgt.c trunk/util/inteltool/rootcmplx.c Modified: trunk/util/inteltool/gpio.c ============================================================================== --- trunk/util/inteltool/gpio.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/gpio.c Thu Jun 17 00:21:19 2010 (r5632) @@ -39,6 +39,25 @@ { 0x3C, 4, "RESERVED" } }; +static const io_register_t ich2_gpio_registers[] = { + { 0x00, 4, "GPIO_USE_SEL" }, + { 0x04, 4, "GP_IO_SEL" }, + { 0x08, 4, "RESERVED" }, + { 0x0c, 4, "GP_LVL" }, + { 0x10, 4, "RESERVED" }, + { 0x14, 4, "GPO_TTL" }, + { 0x18, 4, "GPO_BLINK" }, + { 0x1c, 4, "RESERVED" }, + { 0x20, 4, "RESERVED" }, + { 0x24, 4, "RESERVED" }, + { 0x28, 4, "RESERVED" }, + { 0x2c, 4, "GPI_INV" }, + { 0x30, 4, "RESERVED" }, + { 0x34, 4, "RESERVED" }, + { 0x38, 4, "RESERVED" }, + { 0x3C, 4, "RESERVED" } +}; + static const io_register_t ich4_gpio_registers[] = { { 0x00, 4, "GPIO_USE_SEL" }, { 0x04, 4, "GP_IO_SEL" }, @@ -176,6 +195,11 @@ gpio_registers = ich4_gpio_registers; size = ARRAY_SIZE(ich4_gpio_registers); break; + case PCI_DEVICE_ID_INTEL_ICH2: + gpiobase = pci_read_word(sb, 0x58) & 0xfffc; + gpio_registers = ich2_gpio_registers; + size = ARRAY_SIZE(ich2_gpio_registers); + break; case PCI_DEVICE_ID_INTEL_ICH: case PCI_DEVICE_ID_INTEL_ICH0: gpiobase = pci_read_word(sb, 0x58) & 0xfffc; Modified: trunk/util/inteltool/inteltool.c ============================================================================== --- trunk/util/inteltool/inteltool.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/inteltool.c Thu Jun 17 00:21:19 2010 (r5632) @@ -34,6 +34,7 @@ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "82443BX without AGP" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "i810" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810DC, "i810-DC100" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_MC, "i810E DC-133" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "i830M" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "82915G/P/GV/GL/PL/910GL" }, Modified: trunk/util/inteltool/inteltool.h ============================================================================== --- trunk/util/inteltool/inteltool.h Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/inteltool.h Thu Jun 17 00:21:19 2010 (r5632) @@ -55,6 +55,7 @@ #define PCI_DEVICE_ID_INTEL_82810 0x7120 #define PCI_DEVICE_ID_INTEL_82810DC 0x7122 +#define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124 #define PCI_DEVICE_ID_INTEL_82830M 0x3575 #define PCI_DEVICE_ID_INTEL_82845 0x1a30 #define PCI_DEVICE_ID_INTEL_82915 0x2580 Modified: trunk/util/inteltool/memory.c ============================================================================== --- trunk/util/inteltool/memory.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/memory.c Thu Jun 17 00:21:19 2010 (r5632) @@ -50,6 +50,7 @@ case PCI_DEVICE_ID_INTEL_82443LX: case PCI_DEVICE_ID_INTEL_82443BX: case PCI_DEVICE_ID_INTEL_82810: + case PCI_DEVICE_ID_INTEL_82810E_MC: case PCI_DEVICE_ID_INTEL_82810DC: case PCI_DEVICE_ID_INTEL_82830M: printf("This northbrigde does not have MCHBAR.\n"); Modified: trunk/util/inteltool/pcie.c ============================================================================== --- trunk/util/inteltool/pcie.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/pcie.c Thu Jun 17 00:21:19 2010 (r5632) @@ -49,6 +49,7 @@ break; case PCI_DEVICE_ID_INTEL_82810: case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: case PCI_DEVICE_ID_INTEL_82830M: printf("This northbrigde does not have EPBAR.\n"); return 1; @@ -102,6 +103,7 @@ break; case PCI_DEVICE_ID_INTEL_82810: case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: printf("This northbrigde does not have DMIBAR.\n"); return 1; default: @@ -156,6 +158,7 @@ break; case PCI_DEVICE_ID_INTEL_82810: case PCI_DEVICE_ID_INTEL_82810DC: + case PCI_DEVICE_ID_INTEL_82810E_MC: printf("Error: This northbrigde does not have PCIEXBAR.\n"); return 1; default: Modified: trunk/util/inteltool/powermgt.c ============================================================================== --- trunk/util/inteltool/powermgt.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/powermgt.c Thu Jun 17 00:21:19 2010 (r5632) @@ -299,6 +299,69 @@ { 0x7c, 4, "RESERVED" }, }; +static const io_register_t ich2_pm_registers[] = { + { 0x00, 2, "PM1_STS" }, + { 0x02, 2, "PM1_EN" }, + { 0x04, 4, "PM1_CNT" }, + { 0x08, 4, "PM1_TMR" }, + { 0x0c, 4, "RESERVED" }, + { 0x10, 4, "PROC_CNT" }, +#if DANGEROUS_REGISTERS + /* This register returns 0 on read, but reading it may cause + * the system to enter C2 state, which might hang the system. + */ + { 0x14, 1, "LV2" }, + { 0x15, 1, "RESERVED" }, + { 0x16, 2, "RESERVED" }, +#endif + { 0x18, 4, "RESERVED" }, + { 0x1c, 4, "RESERVED" }, + { 0x20, 4, "RESERVED" }, + { 0x24, 4, "RESERVED" }, + { 0x28, 2, "GPE0_STS" }, + { 0x2a, 2, "GPE0_EN" }, + { 0x2c, 2, "GPE1_STS" }, + { 0x2e, 2, "GPE1_EN" }, + { 0x30, 2, "SMI_EN" }, + { 0x32, 2, "RESERVED" }, + { 0x34, 2, "SMI_STS" }, + { 0x36, 2, "RESERVED" }, + { 0x38, 4, "RESERVED" }, + { 0x3c, 4, "RESERVED" }, + { 0x40, 2, "MON_SMI_STS" }, + { 0x42, 2, "RESERVED" }, + { 0x44, 2, "DEV_TRP_STS" }, + { 0x46, 2, "RESERVED" }, + { 0x48, 2, "TRP_EN" }, + { 0x4A, 2, "RESERVED" }, + { 0x4c, 2, "BUS_ADDR_TRACK" }, + { 0x4e, 1, "BUS_CYC_TRACK" }, + { 0x4f, 1, "RESERVED" }, + { 0x50, 4, "RESERVED" }, + { 0x54, 4, "RESERVED" }, + { 0x58, 4, "RESERVED" }, + { 0x5c, 4, "RESERVED" }, + /* Here start the TCO registers */ + { 0x60, 1, "TCO_RLD" }, + { 0x61, 1, "TCO_TMR" }, + { 0x62, 1, "TCO_DAT_IN" }, + { 0x63, 1, "TCO_DAT_OUT" }, + { 0x64, 2, "TCO1_STS" }, + { 0x66, 2, "TCO2_STS" }, + { 0x68, 2, "TCO1_CNT" }, + { 0x6a, 2, "TCO2_CNT" }, + { 0x6c, 1, "TCO_MESSAGE1" }, + { 0x6d, 1, "TCO_MESSAGE2" }, + { 0x6e, 1, "TCO_WDSTATUS" }, + { 0x6f, 1, "RESERVED" }, + { 0x70, 1, "SW_IRQ_GEN" }, + { 0x71, 1, "RESERVED" }, + { 0x72, 2, "RESERVED" }, + { 0x74, 4, "RESERVED" }, + { 0x78, 4, "RESERVED" }, + { 0x7c, 4, "RESERVED" }, +}; + static const io_register_t ich0_pm_registers[] = { { 0x00, 2, "PM1_STS" }, { 0x02, 2, "PM1_EN" }, @@ -443,6 +506,11 @@ pm_registers = ich4_pm_registers; size = ARRAY_SIZE(ich4_pm_registers); break; + case PCI_DEVICE_ID_INTEL_ICH2: + pmbase = pci_read_word(sb, 0x40) & 0xfffc; + pm_registers = ich2_pm_registers; + size = ARRAY_SIZE(ich2_pm_registers); + break; case PCI_DEVICE_ID_INTEL_ICH0: pmbase = pci_read_word(sb, 0x40) & 0xfffc; pm_registers = ich0_pm_registers; Modified: trunk/util/inteltool/rootcmplx.c ============================================================================== --- trunk/util/inteltool/rootcmplx.c Fri Jun 11 16:25:40 2010 (r5631) +++ trunk/util/inteltool/rootcmplx.c Thu Jun 17 00:21:19 2010 (r5632) @@ -47,6 +47,7 @@ break; case PCI_DEVICE_ID_INTEL_ICH: case PCI_DEVICE_ID_INTEL_ICH0: + case PCI_DEVICE_ID_INTEL_ICH2: case PCI_DEVICE_ID_INTEL_ICH4: case PCI_DEVICE_ID_INTEL_ICH4M: printf("This southbridge does not have RCBA.\n");

1 0

rommcc bugs
by Rudolf Marek 17 Jun '10

17 Jun '10

Hi all, While working on netconsole for ROMCC I noticed following: int main(void) { /* volatile */ union { unsigned char byte[2]; unsigned short word; } value; value.byte[1] = 1; } ./build/util/romcc/romcc -mcpu=p2 a.c a.c:9.18: 0x86bb968 tuple Internal compiler error: tuple used Aborted Second problem is more complex: romstage.c:74.0: Internal compiler error: constant for unknown type The romstage 74 is end... I will try to come with some testcase for the second problem later or with the a patch that exhibits the problem. Please Eric can you help, Thanks, Rudolf

3 8

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coreboot June 2010