coreboot March 2010

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build service results for r5336
by coreboot information 31 Mar '10

31 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5336 to the coreboot repository. This caused the following changes: Change Log: fix some amd k8 warnings Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5336&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5336&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r5335
by coreboot information 31 Mar '10

31 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5335 to the coreboot repository. This caused the following changes: Change Log: get coreboot_ap memory training in cache mechanism in place. Didn't work since Kconfig (needs more patches to ap_romstage.c but this is a first step) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5335&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5335&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r5334
by coreboot information 31 Mar '10

31 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5334 to the coreboot repository. This caused the following changes: Change Log: fix some southbridge warnings (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5334&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5334&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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build service results for r5333
by coreboot information 31 Mar '10

31 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5333 to the coreboot repository. This caused the following changes: Change Log: - drop unneeded Makefile.inc - drop ap_romstage from Fam10 boards, the mechanism was never used on Fam10 Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5333&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5333&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5339 - trunk/src/lib
by repository service 31 Mar '10

31 Mar '10

Author: stepan Date: Wed Mar 31 00:21:06 2010 New Revision: 5339 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5339 Log: no USE_INIT Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/lib/generic_sdram.c Modified: trunk/src/lib/generic_sdram.c ============================================================================== --- trunk/src/lib/generic_sdram.c Wed Mar 31 00:12:59 2010 (r5338) +++ trunk/src/lib/generic_sdram.c Wed Mar 31 00:21:06 2010 (r5339) @@ -6,8 +6,8 @@ static inline void print_debug_sdram_8(const char *strval, uint32_t val) { -#if CONFIG_USE_INIT - printk(BIOS_DEBUG, "%s%02x\r\n", strval, val); +#if CONFIG_USE_PRINTK_IN_CAR + printk(BIOS_DEBUG, "%s%02x\n", strval, val); #else print_debug(strval); print_debug_hex8(val); print_debug("\r\n"); #endif @@ -23,10 +23,10 @@ int i; /* Set the registers we can set once to reasonable values */ for(i = 0; i < controllers; i++) { - print_debug_sdram_8("Ram1.",i); + print_debug_sdram_8("Ram1.", i); #if RAMINIT_SYSINFO == 1 - sdram_set_registers(ctrl + i , sysinfo); + sdram_set_registers(ctrl + i, sysinfo); #else sdram_set_registers(ctrl + i); #endif @@ -34,10 +34,10 @@ /* Now setup those things we can auto detect */ for(i = 0; i < controllers; i++) { - print_debug_sdram_8("Ram2.",i); + print_debug_sdram_8("Ram2.", i); #if RAMINIT_SYSINFO == 1 - sdram_set_spd_registers(ctrl + i , sysinfo); + sdram_set_spd_registers(ctrl + i, sysinfo); #else sdram_set_spd_registers(ctrl + i); #endif

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build service results for r5332
by coreboot information 31 Mar '10

31 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5332 to the coreboot repository. This caused the following changes: Change Log: indent mptable.c Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5332&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5332&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[commit] r5338 - in trunk/src/northbridge/intel: e7501 i440bx i82810 i82830
by repository service 31 Mar '10

31 Mar '10

Author: stepan Date: Wed Mar 31 00:12:59 2010 New Revision: 5338 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5338 Log: drop USE_INIT should be USE_PRINTK_IN_CAR here. uint32_t should be u32 DEBUG_RAM_SETUP was failing on some northbridges Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/northbridge/intel/e7501/debug.c trunk/src/northbridge/intel/i440bx/raminit.c trunk/src/northbridge/intel/i82810/northbridge.c trunk/src/northbridge/intel/i82810/raminit.c trunk/src/northbridge/intel/i82830/raminit.c Modified: trunk/src/northbridge/intel/e7501/debug.c ============================================================================== --- trunk/src/northbridge/intel/e7501/debug.c Wed Mar 31 00:08:48 2010 (r5337) +++ trunk/src/northbridge/intel/e7501/debug.c Wed Mar 31 00:12:59 2010 (r5338) @@ -39,7 +39,7 @@ for(i = 0; i < 256; i++) { unsigned char val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x:",i); #else print_debug("\r\n"); @@ -48,7 +48,7 @@ #endif } val = pci_read_config8(dev, i); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, " %02x", val); #else print_debug_char(' '); @@ -101,7 +101,7 @@ device = ctrl->channel0[i]; if (device) { int j; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); #else print_debug("dimm: "); @@ -113,7 +113,7 @@ int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ", j); #else print_debug("\r\n"); @@ -126,7 +126,7 @@ break; } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -138,7 +138,7 @@ device = ctrl->channel1[i]; if (device) { int j; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); #else` print_debug("dimm: "); @@ -150,7 +150,7 @@ int status; unsigned char byte; if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ", j); #else print_debug("\r\n"); @@ -163,7 +163,7 @@ break; } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -181,7 +181,7 @@ for(device = 1; device < 0x80; device++) { int j; if( smbus_read_byte(device, 0) < 0 ) continue; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "smbus: %02x", device); #else print_debug("smbus: "); @@ -195,7 +195,7 @@ break; } if ((j & 0xf) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%02x: ",j); #else print_debug("\r\n"); @@ -204,7 +204,7 @@ #endif } byte = status & 0xff; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x ", byte); #else print_debug_hex8(byte); @@ -219,7 +219,7 @@ { int i; -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%04x:\r\n", port); #else print_debug_hex16(port); @@ -228,7 +228,7 @@ for(i=0;i<256;i++) { uint8_t val; if ((i & 0x0f) == 0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "%02x:", i); #else print_debug_hex8(i); @@ -236,7 +236,7 @@ #endif } val = inb(port); -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, " %02x",val); #else print_debug_char(' '); @@ -255,7 +255,7 @@ print_debug("dump_mem:"); for(i=start;i<end;i++) { if((i & 0xf)==0) { -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "\r\n%08x:", i); #else print_debug("\r\n"); @@ -263,7 +263,7 @@ print_debug(":"); #endif } -#if CONFIG_USE_INIT +#if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); #else print_debug(" "); Modified: trunk/src/northbridge/intel/i440bx/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i440bx/raminit.c Wed Mar 31 00:08:48 2010 (r5337) +++ trunk/src/northbridge/intel/i440bx/raminit.c Wed Mar 31 00:12:59 2010 (r5338) @@ -36,7 +36,9 @@ #define PRINT_DEBUG_HEX8(x) print_debug_hex8(x) #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x) #define PRINT_DEBUG_HEX32(x) print_debug_hex32(x) -#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +// no dump_pci_device in src/northbridge/intel/i440bx +// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +#define DUMPNORTH() #else #define PRINT_DEBUG(x) #define PRINT_DEBUG_HEX8(x) @@ -834,7 +836,7 @@ die("HALT\r\n"); } if ((sz.side1 > 128)) { - print_err ("DIMMs > 128MB per side\r\n" + print_err("DIMMs > 128MB per side\r\n" "are not supported on this NB\r\n"); die("HALT\r\n"); } Modified: trunk/src/northbridge/intel/i82810/northbridge.c ============================================================================== --- trunk/src/northbridge/intel/i82810/northbridge.c Wed Mar 31 00:08:48 2010 (r5337) +++ trunk/src/northbridge/intel/i82810/northbridge.c Wed Mar 31 00:12:59 2010 (r5338) @@ -208,8 +208,6 @@ static void enable_dev(struct device *dev) { - struct device_path path; - /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { dev->ops = &pci_domain_ops; Modified: trunk/src/northbridge/intel/i82810/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i82810/raminit.c Wed Mar 31 00:08:48 2010 (r5337) +++ trunk/src/northbridge/intel/i82810/raminit.c Wed Mar 31 00:12:59 2010 (r5338) @@ -30,12 +30,17 @@ -----------------------------------------------------------------------------*/ /* Debugging macros. */ +#define HAVE_ENOUGH_REGISTERS 0 /* Don't have enough registers to compile all + * debugging code with ROMCC + */ #if CONFIG_DEBUG_RAM_SETUP #define PRINT_DEBUG(x) print_debug(x) #define PRINT_DEBUG_HEX8(x) print_debug_hex8(x) #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x) #define PRINT_DEBUG_HEX32(x) print_debug_hex32(x) -#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +// no dump_pci_device in src/northbridge/intel/i82810/ +// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0)) +#define DUMPNORTH() #else #define PRINT_DEBUG(x) #define PRINT_DEBUG_HEX8(x) @@ -138,26 +143,29 @@ drp = (drp >> (i * 4)) & 0x0f; dimm_size = translate_i82810_to_mb[drp]; - addr = (dimm_start * 1024 * 1024) + addr_offset; if (dimm_size) { + addr = (dimm_start * 1024 * 1024) + addr_offset; +#if HAVE_ENOUGH_REGISTERS PRINT_DEBUG(" Sending RAM command 0x"); PRINT_DEBUG_HEX8(reg8); PRINT_DEBUG(" to 0x"); PRINT_DEBUG_HEX32(addr); PRINT_DEBUG("\r\n"); +#endif read32(addr); } dimm_bank = translate_i82810_to_bank[drp]; - addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset; if (dimm_bank) { + addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset; +#if HAVE_ENOUGH_REGISTERS PRINT_DEBUG(" Sending RAM command 0x"); PRINT_DEBUG_HEX8(reg8); PRINT_DEBUG(" to 0x"); PRINT_DEBUG_HEX32(addr); PRINT_DEBUG("\r\n"); - +#endif read32(addr); } Modified: trunk/src/northbridge/intel/i82830/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i82830/raminit.c Wed Mar 31 00:08:48 2010 (r5337) +++ trunk/src/northbridge/intel/i82830/raminit.c Wed Mar 31 00:12:59 2010 (r5338) @@ -67,9 +67,9 @@ DIMM-initialization functions. -----------------------------------------------------------------------------*/ -static void do_ram_command(uint32_t command) +static void do_ram_command(u32 command) { - uint32_t reg32; + u32 reg32; /* Configure the RAM command. */ reg32 = pci_read_config32(NORTHBRIDGE, DRC); @@ -82,7 +82,7 @@ PRINT_DEBUG("\r\n"); } -static void ram_read32(uint8_t dimm_start, uint32_t offset) +static void ram_read32(u8 dimm_start, u32 offset) { if (offset == 0x55aa55aa) { PRINT_DEBUG(" Reading RAM at 0x"); @@ -114,7 +114,7 @@ static void initialize_dimm_rows(void) { int i, row; - uint8_t dimm_start, dimm_end; + u8 dimm_start, dimm_end; unsigned device; dimm_start = 0; @@ -487,7 +487,7 @@ static void northbridge_set_registers(void) { - uint16_t value; + u16 value; int igd_memory = 0; PRINT_DEBUG("Setting initial nothbridge registers....\r\n"); @@ -542,7 +542,7 @@ static void sdram_initialize(void) { int i; - uint32_t reg32; + u32 reg32; /* Setup Initial SDRAM Registers */ sdram_set_registers();

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[commit] r5337 - trunk/src/arch/i386/lib
by repository service 31 Mar '10

31 Mar '10

Author: stepan Date: Wed Mar 31 00:08:48 2010 New Revision: 5337 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5337 Log: that version of console_tx_byte is private. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/arch/i386/lib/printk_init.c Modified: trunk/src/arch/i386/lib/printk_init.c ============================================================================== --- trunk/src/arch/i386/lib/printk_init.c Wed Mar 31 00:03:10 2010 (r5336) +++ trunk/src/arch/i386/lib/printk_init.c Wed Mar 31 00:08:48 2010 (r5337) @@ -32,7 +32,7 @@ #define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL #endif -void console_tx_byte(unsigned char byte) +static void console_tx_byte(unsigned char byte) { if (byte == '\n') uart8250_tx_byte(CONFIG_TTYS0_BASE, '\r');

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[commit] r5336 - trunk/src/northbridge/amd/amdk8
by repository service 31 Mar '10

31 Mar '10

Author: stepan Date: Wed Mar 31 00:03:10 2010 New Revision: 5336 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5336 Log: fix some amd k8 warnings Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/northbridge/amd/amdk8/amdk8_f.h trunk/src/northbridge/amd/amdk8/util.c Modified: trunk/src/northbridge/amd/amdk8/amdk8_f.h ============================================================================== --- trunk/src/northbridge/amd/amdk8/amdk8_f.h Tue Mar 30 23:52:05 2010 (r5335) +++ trunk/src/northbridge/amd/amdk8/amdk8_f.h Wed Mar 31 00:03:10 2010 (r5336) @@ -518,11 +518,7 @@ uint32_t sbbusn; } __attribute__((packed)); -#ifdef __PRE_RAM__ -static void soft_reset(void); -#else -void hard_reset(void); -#endif +#include <reset.h> static void wait_all_core0_mem_trained(struct sys_info *sysinfo) { Modified: trunk/src/northbridge/amd/amdk8/util.c ============================================================================== --- trunk/src/northbridge/amd/amdk8/util.c Tue Mar 30 23:52:05 2010 (r5335) +++ trunk/src/northbridge/amd/amdk8/util.c Wed Mar 31 00:03:10 2010 (r5336) @@ -122,7 +122,7 @@ */ static void showdram(int level, u8 which, u32 base, u32 lim) { - do_printk(level, "DRAM(%02x)%010llx-%010llx, ->(%d), %s, %s, %s, %d\n", + printk(level, "DRAM(%02x)%010llx-%010llx, ->(%d), %s, %s, %s, %d\n", which, (((u64) base & 0xffff0000) << 8), (((u64) lim & 0xffff0000) << 8) + 0xffffff, r_node(lim), re(base), we(base), ileave(base), (lim >> 8) & 3); @@ -141,7 +141,7 @@ static void showconfig(int level, u8 which, u32 reg) { /* Don't use r_node() and r_link() here. */ - do_printk(level, "CONFIG(%02x)%02x-%02x ->(%d,%d),%s %s (%s numbers)\n", + printk(level, "CONFIG(%02x)%02x-%02x ->(%d,%d),%s %s (%s numbers)\n", which, BITS(reg, 16, 0xff), BITS(reg, 24, 0xff), BITS(reg, 4, 0x7), BITS(reg, 8, 0x3), re(reg), we(reg), @@ -161,7 +161,7 @@ */ static void showpciio(int level, u8 which, u32 base, u32 lim) { - do_printk(level, "PCIIO(%02x)%07x-%07x, ->(%d,%d), %s, %s,VGA %d ISA %d\n", + printk(level, "PCIIO(%02x)%07x-%07x, ->(%d,%d), %s, %s,VGA %d ISA %d\n", which, BITS(base, 12, 0x3fff) << 12, (BITS(lim, 12, 0x3fff) << 12) + 0xfff, r_node(lim), r_link(lim), re(base), we(base), BITS(base, 4, 0x1), BITS(base, 5, 0x1)); @@ -180,7 +180,7 @@ */ static void showmmio(int level, u8 which, u32 base, u32 lim) { - do_printk(level, "MMIO(%02x)%010llx-%010llx, ->(%d,%d), %s, %s, " + printk(level, "MMIO(%02x)%010llx-%010llx, ->(%d,%d), %s, %s, " "CPU disable %d, Lock %d, Non posted %d\n", which, ((u64) BITS(base, 0, 0xffffff00)) << 8, (((u64) BITS(lim, 0, 0xffffff00)) << 8) + 0xffff, r_node(lim),

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build service results for r5331
by coreboot information 30 Mar '10

30 Mar '10

Dear coreboot readers! This is the automatic build system of coreboot. The developer "stepan" checked in revision 5331 to the coreboot repository. This caused the following changes: Change Log: drop USE_INIT from mainboard Kconfig files, it's already set in src/Kconfig Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Build Log: Compilation of asus:p2b-d is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5331&device=p2b-d&vendor=a… Compilation of asus:p2b-ds is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5331&device=p2b-ds&vendor=… If something broke during this checkin please be a pain in stepan's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot March 2010