coreboot August 2009

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61 participants
356 discussions

[PATCH] various things to aid with CBFS on PPC, plus...
by Patrick Georgi 20 Aug '09

20 Aug '09

Hi, 20090819-2-trim-down-cbfs: CBFS uses sprintf, which requires vtxprintf, which requires (in the current design) a nested function. That works on x86, but on PPC this requires a trampoline. In the ROM stage, this is not available, so remove the single use of sprintf and replace it with a direct string handler - it's only used to fill in fixed-length hex values. 20090819-3-more-noreturns-in-romcc: Mark two more functions in romcc as noreturn. Helps clang's scan-build a bit 20090819-4-cbfsify-ppc: Make PPC use CBFS. Support big endian ELF in cbfs-mkstage. Untested and not complete yet. 20090819-5-fix-ppc-build: The CBFS build system requires ROM_IMAGE_SIZE to have a somewhat plausible value. All of them are Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

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patch: via parts
by ron minnich 20 Aug '09

20 Aug '09

See patch ron

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initial Kconfig support for epia-n and via CPUs
by ron minnich 19 Aug '09

19 Aug '09

This is not right, yet. But I could use a few comments. one thing it does get right is the Makefile.inc for the CPUs, which is done incorrectly in the tree (as is Intel, still, which I will try to fix soon). I have a question about the mainboard stuff. We want mainboard Kconfig files in the mainboards, not in the next-level-up directory. But I don't know how to get choice to work in the expected way. Please see src/mainboard/via/Kconfig and src/via/mainboard/*/Kconfig to see what I mean. attached. ron

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build service results for r4557
by coreboot information 19 Aug '09

19 Aug '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "myles" checked in revision 4557 to the coreboot repository. This caused the following changes: Change Log: Add an error message if there is a zero-sized fixed resource. Fix the existing example of one. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Build Log: Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4557&device=ep405pc&vendor… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4557&device=sandpointx3_al… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4557&device=briq&vendor=to… If something broke during this checkin please be a pain in myles's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[PATCH]The resource allocator does not like zero-sized fixed resources
by Patrick Georgi 19 Aug '09

19 Aug '09

Hi, attached patch fixes a small issue with the resource allocator. In a loop in which only fixed resources are processed, zero-sized resources were able to modify the limits used for resource allocation in a later phase. This leads to overlapping resources on kontron. I had a patch for that a while ago already, but this one is much cleaner and much more obvious in its intent. If you think there shouldn't be zero-sized fixed resources, please take a look at src/devices/pci_device.c, line 331. There, a fixed resource with no size is created, and there is no obvious value to set for size. Even if there shouldn't be such resources, I think it's still good to prevent them from causing trouble if they appear. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>

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[v2] r4557 - trunk/coreboot-v2/src/devices
by svn＠coreboot.org 19 Aug '09

19 Aug '09

Author: myles Date: 2009-08-19 21:12:39 +0200 (Wed, 19 Aug 2009) New Revision: 4557 Modified: trunk/coreboot-v2/src/devices/device.c trunk/coreboot-v2/src/devices/pci_device.c Log: Add an error message if there is a zero-sized fixed resource. Fix the existing example of one. Signed-off-by: Myles Watson <mylesgw(a)gmail.com> Acked-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Modified: trunk/coreboot-v2/src/devices/device.c =================================================================== --- trunk/coreboot-v2/src/devices/device.c 2009-08-19 17:29:41 UTC (rev 4556) +++ trunk/coreboot-v2/src/devices/device.c 2009-08-19 19:12:39 UTC (rev 4557) @@ -556,8 +556,12 @@ /* Constrain limits based on the fixed resources of this device. */ for (i = 0; i < dev->resources; i++) { res = &dev->resource[i]; - if (!res->size) + if (!res->size) { + /* It makes no sense to have 0-sized, fixed resources.*/ + printk_err("skipping %s@%lx fixed resource, size=0!\n", + dev_path(dev), res->index); continue; + } if (!(res->flags & IORESOURCE_FIXED)) continue; Modified: trunk/coreboot-v2/src/devices/pci_device.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_device.c 2009-08-19 17:29:41 UTC (rev 4556) +++ trunk/coreboot-v2/src/devices/pci_device.c 2009-08-19 19:12:39 UTC (rev 4557) @@ -332,6 +332,8 @@ * inited by driver_pci_onboard_ops::enable_dev() */ if ((dev->on_mainboard) && (dev->rom_address != 0)) { resource->base = dev->rom_address; + /* The resource allocator needs the size to be non-zero. */ + resource->size = 0x100; resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; }

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build service results for r4556
by coreboot information 19 Aug '09

19 Aug '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "oxygene" checked in revision 4556 to the coreboot repository. This caused the following changes: Change Log: Don't let zero sized fixed resource mess up the allocator's memory map. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Build Log: Compilation of embeddedplanet:ep405pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4556&device=ep405pc&vendor… Compilation of motorola:sandpointx3_altimus_mpc7410 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4556&device=sandpointx3_al… Compilation of totalimpact:briq is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4556&device=briq&vendor=to… If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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[v2] r4556 - trunk/coreboot-v2/src/devices
by svn＠coreboot.org 19 Aug '09

19 Aug '09

Author: oxygene Date: 2009-08-19 19:29:41 +0200 (Wed, 19 Aug 2009) New Revision: 4556 Modified: trunk/coreboot-v2/src/devices/device.c Log: Don't let zero sized fixed resource mess up the allocator's memory map. Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/coreboot-v2/src/devices/device.c =================================================================== --- trunk/coreboot-v2/src/devices/device.c 2009-08-19 14:08:42 UTC (rev 4555) +++ trunk/coreboot-v2/src/devices/device.c 2009-08-19 17:29:41 UTC (rev 4556) @@ -556,6 +556,8 @@ /* Constrain limits based on the fixed resources of this device. */ for (i = 0; i < dev->resources; i++) { res = &dev->resource[i]; + if (!res->size) + continue; if (!(res->flags & IORESOURCE_FIXED)) continue;

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Question about how CoreBoot handles Option ROM
by Jeffrey C. Jacobs 19 Aug '09

19 Aug '09

I was wondering if someone could point me to the right direction in terms of where in CoreBoot is are the various system Option ROMs copied. As I understand it, Option ROMs are generally found by probing the PCI bus and copied into RAM so that they can be handled by INT13 requests. So, I'd like to know what part of the code handles that and also how the memory map of those copied addresses are laid out. Thanks in advance, Jeffrey -- ~,-;` The TimeHorse

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Re: [coreboot] alix1d_lab_question
by ron minnich 19 Aug '09

19 Aug '09

This email is not working from google: Oliver Niesner <oli(a)servebbs.net> On Wed, Aug 19, 2009 at 9:25 AM, ron minnich<rminnich(a)gmail.com> wrote: > actually, the guy who builds the alix is incredibly open and would > probably release ACPI tables to you > > ron >

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coreboot August 2009