coreboot June 2009

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500 discussions

Re: [coreboot] [dbm690t] The new acpi table doesn't seem to be correct.
by Bao, Zheng 04 Jun '09

04 Jun '09

Sorry, I set HIVE_HIGH_TABLES=0 not 1. Please delete my last mail. Based on my test, if I set HIVE_HIGH_TABLES=0 in northbridge/amd/amdk8/Config.lb, Linux will not crash and ACPI works well. Note. I use the old version filo without libpayload. Zheng -----Original Message----- From: Bao, Zheng Sent: Thursday, June 04, 2009 10:46 AM To: 'Carl-Daniel Hailfinger' Cc: 'coreboot(a)coreboot.org' Subject: RE: [coreboot] [dbm690t] The new acpi table doesn't seem to be correct. Based on my test, if I set HIVE_HIGH_TABLES=1 in northbridge/amd/amdk8/Config.lb, Linux will not crash and ACPI works well. Note. I use the old version filo without libpayload. Zheng -----Original Message----- From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] Sent: Thursday, June 04, 2009 10:42 AM To: Bao, Zheng Cc: coreboot(a)coreboot.org Subject: Re: [coreboot] [dbm690t] The new acpi table doesn't seem to be correct. I found the HIGH_TABLES bug on the DBM690T. The K8 HIGH_TABLES code places these tables in UMA video memory. Of course that memory is cleared by some payloads and operating systems. However, if I fix that, Linux still crashes during boot because it only sees 32 MB instead of 2 MB RAM. If I disable high tables completely, Linux complains about corrupt ACPI tables and other stuff. Has the tables code been tested recently if it works even in the case where we don't want high tables? Regards, Carl-Daniel -- http://www.hailfinger.org/

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[patch] some obvious bugs in rs690
by Bao, Zheng 04 Jun '09

04 Jun '09

This patch is about some noticeable bugs which are made by no reason. 1. In rs690_cmn.c, mask the lower 4 bits of the BAR3. No doubt, right? 2. In rs690_pcie.c, (1) Obviously, the mask should be 0xF, and bit 19 should be set to 1 (in comment). In rpr 5.10.2, step 2, step 2.1 & step 2.6 (2) The dynamic buffer allocation is enabled by setting bit 11 of PCIEIND: 0x20, instead of PCIEIND_P: 0x20. In rpr 5.10.2, step 5. Dynamic Slave CPL Buffer Allocation Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> ------------------ diff -Nuar -x .svn ./src/southbridge/amd/rs690/rs690_cmn.c ../coreboot-v2-current/src/southbridge/amd/rs690/rs690_cmn.c --- ./src/southbridge/amd/rs690/rs690_cmn.c 2009-05-12 17:32:24.000000000 +0800 +++ ../coreboot-v2-current/src/southbridge/amd/rs690/rs690_cmn.c 2009-06-02 16:58:01.000000000 +0800 @@ -49,7 +49,7 @@ u32 pci_ext_read_config32(device_t nb_dev, device_t dev, u32 reg) { /*get BAR3 base address for nbcfg0x1c */ - u32 addr = pci_read_config32(nb_dev, 0x1c); + u32 addr = pci_read_config32(nb_dev, 0x1c) & ~0xF; printk_debug("addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary, dev->path.pci.devfn); addr |= dev->bus->secondary << 20 | /* bus num */ @@ -62,7 +62,7 @@ u32 reg_old, reg; /*get BAR3 base address for nbcfg0x1c */ - u32 addr = pci_read_config32(nb_dev, 0x1c); + u32 addr = pci_read_config32(nb_dev, 0x1c) & ~0xF; /*printk_debug("write: addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary, dev->path.pci.devfn);*/ addr |= dev->bus->secondary << 20 | /* bus num */ diff -Nuar -x .svn ./src/southbridge/amd/rs690/rs690_pcie.c ../coreboot-v2-current/src/southbridge/amd/rs690/rs690_pcie.c --- ./src/southbridge/amd/rs690/rs690_pcie.c 2009-06-03 12:01:42.000000000 +0800 +++ ../coreboot-v2-current/src/southbridge/amd/rs690/rs690_pcie.c 2009-06-03 14:40:00.000000000 +0800 @@ -212,8 +212,8 @@ set_pcie_enable_bits(nb_dev, 0x02 | PCIE_CORE_INDEX_GPPSB, 1 << 0, 1 << 0); /* no description in datasheet. */ /* init GPPSB port */ - /* Sets RCB timeout to be 100ms by setting bits[18:16] to 3 b101 and shortens the enumeration timer by setting bit[19] to 0*/ - set_pcie_enable_bits(dev, 0x70, 7 << 16, 0xd << 16); + /* Sets RCB timeout to be 100ms by setting bits[18:16] to 3 b101 and shortens the enumeration timer by setting bit[19] to 1*/ + set_pcie_enable_bits(dev, 0x70, 0xF << 16, 0xd << 16); /* PCIE initialization 5.10.2: rpr 2.4 */ set_pcie_enable_bits(dev, 0x02, ~0xffffffff, 1 << 14); /* Do not gate the electrical idle from the PHY and enables the escape from L1L23 */ @@ -240,7 +240,7 @@ } /* step 5: dynamic slave CPL buffer allocation */ - set_pcie_enable_bits(dev, 0x20, 1 << 11, 1 << 11); + set_pcie_enable_bits(nb_dev, 0x20 | PCIE_CORE_INDEX_GPPSB, 1 << 11, 1 << 11); /* step 5a: Training for GPP devices */ /* init GPP */

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[v2] r4336 - trunk/coreboot-v2/src/southbridge/amd/rs690
by svn＠coreboot.org 04 Jun '09

04 Jun '09

Author: zbao Date: 2009-06-04 03:57:03 +0200 (Thu, 04 Jun 2009) New Revision: 4336 Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c Log: This patch is about some noticable bugs which was made by no reason. 1. In rs690_cmn.c, mask the lower 4 bits of the BAR3. No doubt, right? 2. In rs690_pcie.c, (1) Obviously, the mask should be 0xF, and bit 19 should be set to 1 (in comment). In rpr 5.10.2, step 2, step 2.1 & step 2.6 (2) The dynamic buffer allocation is enabled by setting bit 11 of PCIEIND: 0x20, instead of PCIEIND_P: 0x20. In rpr 5.10.2, step 5. Dynamic Slave CPL Buffer Allocation Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c 2009-06-03 14:19:33 UTC (rev 4335) +++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c 2009-06-04 01:57:03 UTC (rev 4336) @@ -49,7 +49,7 @@ u32 pci_ext_read_config32(device_t nb_dev, device_t dev, u32 reg) { /*get BAR3 base address for nbcfg0x1c */ - u32 addr = pci_read_config32(nb_dev, 0x1c); + u32 addr = pci_read_config32(nb_dev, 0x1c) & ~0xF; printk_debug("addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary, dev->path.pci.devfn); addr |= dev->bus->secondary << 20 | /* bus num */ @@ -62,7 +62,7 @@ u32 reg_old, reg; /*get BAR3 base address for nbcfg0x1c */ - u32 addr = pci_read_config32(nb_dev, 0x1c); + u32 addr = pci_read_config32(nb_dev, 0x1c) & ~0xF; /*printk_debug("write: addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary, dev->path.pci.devfn);*/ addr |= dev->bus->secondary << 20 | /* bus num */ Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c =================================================================== --- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c 2009-06-03 14:19:33 UTC (rev 4335) +++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_pcie.c 2009-06-04 01:57:03 UTC (rev 4336) @@ -212,8 +212,8 @@ set_pcie_enable_bits(nb_dev, 0x02 | PCIE_CORE_INDEX_GPPSB, 1 << 0, 1 << 0); /* no description in datasheet. */ /* init GPPSB port */ - /* Sets RCB timeout to be 100ms by setting bits[18:16] to 3 b101 and shortens the enumeration timer by setting bit[19] to 0*/ - set_pcie_enable_bits(dev, 0x70, 7 << 16, 0xd << 16); + /* Sets RCB timeout to be 100ms by setting bits[18:16] to 3 b101 and shortens the enumeration timer by setting bit[19] to 1*/ + set_pcie_enable_bits(dev, 0x70, 0xF << 16, 0xd << 16); /* PCIE initialization 5.10.2: rpr 2.4 */ set_pcie_enable_bits(dev, 0x02, ~0xffffffff, 1 << 14); /* Do not gate the electrical idle from the PHY and enables the escape from L1L23 */ @@ -240,7 +240,7 @@ } /* step 5: dynamic slave CPL buffer allocation */ - set_pcie_enable_bits(dev, 0x20, 1 << 11, 1 << 11); + set_pcie_enable_bits(nb_dev, 0x20 | PCIE_CORE_INDEX_GPPSB, 1 << 11, 1 << 11); /* step 5a: Training for GPP devices */ /* init GPP */

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Re: [coreboot] [flashrom] r568 - trunk
by Idwer Vollering 03 Jun '09

03 Jun '09

2009/6/3 <svn(a)coreboot.org> > Author: libv > Date: 2009-06-03 09:50:39 +0200 (Wed, 03 Jun 2009) > New Revision: 568 > > Modified: > trunk/board_enable.c > Log: > Board enable: Gigabyte GA K8N SLI. > > Raises bits 0 and 2 on offset 0xE1 in the system control area of the > nvidia ck804 lpc. > > Signed-off-by: Luc Verhaegen <libv(a)skynet.be> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > Acked-by: Alexander Gordeev <lasaine(a)lvk.cs.msu.su> > > > Modified: trunk/board_enable.c > =================================================================== > --- trunk/board_enable.c 2009-06-02 19:54:22 UTC (rev 567) > +++ trunk/board_enable.c 2009-06-03 07:50:39 UTC (rev 568) > @@ -372,6 +372,31 @@ > return 0; > } > > +/** > + * Suited for the Gigabyte GA-K8N-SLI: CK804 southbridge. > + */ > +static int board_ga_k8n_sli(const char *name) > +{ > + struct pci_dev *dev; > + uint32_t base; > + uint8_t tmp; > + > + dev = pci_dev_find(0x10DE, 0x0050); /* NVIDIA CK804 LPC */ > + if (!dev) { > + fprintf(stderr, "\nERROR: NVIDIA LPC bridge not found.\n"); > + return -1; > + } > + > + base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control > area */ > + > + /* if anyone knows more about nvidia lpcs, feel free to explain > this */ > + tmp = inb(base + 0xE1); > + tmp |= 0x05; > + outb(tmp, base + 0xE1); > + > + return 0; > +} > + > static int board_hp_dl145_g3_enable(const char *name) > { > /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ > @@ -670,6 +695,7 @@ > {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, > "epox", "ep-bx3", "EPoX", "EP-BX3", > board_epox_ep_bx3}, > {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, > "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", > it87xx_probe_spi_flash}, > {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, > NULL, NULL, "GIGABYTE", "GA-7VT600", > board_biostar_p4m80_m4}, > + {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, > NULL, NULL, "GIGABYTE", "GA-K8N-SLI", > board_ga_k8n_sli}, > {0x10de, 0x0360, 0, 0, 0, 0, 0, 0, > "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", > it87xx_probe_spi_flash}, > {0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, > "gigabyte", "m61p", "GIGABYTE", "GA-M61P-S3", > it87xx_probe_spi_flash}, > {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, > NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", > it87xx_probe_spi_flash}, > @@ -787,7 +813,6 @@ > { "Boser", "HS-6637", }, > { "DFI", "855GME-MGF", }, > { "FIC", "VA-502", }, > - { "GIGABYTE", "GA-K8N-SLI", }, > { "MSI", "MS-6178", }, > { "MSI", "MS-7260 (K9N Neo)", }, > { "PCCHIPS", "M537DMA33", }, > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot Make FreeBSD's gmake happy. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Index: board_enable.c =================================================================== --- board_enable.c (revision 568) +++ board_enable.c (working copy) @@ -390,9 +390,9 @@ base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ /* if anyone knows more about nvidia lpcs, feel free to explain this */ - tmp = inb(base + 0xE1); + tmp = INB(base + 0xE1); tmp |= 0x05; - outb(tmp, base + 0xE1); + OUTB(tmp, base + 0xE1); return 0; }

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[flashrom] r570 - trunk
by svn＠coreboot.org 03 Jun '09

03 Jun '09

Author: hailfinger Date: 2009-06-03 18:41:11 +0200 (Wed, 03 Jun 2009) New Revision: 570 Modified: trunk/board_enable.c Log: Use macros for inb and outb which were forgotten in r568. This makes FreeBSD happy. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-06-03 14:46:22 UTC (rev 569) +++ trunk/board_enable.c 2009-06-03 16:41:11 UTC (rev 570) @@ -390,9 +390,9 @@ base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ /* if anyone knows more about nvidia lpcs, feel free to explain this */ - tmp = inb(base + 0xE1); + tmp = INB(base + 0xE1); tmp |= 0x05; - outb(tmp, base + 0xE1); + OUTB(tmp, base + 0xE1); return 0; }

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Re: [coreboot] [v2] r4335 - in trunk/coreboot-v2: src/console src/cpu/amd/dualcore src/cpu/amd/model_fxx src/cpu/amd/quadcore src/cpu/intel/hyperthreading src/include/console src/include/pc80 src/mainboard/amd/dbm690t src/mainboard/amd/pistachio src/mainboard/amd/serengeti_cheetah src/mainboard/amd/serengeti_cheetah_fam10 src/mainboard/arima/hdama src/mainboard/asus/a8n_e src/mainboard/asus/a8v-e_se src/mainboard/asus/m2v-mx_se src/mainboard/broadcom/blast src/mainboard/dell/s1850 src/mainboard/gigabyte/ga_
by Luc Verhaegen 03 Jun '09

03 Jun '09

On Wed, Jun 03, 2009 at 04:19:34PM +0200, svn(a)coreboot.org wrote: > Author: libv > Date: 2009-06-03 16:19:33 +0200 (Wed, 03 Jun 2009) > New Revision: 4335 > > Modified: > Log: > Revert "CMOS: Add set_option and rework get_option." > > This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. > > Stepan pointed out that "s" means string, which makes the following statement > in this commit message invalid: "Since we either have reserved space (which > we shouldn't do anything with in these two functions), an enum or a > hexadecimal value, unsigned int seemed like the way to go." > > Signed-off-by: Luc Verhaegen <libv(a)skynet.be> > Acked-by: Luc Verhaegen <libv(a)skynet.be> Not to minimise my own part in this mess, but; several people found it necessary to chime in on a brainfart of mine, but only Peter spent the time reviewing this patch. If people had spent some time reviewing this, then maybe the wrong assumption would've been caught in time. Instead, several people, some of whom should have intimate enough knowledge of the cmos handling, found it necessary to weigh in on a discussion where it was clear that the person who started it (me) wasn't intending on putting his weight behind any code in the very near future anyway. The code that was actually there did get ignored, and with one ACK in the pocket, it ended up getting committed, with this mess as a result. This is where this whole acking system breaks down, and no tool, which will incur even more overhead and less willingness to review, will help, it will only make things worse. And another thing: the option table building tool is some of the worst examples of C code that i have seen in quite a while. Whatever option handling stuff you (whoever you are) are thinking up now, know that it also needs to be implemented, and properly this time, and you better be prepared to do so by yourself. Yes, i am quite miffed. I care about the code i produce and i spent quite some time on this patch, cleaning up several things that weren't ever given a single thought before, providing an actually working integer bit retrieval, trying hard to cover all angles, but apparently i still missed one. So what i got in return is 1 big commit, 1 build breakage with shortly after the fixing commit, then both getting quickly reverted, and i rather dislike this. I do not like to see halfarsed or broken stuff going out, especially not if i am myself responsible for having produced the crap in the first place. Luc Verhaegen.

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build service results for r4335
by coreboot information 03 Jun '09

03 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "libv" checked in revision 4335 to the coreboot repository. This caused the following changes: Change Log: Revert "CMOS: Add set_option and rework get_option." This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Luc Verhaegen <libv(a)skynet.be> Build Log: Compilation of kontron:986lcd-m has been fixed If something broke during this checkin please be a pain in libv's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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Re: [coreboot] Flashrom jedec probe patch + AT29C010A logs
by Carl-Daniel Hailfinger 03 Jun '09

03 Jun '09

On 03.06.2009 00:58, Maciej Pijanka wrote: > On 03/06/2009, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> wrote: > >> If timing is not set (0), maybe fail as well? That would be accomplished >> by killing the above if branch and changing the message below to say >> "negative/ininitialized value". >> > > sure, but that will fail/skip silently most chips so we also should > change printf_debug to normal one otherwise nobody without -V notice > Yes! For the "not set" and the "negative value" case, this should definitely be printf, not printf_debug. > that they was skipped not probe failed > (maybe we need more than two levels of verbosity?) > > or some nice way to notify user when -V is not used something like > '%d chips probe were skipped, use -V to figure why' > I think your suggestion of using prinf instead of printf_debug is best. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[flashrom] r569 - trunk
by svn＠coreboot.org 03 Jun '09

03 Jun '09

Author: hailfinger Date: 2009-06-03 16:46:22 +0200 (Wed, 03 Jun 2009) New Revision: 569 Modified: trunk/flash.h trunk/flashchips.c trunk/jedec.c Log: Add probe_timing information (int uS value). This eliminates the conflicting delay requirements for old and new chips with the same probing sequence. Signed-Off-by: Maciej Pijanka <maciej.pijanka(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-06-03 07:50:39 UTC (rev 568) +++ trunk/flash.h 2009-06-03 14:46:22 UTC (rev 569) @@ -155,6 +155,9 @@ uint32_t tested; int (*probe) (struct flashchip *flash); + + /* Delay after "enter/exit ID mode" commands in microseconds. */ + int probe_timing; int (*erase) (struct flashchip *flash); int (*write) (struct flashchip *flash, uint8_t *buf); int (*read) (struct flashchip *flash, uint8_t *buf); @@ -182,6 +185,16 @@ #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) #define TEST_BAD_MASK 0xf0 +/* Timing used in probe routines. ZERO is -2 to differentiate between an unset + * field and zero delay. + * + * SPI devices will always have zero delay and ignore this field. + */ +#define TIMING_FIXME -1 +/* this is intentionally same value as fixme */ +#define TIMING_IGNORED -1 +#define TIMING_ZERO -2 + extern struct flashchip flashchips[]; struct penable { Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-06-03 07:50:39 UTC (rev 568) +++ trunk/flashchips.c 2009-06-03 14:46:22 UTC (rev 569) @@ -32,9 +32,10 @@ struct flashchip flashchips[] = { /* Vendor, Chip, Vendor ID, Chip ID, + * Bus Type, * Total size (kB), Page size (B), * Test status, - * Probe function, Erase function, Write function, Read function + * Probe function, Probe function timing argument, Erase function, Write function, Read function */ { @@ -47,6 +48,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -62,6 +64,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -77,6 +80,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -92,6 +96,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -107,6 +112,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -122,6 +128,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -137,6 +144,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -152,6 +160,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -407,7 +416,8 @@ .total_size = 64, .page_size = 128, .tested = TEST_OK_PREW, - .probe = probe_jedec, + .probe = probe_jedec, + .probe_timing = 10000, /* 10mS, Enter=Exec */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -424,6 +434,7 @@ .page_size = 128, .tested = TEST_OK_PRE, .probe = probe_jedec, + .probe_timing = 10000, /* 10mS, Enter=Exec */ .erase = erase_chip_jedec, .write = write_jedec, /* FIXME */ .read = read_memmapped, @@ -439,6 +450,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -454,6 +466,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -604,6 +617,7 @@ .page_size = 64, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -619,6 +633,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, /* doc1008.pdf dont says anything about probe timing */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -634,6 +649,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, /* doc1008.pdf dont says anything about probe timing */ .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -664,6 +680,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .erase = erase_29f002, .write = write_29f002, .read = read_memmapped, @@ -679,6 +696,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .erase = erase_29f002, .write = write_29f002, .read = read_memmapped, @@ -694,6 +712,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PR, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -709,6 +728,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_49fl00x, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, .read = read_memmapped, @@ -724,6 +744,7 @@ .page_size = 4096, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -739,6 +760,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -754,6 +776,7 @@ .page_size = 256, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_en29f002a, .read = read_memmapped, @@ -769,6 +792,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -784,6 +808,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -799,6 +824,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, .read = read_memmapped, @@ -814,6 +840,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, .read = read_memmapped, @@ -829,6 +856,7 @@ .page_size = 128 * 1024, /* 8k + 2x4k + 112k */ .tested = TEST_BAD_ERASE|TEST_BAD_WRITE, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -844,6 +872,7 @@ .page_size = 128 * 1024, /* 112k + 2x4k + 8k */ .tested = TEST_OK_PR|TEST_BAD_ERASE|TEST_BAD_WRITE, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -1054,6 +1083,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .erase = erase_29f002, .write = write_29f002, .read = read_memmapped, @@ -1069,6 +1099,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .erase = erase_29f002, .write = write_29f002, .read = read_memmapped, @@ -1084,6 +1115,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PR, .probe = probe_29f002, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ .erase = erase_29f002, .write = write_29f002, .read = read_memmapped, @@ -1264,6 +1296,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1279,6 +1312,7 @@ .page_size = 16 * 1024, .tested = TEST_OK_PREW, .probe = probe_49fl00x, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, .read = read_memmapped, @@ -1294,6 +1328,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_49fl00x, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .erase = erase_49fl00x, .write = write_49fl00x, .read = read_memmapped, @@ -1309,6 +1344,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_lhf00l04, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sharplhf00l04.c) */ .erase = erase_lhf00l04, .write = write_lhf00l04, .read = read_memmapped, @@ -1429,6 +1465,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_28sf040, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ .erase = erase_28sf040, .write = write_28sf040, .read = read_memmapped, @@ -1444,6 +1481,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -1459,6 +1497,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -1474,6 +1513,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -1489,6 +1529,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -1504,6 +1545,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1519,6 +1561,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1534,6 +1577,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1549,6 +1593,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1564,6 +1609,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1579,6 +1625,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1594,6 +1641,7 @@ .page_size = 4096, .tested = TEST_OK_PROBE, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1609,6 +1657,7 @@ .page_size = 4096, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -1624,6 +1673,7 @@ .page_size = 16 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -1639,6 +1689,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_sst_fwhub, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -1654,6 +1705,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -1669,6 +1721,7 @@ .page_size = 4 * 1024, .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, .write = write_49lfxxxc, .read = read_memmapped, @@ -1684,6 +1737,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -1699,6 +1753,7 @@ .page_size = 4 * 1024, .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, .write = write_49lfxxxc, .read = read_memmapped, @@ -1714,6 +1769,7 @@ .page_size = 4 * 1024, .tested = TEST_OK_PREW, .probe = probe_49lfxxxc, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, .write = write_49lfxxxc, .read = read_memmapped, @@ -1729,6 +1785,7 @@ .page_size = 16 * 1024, .tested = TEST_OK_PR, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_49lf040, .write = write_49lf040, .read = read_memmapped, @@ -1744,6 +1801,7 @@ .page_size = 16 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_49lf040, .write = write_49lf040, .read = read_memmapped, @@ -1759,6 +1817,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_49lf040, .write = write_49lf040, .read = read_memmapped, @@ -1774,6 +1833,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, + .probe_timing = TIMING_FIXME, /* routine is wrapper to probe_jedec (sst_fwhub.c) */ .erase = erase_sst_fwhub, .write = write_sst_fwhub, .read = read_memmapped, @@ -1789,6 +1849,7 @@ .page_size = 4096, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_49lf040, .write = write_49lf040, .read = read_memmapped, @@ -1804,6 +1865,7 @@ .page_size = 4 * 1024, .tested = TEST_OK_PREW, .probe = probe_49lfxxxc, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = erase_49lfxxxc, .write = write_49lfxxxc, .read = read_memmapped, @@ -1969,6 +2031,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_m29f002, .write = write_m29f002b, .read = read_memmapped, @@ -1984,6 +2047,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_m29f002, .write = write_m29f002t, .read = read_memmapped, @@ -1999,6 +2063,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_29f040b, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ .erase = erase_29f040b, .write = write_29f040b, .read = read_memmapped, @@ -2014,6 +2079,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, .read = read_memmapped, @@ -2029,6 +2095,7 @@ .page_size = 16 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2044,6 +2111,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2059,6 +2127,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_stm50flw0x0x, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, .read = read_memmapped, @@ -2074,6 +2143,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_stm50flw0x0x, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, .read = read_memmapped, @@ -2089,6 +2159,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_stm50flw0x0x, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, .read = read_memmapped, @@ -2104,6 +2175,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_stm50flw0x0x, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (stm50flw0x0x.c) */ .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, .read = read_memmapped, @@ -2119,6 +2191,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_49lfxxxc, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .erase = NULL, .write = NULL, .read = read_memmapped, @@ -2134,6 +2207,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_82802ab, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ .erase = erase_82802ab, .write = write_82802ab, .read = read_memmapped, @@ -2149,6 +2223,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_82802ab, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ .erase = erase_82802ab, .write = write_82802ab, .read = read_memmapped, @@ -2164,6 +2239,7 @@ .page_size = 64 * 1024, .tested = TEST_OK_PREW, .probe = probe_82802ab, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ .erase = erase_82802ab, .write = write_82802ab, .read = read_memmapped, @@ -2179,6 +2255,7 @@ .page_size = 64 * 1024, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2194,6 +2271,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2209,6 +2287,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2224,6 +2303,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2239,6 +2319,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2254,6 +2335,7 @@ .page_size = 16384, /* Non-uniform sectors */ .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -2269,6 +2351,7 @@ .page_size = 16384, /* Non-uniform sectors */ .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = NULL, .write = NULL, .read = read_memmapped, @@ -2344,6 +2427,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2359,6 +2443,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2374,6 +2459,7 @@ .page_size = 256, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2389,6 +2475,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_w29ee011, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */ .erase = erase_chip_jedec, .write = write_jedec, .read = read_memmapped, @@ -2404,6 +2491,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2419,6 +2507,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2434,6 +2523,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_w39v040c, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v040c.c) */ .erase = erase_w39v040c, .write = write_w39v040c, .read = read_memmapped, @@ -2449,6 +2539,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2464,6 +2555,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2479,6 +2571,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2494,6 +2587,7 @@ .page_size = 128, .tested = TEST_OK_PREW, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2509,6 +2603,7 @@ .page_size = 128, .tested = TEST_UNTESTED, .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .erase = erase_chip_jedec, .write = write_49f002, .read = read_memmapped, @@ -2524,6 +2619,7 @@ .page_size = 64*1024, .tested = TEST_OK_PREW, .probe = probe_winbond_fwhub, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, @@ -2539,6 +2635,7 @@ .page_size = 64*1024, .tested = TEST_UNTESTED, .probe = probe_winbond_fwhub, + .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w39v080fa.c) */ .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, .read = read_memmapped, Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2009-06-03 07:50:39 UTC (rev 568) +++ trunk/jedec.c 2009-06-03 14:46:22 UTC (rev 569) @@ -91,7 +91,23 @@ uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; + int probe_timing_enter, probe_timing_exit; + if (flash->probe_timing > 0) + probe_timing_enter = probe_timing_exit = flash->probe_timing; + else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */ + probe_timing_enter = probe_timing_exit = 0; + } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */ + printf_debug("Chip lacks correct probe timing information, " + "using default 10mS/40uS\n"); + probe_timing_enter = 10000; + probe_timing_exit = 40; + } else { + printf("Chip has negative value in probe_timing, failing " + "without chip access\n"); + return 0; + } + /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); myusec_delay(10); @@ -101,7 +117,7 @@ /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ - myusec_delay(10000); + myusec_delay(probe_timing_enter); /* Read product ID */ id1 = chip_readb(bios); @@ -127,7 +143,7 @@ chip_writeb(0x55, bios + 0x2AAA); myusec_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + myusec_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); if (!oddparity(id1))

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build service results for r4334
by coreboot information 03 Jun '09

03 Jun '09

Dear coreboot readers! This is the automatic build system of coreboot. The developer "libv" checked in revision 4334 to the coreboot repository. This caused the following changes: Change Log: Revert "kontron 986lcd_m: cmos.layout: mark boot_devices as reserved." This reverts commit c03527377db5951f0d3228e2a93b4c57dd81b8ec. Stepan pointed out that 's' means string, and that therefor strings do exist. Marking this as reserved breaks some payloads. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Luc Verhaegen <libv(a)skynet.be> Build Log: Compilation of kontron:986lcd-m has been broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4334&device=986lcd-m&vendo… If something broke during this checkin please be a pain in libv's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, coreboot automatic build system

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coreboot June 2009