coreboot June 2009

coreboot@coreboot.org

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[dbm690t] The new acpi table doesn't seem to be correct.
by Bao, Zheng 05 Jun '09

05 Jun '09

Hi, all, The new auto-generated acpi table doesn't seem to be correct on dbm690t. Dose anybody have any idea? Joe Please check the dmesg: Booting 'Ubuntu 8.04, kernel 2.6.24-amd2-generic-serial' root (hd0,0) kernel /boot/vmlinuz-2.6.24-amd2-generic root=UUID=7bb9e8a5-cbc0-4104-92a3-628 f56924494 ro console=ttyS0,115200 initrd /boot/initrd.img-2.6.24-amd2-generic Booting 'hda1:/boot/vmlinuz-2.6.24-amd2-generic root=UUID=7bb9e8a5-cbc0-4104-92 a3-628f56924494 ro console=ttyS0,115200 initrd=/boot/initrd.img-2.6.24-amd2-gen eric' Mounted EXT2 filesystem Mounted EXT2 filesystem Found Linux version 2.6.24-amd2-generic (root@forsteri) #1 SMP Tue Jul 15 22:02:29 UTC 2008 bzI mage. Loading kernel... ok Loading initrd... ok Jumping to entry point... [ 0.000000] Linux version 2.6.24-amd2-generic (root@forsteri) (gcc version 4.2.3 (Ubuntu 4.2 .3-2ubuntu7)) #1 SMP Tue Jul 15 22:02:29 UTC 2008 (Ubuntu 2.6.24-amd2.2-generic) [ 0.000000] Command line: root=UUID=7bb9e8a5-cbc0-4104-92a3-628f56924494 ro console=ttyS0,11 5200 [ 0.000000] BIOS-provided physical RAM map: [ 0.000000] BIOS-e820: 0000000000000000 - 00000000000a0000 (usable) [ 0.000000] BIOS-e820: 0000000000100000 - 0000000004000000 (usable) [ 0.000000] end_pfn_map = 16384 [ 0.000000] DMI not present or invalid. [ 0.000000] ACPI: RSDP signature @ 0xFFFF8100000F0400 checksum 0 [ 0.000000] ACPI: RSDP 000F0400, 0024 (r2 CORE ) [ 0.000000] Scanning NUMA topology in Northbridge 24 [ 0.000000] CPU has 2 num_cores [ 0.000000] No NUMA configuration found [ 0.000000] Faking a node at 0000000000000000-0000000004000000 [ 0.000000] Bootmem setup node 0 0000000000000000-0000000004000000 [ 0.000000] Zone PFN ranges: [ 0.000000] DMA 0 -> 4096 [ 0.000000] DMA32 4096 -> 1048576 [ 0.000000] Normal 1048576 -> 1048576 [ 0.000000] Movable zone start PFN for each node [ 0.000000] early_node_map[2] active PFN ranges [ 0.000000] 0: 0 -> 160 [ 0.000000] 0: 256 -> 16384 [ 0.000000] ATI board detected. Disabling timer routing over 8254. [ 0.000000] Intel MultiProcessor Specification v1.4 [ 0.000000] MPTABLE: OEM ID: ATI MPTABLE: Product ID: DBM690T MPTABLE: APIC at: 0x FEE00000 [ 0.000000] Processor #0 (Bootup-CPU) [ 0.000000] Processor #1 [ 0.000000] I/O APIC #2 at 0xFEC00000. [ 0.000000] Setting APIC routing to flat [ 0.000000] Processors: 2 [ 0.000000] swsusp: Registered nosave memory region: 00000000000a0000 - 0000000000100000 [ 0.000000] Allocating PCI resources starting at 10000000 (gap: 4000000:fc000000) [ 0.000000] SMP: Allowing 2 CPUs, 0 hotplug CPUs [ 0.000000] PERCPU: Allocating 34656 bytes of per cpu data [ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 14857 [ 0.000000] Policy zone: DMA32 [ 0.000000] Kernel command line: root=UUID=7bb9e8a5-cbc0-4104-92a3-628f56924494 ro console=t tyS0,115200 [ 0.000000] Initializing CPU#0 [ 0.000000] PID hash table entries: 256 (order: 8, 2048 bytes) [ 0.000000] TSC calibrated against PIT [ 0.000000] Marking TSC unstable due to TSCs unsynchronized [ 0.000000] time.c: Detected 2100.115 MHz processor. [ 0.000000] Console: colour VGA+ 80x25 [ 0.000000] console [ttyS0] enabled [ 0.000000] Checking aperture... [ 0.000000] CPU 0: aperture @ f8000000 size 64 MB [ 0.000000] Memory: 51848k/65536k available (2466k kernel code, 13304k reserved, 1313k data, 316k init) [ 0.000000] SLUB: Genslabs=12, HWalign=64, Order=0-1, MinObjects=4, CPUs=2, Nodes=1 [ 0.000000] Calibrating delay using timer specific routine.. 4203.67 BogoMIPS (lpj=8407353) [ 0.000000] Security Framework initialized [ 0.000000] SELinux: Disabled at boot. [ 0.000000] AppArmor: AppArmor initialized [ 0.000000] Failure registering capabilities with primary security module. [ 0.000000] Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.000000] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes) [ 0.000000] Mount-cache hash table entries: 256 [ 0.000000] CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) [ 0.000000] CPU: L2 Cache: 512K (64 bytes/line) [ 0.000000] CPU 0/0 -> Node 0 [ 0.000000] CPU: Physical Processor ID: 0 [ 0.000000] CPU: Processor Core ID: 0 [ 0.000000] SMP alternatives: switching to UP code [ 0.000000] Early unpacking initramfs... done [ 0.000000] ACPI: Core revision 20070126 [ 0.000000] ACPI Exception (tbxface-0629): AE_NO_ACPI_TABLES, While loading namespace from A CPI tables [20070126] [ 0.000000] ACPI: Unable to load the System Description Tables [ 0.000000] ExtINT not setup in hardware but reported by MP table [ 0.000000] Using local APIC timer interrupts. [ 0.000000] Detected 12.500 MHz APIC timer. [ 0.000000] SMP alternatives: switching to SMP code [ 0.000000] Booting processor 1/2 APIC 0x1 [ 0.000000] Initializing CPU#1 [ 0.000000] Calibrating delay using timer specific routine.. 4200.24 BogoMIPS (lpj=8400480) [ 0.000000] CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) [ 0.000000] CPU: L2 Cache: 512K (64 bytes/line) [ 0.000000] CPU 1/1 -> Node 0 [ 0.000000] CPU: Physical Processor ID: 0 [ 0.000000] CPU: Processor Core ID: 1 [ 0.000000] AMD Turion(tm) 64 X2 Mobile Technology TL-62 stepping 02 [ 0.000000] Brought up 2 CPUs [ 0.000000] net_namespace: 120 bytes [ 0.000000] Time: 4:46:48 Date: 04/13/09 [ 0.000000] NET: Registered protocol family 16 [ 0.000000] PCI: Using configuration type 1 [ 0.000000] ACPI: Interpreter disabled. [ 0.000000] Linux Plug and Play Support v0.97 (c) Adam Belay [ 0.000000] pnp: PnP ACPI: disabled [ 0.000000] PCI: Probing PCI hardware [ 0.000000] pci 0000:00:12.0: set SATA to AHCI mode [ 0.000000] PCI: Transparent bridge - 0000:00:14.4 [ 0.000000] PCI: Using IRQ router default [1002/4384] at 0000:00:14.4 [ 0.000000] PCI: Cannot allocate resource region 0 of device 0000:05:00.0 [ 0.000000] NET: Registered protocol family 8 [ 0.000000] NET: Registered protocol family 20 [ 0.000000] AppArmor: AppArmor Filesystem Enabled [ 0.000000] PCI: Bridge: 0000:00:01.0 [ 0.000000] IO window: 1000-1fff [ 0.000000] MEM window: fc000000-fc1fffff [ 0.000000] PREFETCH window: f0000000-f7ffffff [ 0.000000] PCI: Bridge: 0000:00:04.0 [ 0.000000] IO window: disabled. [ 0.000000] MEM window: disabled. [ 0.000000] PREFETCH window: disabled. [ 0.000000] PCI: Bridge: 0000:00:05.0 [ 0.000000] IO window: disabled. [ 0.000000] MEM window: disabled. [ 0.000000] PREFETCH window: disabled. [ 0.000000] PCI: Bridge: 0000:00:06.0 [ 0.000000] IO window: disabled. [ 0.000000] MEM window: disabled. [ 0.000000] PREFETCH window: disabled. [ 0.000000] PCI: Bridge: 0000:00:07.0 [ 0.000000] IO window: disabled. [ 0.000000] MEM window: 10000000-100fffff [ 0.000000] PREFETCH window: disabled. [ 0.000000] PCI: Bridge: 0000:00:14.4 [ 0.000000] IO window: disabled. [ 0.000000] MEM window: disabled. [ 0.000000] PREFETCH window: disabled. [ 0.000000] PCI: Enabling device 0000:00:07.0 (0000 -> 0002) [ 0.000000] NET: Registered protocol family 2 [ 0.000000] IP route cache hash table entries: 512 (order: 0, 4096 bytes) [ 0.000000] TCP established hash table entries: 2048 (order: 3, 32768 bytes) [ 0.000000] TCP bind hash table entries: 2048 (order: 3, 32768 bytes) [ 0.000000] TCP: Hash tables configured (established 2048 bind 2048) [ 0.000000] TCP reno registered [ 0.000000] checking if image is initramfs... it is [ 0.000000] Freeing initrd memory: 7452k freed [ 0.000000] audit: initializing netlink socket (disabled) [ 0.000000] audit(1239598008.456:1): initialized [ 0.000000] VFS: Disk quotas dquot_6.5.1 [ 0.000000] Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.000000] io scheduler noop registered [ 0.000000] io scheduler anticipatory registered [ 0.000000] io scheduler deadline registered [ 0.000000] io scheduler cfq registered (default) [ 0.000000] assign_interrupt_mode Found MSI capability [ 0.000000] assign_interrupt_mode Found MSI capability [ 0.000000] assign_interrupt_mode Found MSI capability [ 0.000000] assign_interrupt_mode Found MSI capability [ 0.000000] Real Time Clock Driver v1.12ac [ 0.000000] Linux agpgart interface v0.102 [ 0.000000] Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled [ 0.000000] serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A [ 0.000000] RAMDISK driver initialized: 16 RAM disks of 65536K size 1024 blocksize [ 0.000000] input: Macintosh mouse button emulation as /devices/virtual/input/input0 [ 0.000000] PNP: No PS/2 controller found. Probing ports directly. [ 0.000000] serio: i8042 KBD port at 0x60,0x64 irq 1 [ 0.000000] serio: i8042 AUX port at 0x60,0x64 irq 12 [ 0.000000] mice: PS/2 mouse device common for all mice [ 0.000000] cpuidle: using governor ladder [ 0.000000] cpuidle: using governor menu [ 0.000000] NET: Registered protocol family 1 [ 0.000000] registered taskstats version 1 [ 0.000000] Magic number: 5:620:767 [ 0.000000] hash matches device ptyp3 [ 0.000000] /root/build/ubuntu/linux-source/linux-source/drivers/rtc/hctosys.c: unable to op en rtc device (rtc0) [ 0.000000] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found [ 0.000000] EDD information not available. [ 0.000000] Freeing unused kernel memory: 316k freed Loading, please wait... Begin: Loading essential drivers... ... [ 0.000000] thermal: Unknown symbol acpi_processor_set_thermal_limit Done. Begin: Running /scripts/init-premount ... Done. Begin: Mounting root file system... ... Begin: Running /scripts/local-top ... Done. [ 0.000000] tg3.c:v3.86 (November 9, 2007) Begin: Waiting f[ 0.000000] PCI: Enabling device 0000:05:00.0 (0000 -> 0002) or root file sys[ 0.000000] PCI: No IRQ known for interrupt pin A of device 0000:05:00.0. Pr obably buggy MP table. tem... ... [ 0.000000] SCSI subsystem initialized [ 0.000000] tg3: eth%d: Cannot get nvarm lock, tg3_nvram_init failed. [ 0.000000] tg3: (0000:05:00.0) phy probe failed, err -19 [ 0.000000] tg3: Problem fetching invariants of chip, aborting. [ 0.000000] usbcore: registered new interface driver usbfs [ 0.000000] usbcore: registered new interface driver hub [ 0.000000] usbcore: registered new device driver usb [ 0.000000] scsi0 : pata_atiixp [ 0.000000] scsi1 : pata_atiixp [ 0.000000] ata1: PATA max UDMA/100 cmd 0x1f0 ctl 0x3f6 bmdma 0x2010 irq 14 [ 0.000000] ata2: PATA max UDMA/100 cmd 0x170 ctl 0x376 bmdma 0x2018 irq 15 [ 0.000000] PCI: No IRQ known for interrupt pin A of device 0000:00:12.0. Probably buggy MP table. [ 0.000000] ahci 0000:00:12.0: controller can't do 64bit DMA, forcing 32bit [ 0.000000] ahci 0000:00:12.0: controller can't do PMP, turning off CAP_PMP [ 0.000000] ahci 0000:00:12.0: AHCI 0001.0100 32 slots 4 ports 3 Gbps 0xf impl SATA mode [ 0.000000] ahci 0000:00:12.0: flags: ncq sntf ilck pm led clo pio slum part [ 0.000000] WARNING: at /root/build/ubuntu/linux-source/linux-source/drivers/ata/libata-core .c:7238 ata_host_activate() [ 0.000000] Pid: 1291, comm: modprobe Not tainted 2.6.24-amd2-generic #1 [ 0.000000] [ 0.000000] Call Trace: [ 0.000000] [<ffffffff8807135e>] :libata:ata_host_activate+0x13e/0x140 [ 0.000000] [<ffffffff880cabc8>] :ahci:ahci_init_one+0x988/0xb80 [ 0.000000] [<ffffffff803588b8>] pci_device_probe+0xf8/0x170 [ 0.000000] [<ffffffff803b9fcc>] driver_probe_device+0x9c/0x1b0 [ 0.000000] [<ffffffff803ba299>] __driver_attach+0xc9/0xd0 [ 0.000000] [<ffffffff803ba1d0>] __driver_attach+0x0/0xd0 [ 0.000000] [<ffffffff803b920d>] bus_for_each_dev+0x4d/0x80 [ 0.000000] [<ffffffff803b961c>] bus_add_driver+0xac/0x220 [ 0.000000] [<ffffffff80358b39>] __pci_register_driver+0x69/0xb0 [ 0.000000] [<ffffffff80263b6e>] sys_init_module+0x18e/0x1a90 [ 0.000000] [<ffffffff8020c37e>] system_call+0x7e/0x83 [ 0.000000] [ 0.000000] scsi2 : ahci [ 0.000000] scsi3 : ahci [ 0.000000] scsi4 : ahci [ 0.000000] scsi5 : ahci [ 0.000000] ata3: SATA max UDMA/133 abar m1024@0xfc209000 port 0xfc209100 [ 0.000000] ata4: SATA max UDMA/133 abar m1024@0xfc209000 port 0xfc209180 [ 0.000000] ata5: SATA max UDMA/133 abar m1024@0xfc209000 port 0xfc209200 [ 0.000000] ata6: SATA max UDMA/133 abar m1024@0xfc209000 port 0xfc209280 [ 0.000000] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) [ 0.000000] ata3.00: qc timeout (cmd 0xec) [ 0.000000] ata3.00: failed to IDENTIFY (I/O error, err_mask=0x4) [ 0.000000] ata3: failed to recover some devices, retrying in 5 secs [ 0.000000] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) [ 0.000000] ata3.00: qc timeout (cmd 0xec) [ 0.000000] ata3.00: failed to IDENTIFY (I/O error, err_mask=0x4) [ 0.000000] ata3: failed to recover some devices, retrying in 5 secs [ 0.000000] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) [ 0.000000] ata3.00: qc timeout (cmd 0xec) [ 0.000000] ata3.00: failed to IDENTIFY (I/O error, err_mask=0x4) [ 0.000000] ata3: failed to recover some devices, retrying in 5 secs [ 0.000000] ata3: SATA link up 1.5 Gbps (SStatus 113 SControl 300) [ 0.000000] ata4: SATA link down (SStatus 0 SControl 300) [ 0.000000] ata5: SATA link down (SStatus 0 SControl 300) [ 0.000000] ata6: SATA link down (SStatus 0 SControl 300) [ 0.000000] PCI: No IRQ known for interrupt pin A of device 0000:00:13.0. Probably buggy MP table. [ 0.000000] ohci_hcd 0000:00:13.0: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.0 setup! [ 0.000000] ohci_hcd 0000:00:13.0: init 0000:00:13.0 fail, -19 [ 0.000000] PCI: No IRQ known for interrupt pin B of device 0000:00:13.1. Probably buggy MP table. [ 0.000000] ohci_hcd 0000:00:13.1: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.1 setup! [ 0.000000] ohci_hcd 0000:00:13.1: init 0000:00:13.1 fail, -19 [ 0.000000] PCI: No IRQ known for interrupt pin C of device 0000:00:13.2. Probably buggy MP table. [ 0.000000] ohci_hcd 0000:00:13.2: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.2 setup! [ 0.000000] ohci_hcd 0000:00:13.2: init 0000:00:13.2 fail, -19 [ 0.000000] PCI: No IRQ known for interrupt pin B of device 0000:00:13.3. Probably buggy MP table. [ 0.000000] ohci_hcd 0000:00:13.3: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.3 setup! [ 0.000000] ohci_hcd 0000:00:13.3: init 0000:00:13.3 fail, -19 [ 0.000000] PCI: No IRQ known for interrupt pin C of device 0000:00:13.4. Probably buggy MP table. [ 0.000000] ohci_hcd 0000:00:13.4: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.4 setup! [ 0.000000] ohci_hcd 0000:00:13.4: init 0000:00:13.4 fail, -19 [ 0.000000] PCI: No IRQ known for interrupt pin D of device 0000:00:13.5. Probably buggy MP table. [ 0.000000] ehci_hcd 0000:00:13.5: Found HC with no IRQ. Check BIOS/PCI 0000:00:13.5 setup! [ 0.000000] ehci_hcd 0000:00:13.5: init 0000:00:13.5 fail, -19 [ 0.000000] Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 [ 0.000000] ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx Done. Check root= bootarg cat /proc/cmdline or missing modules, devices: cat /proc/modules ls /dev ALERT! /dev/disk/by-uuid/7bb9e8a5-cbc0-4104-92a3-628f56924494 does not exist. Dropping to a she ll!

5 13

Re: [coreboot] [RFC] [flashrom] "accelerated" high-level external programmer functions and serial external programmer protocol
by Carl-Daniel Hailfinger 05 Jun '09

05 Jun '09

On 05.06.2009 17:08, Urja Rannikko wrote: > On Fri, Jun 5, 2009 at 17:55, Carl-Daniel Hailfinger wrote: > >> Which serial protocol are we talking about? >> > > The serial protocol between the (yet not existing) in-flashrom > external serial programmer driver (summoned with eg. "flashrom -p > serialprog=/dev/ttyS0,115200") and the ATmega168 (i originally had an > mega88) that goes on the RS-232 cable. Ah OK. The meaning of "serial protocol" was not clear to me. I thought you meant a SPI variant. > The point being that i want to > be able to change the ATmega168 to the next cool programmer somebody > creates without changing the flashrom part of the software, so i want > to make a device-independent protocol. > That would be neat. > I actually have an ATmega328 with an ethernet interface (ENC28J60), so > i thought that the next programmer i make might be ethernet based > instead of serial, but with the same protocol. > The turnaround times are probably similar to serial for single commands, but I am pretty excited by this prospect. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

svn blame -x-w
by Myles Watson 05 Jun '09

05 Jun '09

svn has a cool feature that I just ran into. It allows you to ignore white spaces when you're looking at blame. The first reason I think that is cool is because it would be nice to clean up the white space in many of our files. One reason not to do that is to preserve the blame. As long as developers know about this it isn't so much of an issue. The second reason I think it's cool is because it gives me an easy way to check if a white space patch really is just white space changes. svn blame -x-w svn blame -x-b It could have saved me a couple of times :) Thanks, Myles

1 0

[PATCH] flashrom: Add chip_{read,write}n
by Carl-Daniel Hailfinger 05 Jun '09

05 Jun '09

Sometimes we want to read/write more than 4 bytes of chip content at once. Add chip_{read,write}n to the external flasher infrastructure which read/write n bytes at once. Fix a few places where the code used memcpy/memcmp although that is strictly impossible with external flashers. Place a FIXME in the layout.c code because usage is not totally clear and needs to be fixed to support external flashers. As a nice side benefit, we get a noticeable speedup for builtin flash reading which is now a memcpy() of the full flash area instead of a series of single-byte reads. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-chip_readn_writen/flash.h =================================================================== --- flashrom-chip_readn_writen/flash.h (Revision 576) +++ flashrom-chip_readn_writen/flash.h (Arbeitskopie) @@ -100,9 +100,11 @@ void (*chip_writeb) (uint8_t val, chipaddr addr); void (*chip_writew) (uint16_t val, chipaddr addr); void (*chip_writel) (uint32_t val, chipaddr addr); + void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); + void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); }; extern const struct programmer_entry programmer_table[]; @@ -115,9 +117,11 @@ void chip_writeb(uint8_t val, chipaddr addr); void chip_writew(uint16_t val, chipaddr addr); void chip_writel(uint32_t val, chipaddr addr); +void chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -646,6 +650,7 @@ uint8_t internal_chip_readb(const chipaddr addr); uint16_t internal_chip_readw(const chipaddr addr); uint32_t internal_chip_readl(const chipaddr addr); +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); @@ -656,8 +661,10 @@ void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); void fallback_chip_writel(uint32_t val, chipaddr addr); +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint16_t fallback_chip_readw(const chipaddr addr); uint32_t fallback_chip_readl(const chipaddr addr); +void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #if defined(__FreeBSD__) || defined(__DragonFly__) extern int io_fd; #endif @@ -671,9 +678,11 @@ void dummy_chip_writeb(uint8_t val, chipaddr addr); void dummy_chip_writew(uint16_t val, chipaddr addr); void dummy_chip_writel(uint32_t val, chipaddr addr); +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t dummy_chip_readb(const chipaddr addr); uint16_t dummy_chip_readw(const chipaddr addr); uint32_t dummy_chip_readl(const chipaddr addr); +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); Index: flashrom-chip_readn_writen/dummyflasher.c =================================================================== --- flashrom-chip_readn_writen/dummyflasher.c (Revision 576) +++ flashrom-chip_readn_writen/dummyflasher.c (Arbeitskopie) @@ -103,6 +103,18 @@ printf_debug("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + printf_debug("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", + __func__, addr, (unsigned long)len); + for (i = 0; i < len; i++) { + if ((i % 16) == 0) + printf_debug("\n"); + printf_debug("%02x ", buf[i]) + } +} + uint8_t dummy_chip_readb(const chipaddr addr) { printf_debug("%s: addr=0x%lx, returning 0xff\n", __func__, addr); @@ -121,6 +133,14 @@ return 0xffffffff; } +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + printf_debug("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", + __func__, addr, (unsigned long)len); + memset(buf, 0xff, len); + return; +} + int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { Index: flashrom-chip_readn_writen/stm50flw0x0x.c =================================================================== --- flashrom-chip_readn_writen/stm50flw0x0x.c (Revision 576) +++ flashrom-chip_readn_writen/stm50flw0x0x.c (Arbeitskopie) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" void protect_stm50flw0x0x(chipaddr bios) @@ -255,6 +256,7 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); printf("Programming page: \n"); for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { @@ -269,8 +271,8 @@ * are not erased and rewritten; data is retained also * in sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -284,6 +286,7 @@ } printf("\n"); protect_stm50flw0x0x(bios); + free(tmpbuf); return rc; } Index: flashrom-chip_readn_writen/flashrom.c =================================================================== --- flashrom-chip_readn_writen/flashrom.c (Revision 576) +++ flashrom-chip_readn_writen/flashrom.c (Arbeitskopie) @@ -43,9 +43,11 @@ .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -56,9 +58,11 @@ .chip_readb = dummy_chip_readb, .chip_readw = dummy_chip_readw, .chip_readl = dummy_chip_readl, + .chip_readn = dummy_chip_readn, .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .chip_writen = dummy_chip_writen, }, { @@ -69,9 +73,11 @@ .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -82,9 +88,11 @@ .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -93,11 +101,13 @@ .map_flash_region = dummy_map, .unmap_flash_region = dummy_unmap, .chip_readb = dummy_chip_readb, - .chip_readw = dummy_chip_readw, - .chip_readl = dummy_chip_readl, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = dummy_chip_writeb, - .chip_writew = dummy_chip_writew, - .chip_writel = dummy_chip_writel, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, {}, @@ -140,6 +150,11 @@ programmer_table[programmer].chip_writel(val, addr); } +void chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_writen(buf, addr, len); +} + uint8_t chip_readb(const chipaddr addr) { return programmer_table[programmer].chip_readb(addr); @@ -155,6 +170,12 @@ return programmer_table[programmer].chip_readl(addr); } +void chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_readn(buf, addr, len); + return; +} + void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; @@ -164,12 +185,7 @@ int read_memmapped(struct flashchip *flash, uint8_t *buf) { - int i; - - /* We could do a memcpy as optimization if the flash is onboard */ - //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); - for (i = 0; i < flash->total_size * 1024; i++) - buf[i] = chip_readb(flash->virtual_memory + i); + chip_readn(buf, flash->virtual_memory, flash->total_size * 1024); return 0; } @@ -774,14 +790,10 @@ */ // //////////////////////////////////////////////////////////// - /* FIXME: This memcpy will not work for SPI nor external flashers. - * Convert to chip_readb. - */ if (exclude_end_position - exclude_start_position > 0) - memcpy(buf + exclude_start_position, - (const char *)flash->virtual_memory + - exclude_start_position, - exclude_end_position - exclude_start_position); + chip_readn(buf + exclude_start_position, + flash->virtual_memory + exclude_start_position, + exclude_end_position - exclude_start_position); exclude_start_page = exclude_start_position / flash->page_size; if ((exclude_start_position % flash->page_size) != 0) { @@ -792,6 +804,7 @@ // This should be moved into each flash part's code to do it // cleanly. This does the job. + /* FIXME: Adapt to the external flasher infrastructure. */ handle_romentries(buf, (uint8_t *) flash->virtual_memory); // //////////////////////////////////////////////////////////// Index: flashrom-chip_readn_writen/internal.c =================================================================== --- flashrom-chip_readn_writen/internal.c (Revision 576) +++ flashrom-chip_readn_writen/internal.c (Arbeitskopie) @@ -165,6 +165,12 @@ return mmio_readl((void *) addr); } +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + memcpy(buf, (void *)addr, len); + return; +} + void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; @@ -237,3 +243,19 @@ val |= chip_readw(addr + 2) << 16; return val; } + +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + chip_writeb(buf[i], addr + i); + return; +} + +void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + buf[i] = chip_readb(addr + i); + return; +} Index: flashrom-chip_readn_writen/layout.c =================================================================== --- flashrom-chip_readn_writen/layout.c (Revision 576) +++ flashrom-chip_readn_writen/layout.c (Arbeitskopie) @@ -220,6 +220,7 @@ if (rom_entries[i].included) continue; + /* FIXME: Adapt to the external flasher infrastructure. */ memcpy(buffer + rom_entries[i].start, content + rom_entries[i].start, rom_entries[i].end - rom_entries[i].start); Index: flashrom-chip_readn_writen/82802ab.c =================================================================== --- flashrom-chip_readn_writen/82802ab.c (Revision 576) +++ flashrom-chip_readn_writen/82802ab.c (Arbeitskopie) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" // I need that Berkeley bit-map printer @@ -172,6 +173,7 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); printf("Programming page: \n"); for (i = 0; i < total_size / page_size; i++) { @@ -186,8 +188,8 @@ * or not erased and rewritten; their data is retained also in * sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -199,6 +201,7 @@ } printf("\n"); protect_jedec(bios); + free(tmpbuf); return 0; } -- http://www.hailfinger.org/ Index: flashrom-chip_readn_writen/flash.h =================================================================== --- flashrom-chip_readn_writen/flash.h (Revision 576) +++ flashrom-chip_readn_writen/flash.h (Arbeitskopie) @@ -100,9 +100,11 @@ void (*chip_writeb) (uint8_t val, chipaddr addr); void (*chip_writew) (uint16_t val, chipaddr addr); void (*chip_writel) (uint32_t val, chipaddr addr); + void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); + void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); }; extern const struct programmer_entry programmer_table[]; @@ -115,9 +117,11 @@ void chip_writeb(uint8_t val, chipaddr addr); void chip_writew(uint16_t val, chipaddr addr); void chip_writel(uint32_t val, chipaddr addr); +void chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -646,6 +650,7 @@ uint8_t internal_chip_readb(const chipaddr addr); uint16_t internal_chip_readw(const chipaddr addr); uint32_t internal_chip_readl(const chipaddr addr); +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); @@ -656,8 +661,10 @@ void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); void fallback_chip_writel(uint32_t val, chipaddr addr); +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint16_t fallback_chip_readw(const chipaddr addr); uint32_t fallback_chip_readl(const chipaddr addr); +void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #if defined(__FreeBSD__) || defined(__DragonFly__) extern int io_fd; #endif @@ -671,9 +678,11 @@ void dummy_chip_writeb(uint8_t val, chipaddr addr); void dummy_chip_writew(uint16_t val, chipaddr addr); void dummy_chip_writel(uint32_t val, chipaddr addr); +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t dummy_chip_readb(const chipaddr addr); uint16_t dummy_chip_readw(const chipaddr addr); uint32_t dummy_chip_readl(const chipaddr addr); +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); Index: flashrom-chip_readn_writen/dummyflasher.c =================================================================== --- flashrom-chip_readn_writen/dummyflasher.c (Revision 576) +++ flashrom-chip_readn_writen/dummyflasher.c (Arbeitskopie) @@ -103,6 +103,18 @@ printf_debug("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + printf_debug("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", + __func__, addr, (unsigned long)len); + for (i = 0; i < len; i++) { + if ((i % 16) == 0) + printf_debug("\n"); + printf_debug("%02x ", buf[i]) + } +} + uint8_t dummy_chip_readb(const chipaddr addr) { printf_debug("%s: addr=0x%lx, returning 0xff\n", __func__, addr); @@ -121,6 +133,14 @@ return 0xffffffff; } +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + printf_debug("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", + __func__, addr, (unsigned long)len); + memset(buf, 0xff, len); + return; +} + int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { Index: flashrom-chip_readn_writen/stm50flw0x0x.c =================================================================== --- flashrom-chip_readn_writen/stm50flw0x0x.c (Revision 576) +++ flashrom-chip_readn_writen/stm50flw0x0x.c (Arbeitskopie) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" void protect_stm50flw0x0x(chipaddr bios) @@ -255,6 +256,7 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); printf("Programming page: \n"); for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { @@ -269,8 +271,8 @@ * are not erased and rewritten; data is retained also * in sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -284,6 +286,7 @@ } printf("\n"); protect_stm50flw0x0x(bios); + free(tmpbuf); return rc; } Index: flashrom-chip_readn_writen/flashrom.c =================================================================== --- flashrom-chip_readn_writen/flashrom.c (Revision 576) +++ flashrom-chip_readn_writen/flashrom.c (Arbeitskopie) @@ -43,9 +43,11 @@ .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -56,9 +58,11 @@ .chip_readb = dummy_chip_readb, .chip_readw = dummy_chip_readw, .chip_readl = dummy_chip_readl, + .chip_readn = dummy_chip_readn, .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .chip_writen = dummy_chip_writen, }, { @@ -69,9 +73,11 @@ .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -82,9 +88,11 @@ .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, { @@ -93,11 +101,13 @@ .map_flash_region = dummy_map, .unmap_flash_region = dummy_unmap, .chip_readb = dummy_chip_readb, - .chip_readw = dummy_chip_readw, - .chip_readl = dummy_chip_readl, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = dummy_chip_writeb, - .chip_writew = dummy_chip_writew, - .chip_writel = dummy_chip_writel, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, }, {}, @@ -140,6 +150,11 @@ programmer_table[programmer].chip_writel(val, addr); } +void chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_writen(buf, addr, len); +} + uint8_t chip_readb(const chipaddr addr) { return programmer_table[programmer].chip_readb(addr); @@ -155,6 +170,12 @@ return programmer_table[programmer].chip_readl(addr); } +void chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_readn(buf, addr, len); + return; +} + void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; @@ -164,12 +185,7 @@ int read_memmapped(struct flashchip *flash, uint8_t *buf) { - int i; - - /* We could do a memcpy as optimization if the flash is onboard */ - //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); - for (i = 0; i < flash->total_size * 1024; i++) - buf[i] = chip_readb(flash->virtual_memory + i); + chip_readn(buf, flash->virtual_memory, flash->total_size * 1024); return 0; } @@ -774,14 +790,10 @@ */ // //////////////////////////////////////////////////////////// - /* FIXME: This memcpy will not work for SPI nor external flashers. - * Convert to chip_readb. - */ if (exclude_end_position - exclude_start_position > 0) - memcpy(buf + exclude_start_position, - (const char *)flash->virtual_memory + - exclude_start_position, - exclude_end_position - exclude_start_position); + chip_readn(buf + exclude_start_position, + flash->virtual_memory + exclude_start_position, + exclude_end_position - exclude_start_position); exclude_start_page = exclude_start_position / flash->page_size; if ((exclude_start_position % flash->page_size) != 0) { @@ -792,6 +804,7 @@ // This should be moved into each flash part's code to do it // cleanly. This does the job. + /* FIXME: Adapt to the external flasher infrastructure. */ handle_romentries(buf, (uint8_t *) flash->virtual_memory); // //////////////////////////////////////////////////////////// Index: flashrom-chip_readn_writen/internal.c =================================================================== --- flashrom-chip_readn_writen/internal.c (Revision 576) +++ flashrom-chip_readn_writen/internal.c (Arbeitskopie) @@ -165,6 +165,12 @@ return mmio_readl((void *) addr); } +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + memcpy(buf, (void *)addr, len); + return; +} + void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; @@ -237,3 +243,19 @@ val |= chip_readw(addr + 2) << 16; return val; } + +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + chip_writeb(buf[i], addr + i); + return; +} + +void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + buf[i] = chip_readb(addr + i); + return; +} Index: flashrom-chip_readn_writen/layout.c =================================================================== --- flashrom-chip_readn_writen/layout.c (Revision 576) +++ flashrom-chip_readn_writen/layout.c (Arbeitskopie) @@ -220,6 +220,7 @@ if (rom_entries[i].included) continue; + /* FIXME: Adapt to the external flasher infrastructure. */ memcpy(buffer + rom_entries[i].start, content + rom_entries[i].start, rom_entries[i].end - rom_entries[i].start); Index: flashrom-chip_readn_writen/82802ab.c =================================================================== --- flashrom-chip_readn_writen/82802ab.c (Revision 576) +++ flashrom-chip_readn_writen/82802ab.c (Arbeitskopie) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" // I need that Berkeley bit-map printer @@ -172,6 +173,7 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); printf("Programming page: \n"); for (i = 0; i < total_size / page_size; i++) { @@ -186,8 +188,8 @@ * or not erased and rewritten; their data is retained also in * sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -199,6 +201,7 @@ } printf("\n"); protect_jedec(bios); + free(tmpbuf); return 0; }

3 3

[flashrom] r579 - trunk
by svn＠coreboot.org 05 Jun '09

05 Jun '09

Author: hailfinger Date: 2009-06-05 20:32:07 +0200 (Fri, 05 Jun 2009) New Revision: 579 Modified: trunk/82802ab.c trunk/dummyflasher.c trunk/flash.h trunk/flashrom.c trunk/internal.c trunk/layout.c trunk/stm50flw0x0x.c Log: Sometimes we want to read/write more than 4 bytes of chip content at once. Add chip_{read,write}n to the external flasher infrastructure which read/write n bytes at once. Fix a few places where the code used memcpy/memcmp although that is strictly impossible with external flashers. Place a FIXME in the layout.c code because usage is not totally clear and needs to be fixed to support external flashers. As a nice side benefit, we get a noticeable speedup for builtin flash reading which is now a memcpy() of the full flash area instead of a series of single-byte reads. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Urja Rannikko <urjaman(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/82802ab.c =================================================================== --- trunk/82802ab.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/82802ab.c 2009-06-05 18:32:07 UTC (rev 579) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" // I need that Berkeley bit-map printer @@ -172,7 +173,12 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); + if (!tmpbuf) { + printf("Could not allocate memory!\n"); + exit(1); + } printf("Programming page: \n"); for (i = 0; i < total_size / page_size; i++) { printf @@ -186,8 +192,8 @@ * or not erased and rewritten; their data is retained also in * sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -199,6 +205,7 @@ } printf("\n"); protect_jedec(bios); + free(tmpbuf); return 0; } Modified: trunk/dummyflasher.c =================================================================== --- trunk/dummyflasher.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/dummyflasher.c 2009-06-05 18:32:07 UTC (rev 579) @@ -103,6 +103,18 @@ printf_debug("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); } +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + printf_debug("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", + __func__, addr, (unsigned long)len); + for (i = 0; i < len; i++) { + if ((i % 16) == 0) + printf_debug("\n"); + printf_debug("%02x ", buf[i]) + } +} + uint8_t dummy_chip_readb(const chipaddr addr) { printf_debug("%s: addr=0x%lx, returning 0xff\n", __func__, addr); @@ -121,6 +133,14 @@ return 0xffffffff; } +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + printf_debug("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", + __func__, addr, (unsigned long)len); + memset(buf, 0xff, len); + return; +} + int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/flash.h 2009-06-05 18:32:07 UTC (rev 579) @@ -100,10 +100,11 @@ void (*chip_writeb) (uint8_t val, chipaddr addr); void (*chip_writew) (uint16_t val, chipaddr addr); void (*chip_writel) (uint32_t val, chipaddr addr); + void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); - + void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); void (*delay) (int usecs); }; @@ -117,9 +118,11 @@ void chip_writeb(uint8_t val, chipaddr addr); void chip_writew(uint16_t val, chipaddr addr); void chip_writel(uint32_t val, chipaddr addr); +void chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void programmer_delay(int usecs); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -649,6 +652,7 @@ uint8_t internal_chip_readb(const chipaddr addr); uint16_t internal_chip_readw(const chipaddr addr); uint32_t internal_chip_readl(const chipaddr addr); +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); @@ -660,8 +664,10 @@ void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); void fallback_chip_writel(uint32_t val, chipaddr addr); +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint16_t fallback_chip_readw(const chipaddr addr); uint32_t fallback_chip_readl(const chipaddr addr); +void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #if defined(__FreeBSD__) || defined(__DragonFly__) extern int io_fd; #endif @@ -675,9 +681,11 @@ void dummy_chip_writeb(uint8_t val, chipaddr addr); void dummy_chip_writew(uint16_t val, chipaddr addr); void dummy_chip_writel(uint32_t val, chipaddr addr); +void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); uint8_t dummy_chip_readb(const chipaddr addr); uint16_t dummy_chip_readw(const chipaddr addr); uint32_t dummy_chip_readl(const chipaddr addr); +void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/flashrom.c 2009-06-05 18:32:07 UTC (rev 579) @@ -43,9 +43,11 @@ .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, @@ -57,9 +59,11 @@ .chip_readb = dummy_chip_readb, .chip_readw = dummy_chip_readw, .chip_readl = dummy_chip_readl, + .chip_readn = dummy_chip_readn, .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .chip_writen = dummy_chip_writen, .delay = internal_delay, }, @@ -71,9 +75,11 @@ .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, @@ -85,9 +91,11 @@ .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, @@ -97,11 +105,13 @@ .map_flash_region = dummy_map, .unmap_flash_region = dummy_unmap, .chip_readb = dummy_chip_readb, - .chip_readw = dummy_chip_readw, - .chip_readl = dummy_chip_readl, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, .chip_writeb = dummy_chip_writeb, - .chip_writew = dummy_chip_writew, - .chip_writel = dummy_chip_writel, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, .delay = internal_delay, }, @@ -145,6 +155,11 @@ programmer_table[programmer].chip_writel(val, addr); } +void chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_writen(buf, addr, len); +} + uint8_t chip_readb(const chipaddr addr) { return programmer_table[programmer].chip_readb(addr); @@ -160,6 +175,12 @@ return programmer_table[programmer].chip_readl(addr); } +void chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + programmer_table[programmer].chip_readn(buf, addr, len); + return; +} + void programmer_delay(int usecs) { programmer_table[programmer].delay(usecs); @@ -174,12 +195,7 @@ int read_memmapped(struct flashchip *flash, uint8_t *buf) { - int i; - - /* We could do a memcpy as optimization if the flash is onboard */ - //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); - for (i = 0; i < flash->total_size * 1024; i++) - buf[i] = chip_readb(flash->virtual_memory + i); + chip_readn(buf, flash->virtual_memory, flash->total_size * 1024); return 0; } @@ -784,14 +800,10 @@ */ // //////////////////////////////////////////////////////////// - /* FIXME: This memcpy will not work for SPI nor external flashers. - * Convert to chip_readb. - */ if (exclude_end_position - exclude_start_position > 0) - memcpy(buf + exclude_start_position, - (const char *)flash->virtual_memory + - exclude_start_position, - exclude_end_position - exclude_start_position); + chip_readn(buf + exclude_start_position, + flash->virtual_memory + exclude_start_position, + exclude_end_position - exclude_start_position); exclude_start_page = exclude_start_position / flash->page_size; if ((exclude_start_position % flash->page_size) != 0) { @@ -802,6 +814,7 @@ // This should be moved into each flash part's code to do it // cleanly. This does the job. + /* FIXME: Adapt to the external flasher infrastructure. */ handle_romentries(buf, (uint8_t *) flash->virtual_memory); // //////////////////////////////////////////////////////////// Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/internal.c 2009-06-05 18:32:07 UTC (rev 579) @@ -165,6 +165,12 @@ return mmio_readl((void *) addr); } +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) +{ + memcpy(buf, (void *)addr, len); + return; +} + void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; @@ -249,3 +255,19 @@ val |= chip_readw(addr + 2) << 16; return val; } + +void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + chip_writeb(buf[i], addr + i); + return; +} + +void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len) +{ + size_t i; + for (i = 0; i < len; i++) + buf[i] = chip_readb(addr + i); + return; +} Modified: trunk/layout.c =================================================================== --- trunk/layout.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/layout.c 2009-06-05 18:32:07 UTC (rev 579) @@ -220,6 +220,7 @@ if (rom_entries[i].included) continue; + /* FIXME: Adapt to the external flasher infrastructure. */ memcpy(buffer + rom_entries[i].start, content + rom_entries[i].start, rom_entries[i].end - rom_entries[i].start); Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2009-06-05 17:48:08 UTC (rev 578) +++ trunk/stm50flw0x0x.c 2009-06-05 18:32:07 UTC (rev 579) @@ -27,6 +27,7 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" void protect_stm50flw0x0x(chipaddr bios) @@ -255,7 +256,12 @@ int total_size = flash->total_size * 1024; int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; + uint8_t *tmpbuf = malloc(page_size); + if (!tmpbuf) { + printf("Could not allocate memory!\n"); + exit(1); + } printf("Programming page: \n"); for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { printf @@ -269,8 +275,8 @@ * are not erased and rewritten; data is retained also * in sudden power off situations */ - if (!memcmp((void *)(buf + i * page_size), - (void *)(bios + i * page_size), page_size)) { + chip_readn(tmpbuf, bios + i * page_size, page_size); + if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) { printf("SKIPPED\n"); continue; } @@ -284,6 +290,7 @@ } printf("\n"); protect_stm50flw0x0x(bios); + free(tmpbuf); return rc; }

1 0

[PATCH] flashrom: Add external programmer delay functions
by Carl-Daniel Hailfinger 05 Jun '09

05 Jun '09

Add external programmer delay functions so external programmers can handle the delay on their own if needed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_delay/flash.h =================================================================== --- flashrom-programmer_delay/flash.h (Revision 576) +++ flashrom-programmer_delay/flash.h (Arbeitskopie) @@ -103,6 +103,8 @@ uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); + + void (*delay) (int usecs); }; extern const struct programmer_entry programmer_table[]; @@ -118,6 +120,7 @@ uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void programmer_delay(uint32_t usecs); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -590,7 +593,7 @@ #define W_49V002FA 0x32 /* udelay.c */ -void myusec_delay(int time); +void myusec_delay(int usecs); void myusec_calibrate_delay(void); /* pcidev.c */ @@ -652,6 +655,7 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); +void internal_delay(int usecs); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); Index: flashrom-programmer_delay/en29f002a.c =================================================================== --- flashrom-programmer_delay/en29f002a.c (Revision 576) +++ flashrom-programmer_delay/en29f002a.c (Arbeitskopie) @@ -37,7 +37,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -70,7 +70,7 @@ chip_writeb(0x55, bios + 0xAAA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -97,7 +97,7 @@ chipaddr dst = bios; //chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_chip_jedec(flash); printf("Programming page: "); Index: flashrom-programmer_delay/it87spi.c =================================================================== --- flashrom-programmer_delay/it87spi.c (Revision 576) +++ flashrom-programmer_delay/it87spi.c (Arbeitskopie) @@ -220,7 +220,7 @@ * This usually takes 1-10 ms, so wait in 1 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(1000); + programmer_delay(1000); return 0; } @@ -245,7 +245,7 @@ return result; spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } /* resume normal ops... */ OUTB(0x20, it8716f_flashport); Index: flashrom-programmer_delay/jedec.c =================================================================== --- flashrom-programmer_delay/jedec.c (Revision 576) +++ flashrom-programmer_delay/jedec.c (Arbeitskopie) @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x20, bios + 0x5555); - usleep(200); + programmer_delay(200); } void protect_jedec(chipaddr bios) @@ -82,7 +82,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_jedec(struct flashchip *flash) @@ -110,14 +110,14 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ - myusec_delay(probe_timing_enter); + programmer_delay(probe_timing_enter); /* Read product ID */ id1 = chip_readb(bios); @@ -139,11 +139,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(probe_timing_exit); + programmer_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); if (!oddparity(id1)) @@ -179,18 +179,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x30, bios + page); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -202,18 +202,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x50, bios + block); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -227,18 +227,18 @@ /* Issue the JEDEC Chip Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x10, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); Index: flashrom-programmer_delay/w29ee011.c =================================================================== --- flashrom-programmer_delay/w29ee011.c (Revision 576) +++ flashrom-programmer_delay/w29ee011.c (Arbeitskopie) @@ -38,17 +38,17 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x60, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -56,11 +56,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Index: flashrom-programmer_delay/sharplhf00l04.c =================================================================== --- flashrom-programmer_delay/sharplhf00l04.c (Revision 576) +++ flashrom-programmer_delay/sharplhf00l04.c (Arbeitskopie) @@ -46,9 +46,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -58,7 +58,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -85,7 +85,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -118,7 +118,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); Index: flashrom-programmer_delay/spi.c =================================================================== --- flashrom-programmer_delay/spi.c (Revision 576) +++ flashrom-programmer_delay/spi.c (Arbeitskopie) @@ -425,7 +425,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000000); return 0; } @@ -453,7 +453,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000000); return 0; } @@ -485,7 +485,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -511,7 +511,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -557,7 +557,7 @@ * This usually takes 15-800 ms, so wait in 10 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(10 * 1000); + programmer_delay(10 * 1000); return 0; } @@ -690,7 +690,7 @@ spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } return 0; @@ -748,13 +748,13 @@ return result; spi_command(6, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ while (pos < size) { w[1] = buf[pos++]; w[2] = buf[pos++]; spi_command(3, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ } spi_write_disable(); return 0; Index: flashrom-programmer_delay/wbsio_spi.c =================================================================== --- flashrom-programmer_delay/wbsio_spi.c (Revision 576) +++ flashrom-programmer_delay/wbsio_spi.c (Arbeitskopie) @@ -159,7 +159,7 @@ OUTB(writearr[0], wbsio_spibase); OUTB(mode, wbsio_spibase + 1); - myusec_delay(10); + programmer_delay(10); if (!readcnt) return 0; @@ -203,7 +203,7 @@ for (pos = 0; pos < size; pos++) { spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } spi_write_disable(); return 0; Index: flashrom-programmer_delay/m29f002.c =================================================================== --- flashrom-programmer_delay/m29f002.c (Revision 576) +++ flashrom-programmer_delay/m29f002.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; } @@ -44,7 +44,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); /* program */ Index: flashrom-programmer_delay/w39v040c.c =================================================================== --- flashrom-programmer_delay/w39v040c.c (Revision 576) +++ flashrom-programmer_delay/w39v040c.c (Arbeitskopie) @@ -26,22 +26,22 @@ uint8_t id1, id2, lock; chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 1); lock = chip_readb(bios + 0xfff2); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); if (!oddparity(id1)) Index: flashrom-programmer_delay/sst28sf040.c =================================================================== --- flashrom-programmer_delay/sst28sf040.c (Revision 576) +++ flashrom-programmer_delay/sst28sf040.c (Arbeitskopie) @@ -94,16 +94,16 @@ uint8_t id1, id2; chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(READ_ID, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); - myusec_delay(10); + programmer_delay(10); id2 = chip_readb(bios + 0x01); chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -121,7 +121,7 @@ chip_writeb(CHIP_ERASE, bios); protect_28sf040(bios); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Index: flashrom-programmer_delay/stm50flw0x0x.c =================================================================== --- flashrom-programmer_delay/stm50flw0x0x.c (Revision 576) +++ flashrom-programmer_delay/stm50flw0x0x.c (Arbeitskopie) @@ -35,7 +35,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_stm50flw0x0x(struct flashchip *flash) @@ -46,11 +46,11 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); /* Read product ID */ id1 = chip_readb(bios); @@ -72,11 +72,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, largeid2); @@ -101,7 +101,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); @@ -170,7 +170,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); wait_stm50flw0x0x(flash->virtual_memory); Index: flashrom-programmer_delay/am29f040b.c =================================================================== --- flashrom-programmer_delay/am29f040b.c (Revision 576) +++ flashrom-programmer_delay/am29f040b.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x30, bios + address); - sleep(2); + programmer_delay(1000000 * 2); /* wait for Toggle bit ready */ toggle_ready_jedec(bios + address); @@ -75,7 +75,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Index: flashrom-programmer_delay/w39v080fa.c =================================================================== --- flashrom-programmer_delay/w39v080fa.c (Revision 576) +++ flashrom-programmer_delay/w39v080fa.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -39,7 +39,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -108,7 +108,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read Hardware Lock Bits */ locking = chip_readb(bios + 0xffff2); @@ -117,7 +117,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("Lockout bits:\n"); Index: flashrom-programmer_delay/flashrom.c =================================================================== --- flashrom-programmer_delay/flashrom.c (Revision 576) +++ flashrom-programmer_delay/flashrom.c (Arbeitskopie) @@ -46,6 +46,7 @@ .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .delay = internal_delay, }, { @@ -59,6 +60,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, { @@ -72,6 +74,7 @@ .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -85,6 +88,7 @@ .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -98,6 +102,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, {}, @@ -155,6 +160,11 @@ return programmer_table[programmer].chip_readl(addr); } +void programmer_delay(uint32_t usecs) +{ + programmer_table[programmer].delay(usecs); +} + void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; Index: flashrom-programmer_delay/internal.c =================================================================== --- flashrom-programmer_delay/internal.c (Revision 576) +++ flashrom-programmer_delay/internal.c (Arbeitskopie) @@ -195,6 +195,18 @@ return *(volatile uint32_t *) addr; } +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} + /* Fallback map() for programmers which don't need special handling */ void *fallback_map(const char *descr, unsigned long phys_addr, size_t len) { Index: flashrom-programmer_delay/ichspi.c =================================================================== --- flashrom-programmer_delay/ichspi.c (Revision 576) +++ flashrom-programmer_delay/ichspi.c (Arbeitskopie) @@ -453,7 +453,7 @@ /* wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); @@ -570,7 +570,7 @@ /*wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); Index: flashrom-programmer_delay/udelay.c =================================================================== --- flashrom-programmer_delay/udelay.c (Revision 576) +++ flashrom-programmer_delay/udelay.c (Arbeitskopie) @@ -24,10 +24,10 @@ // count to a billion. Time it. If it's < 1 sec, count to 10B, etc. unsigned long micro = 1; -void myusec_delay(int time) +void myusec_delay(int usecs) { volatile unsigned long i; - for (i = 0; i < time * micro; i++) ; + for (i = 0; i < usecs * micro; i++) ; } void myusec_calibrate_delay(void) Index: flashrom-programmer_delay/82802ab.c =================================================================== --- flashrom-programmer_delay/82802ab.c (Revision 576) +++ flashrom-programmer_delay/82802ab.c (Arbeitskopie) @@ -53,9 +53,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -65,7 +65,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -92,7 +92,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -124,7 +124,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); //print_82802ab_status(status); Index: flashrom-programmer_delay/mx29f002.c =================================================================== --- flashrom-programmer_delay/mx29f002.c (Revision 576) +++ flashrom-programmer_delay/mx29f002.c (Arbeitskopie) @@ -34,7 +34,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -55,7 +55,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(100); + programmer_delay(100); toggle_ready_jedec(bios); // while ((*bios & 0x40) != 0x40) @@ -82,7 +82,7 @@ chipaddr dst = bios; chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_29f002(flash); //*bios = 0xF0; #if 1 Index: flashrom-programmer_delay/m29f400bt.c =================================================================== --- flashrom-programmer_delay/m29f400bt.c (Revision 576) +++ flashrom-programmer_delay/m29f400bt.c (Arbeitskopie) @@ -26,7 +26,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xA0, bios + 0xAAA); - usleep(200); + programmer_delay(200); } void write_page_m29f400bt(chipaddr bios, uint8_t *src, @@ -42,7 +42,7 @@ /* transfer data from source to destination */ chip_writeb(*src, dst); //chip_writeb(0xF0, bios); - //usleep(5); + //programmer_delay(5); toggle_ready_jedec(dst); printf ("Value in the flash at address 0x%lx = %#x, want %#x\n", @@ -61,7 +61,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x90, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xF0, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x10, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; @@ -113,7 +113,7 @@ //chip_writeb(0x10, bios + 0xAAA); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; -- http://www.hailfinger.org/ Index: flashrom-programmer_delay/flash.h =================================================================== --- flashrom-programmer_delay/flash.h (Revision 576) +++ flashrom-programmer_delay/flash.h (Arbeitskopie) @@ -103,6 +103,8 @@ uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); + + void (*delay) (int usecs); }; extern const struct programmer_entry programmer_table[]; @@ -118,6 +120,7 @@ uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void programmer_delay(uint32_t usecs); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -590,7 +593,7 @@ #define W_49V002FA 0x32 /* udelay.c */ -void myusec_delay(int time); +void myusec_delay(int usecs); void myusec_calibrate_delay(void); /* pcidev.c */ @@ -652,6 +655,7 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); +void internal_delay(int usecs); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); Index: flashrom-programmer_delay/en29f002a.c =================================================================== --- flashrom-programmer_delay/en29f002a.c (Revision 576) +++ flashrom-programmer_delay/en29f002a.c (Arbeitskopie) @@ -37,7 +37,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -70,7 +70,7 @@ chip_writeb(0x55, bios + 0xAAA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -97,7 +97,7 @@ chipaddr dst = bios; //chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_chip_jedec(flash); printf("Programming page: "); Index: flashrom-programmer_delay/it87spi.c =================================================================== --- flashrom-programmer_delay/it87spi.c (Revision 576) +++ flashrom-programmer_delay/it87spi.c (Arbeitskopie) @@ -220,7 +220,7 @@ * This usually takes 1-10 ms, so wait in 1 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(1000); + programmer_delay(1000); return 0; } @@ -245,7 +245,7 @@ return result; spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } /* resume normal ops... */ OUTB(0x20, it8716f_flashport); Index: flashrom-programmer_delay/jedec.c =================================================================== --- flashrom-programmer_delay/jedec.c (Revision 576) +++ flashrom-programmer_delay/jedec.c (Arbeitskopie) @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x20, bios + 0x5555); - usleep(200); + programmer_delay(200); } void protect_jedec(chipaddr bios) @@ -82,7 +82,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_jedec(struct flashchip *flash) @@ -110,14 +110,14 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ - myusec_delay(probe_timing_enter); + programmer_delay(probe_timing_enter); /* Read product ID */ id1 = chip_readb(bios); @@ -139,11 +139,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(probe_timing_exit); + programmer_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); if (!oddparity(id1)) @@ -179,18 +179,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x30, bios + page); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -202,18 +202,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x50, bios + block); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -227,18 +227,18 @@ /* Issue the JEDEC Chip Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x10, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); Index: flashrom-programmer_delay/w29ee011.c =================================================================== --- flashrom-programmer_delay/w29ee011.c (Revision 576) +++ flashrom-programmer_delay/w29ee011.c (Arbeitskopie) @@ -38,17 +38,17 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x60, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -56,11 +56,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Index: flashrom-programmer_delay/sharplhf00l04.c =================================================================== --- flashrom-programmer_delay/sharplhf00l04.c (Revision 576) +++ flashrom-programmer_delay/sharplhf00l04.c (Arbeitskopie) @@ -46,9 +46,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -58,7 +58,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -85,7 +85,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -118,7 +118,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); Index: flashrom-programmer_delay/spi.c =================================================================== --- flashrom-programmer_delay/spi.c (Revision 576) +++ flashrom-programmer_delay/spi.c (Arbeitskopie) @@ -425,7 +425,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000000); return 0; } @@ -453,7 +453,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000000); return 0; } @@ -485,7 +485,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -511,7 +511,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -557,7 +557,7 @@ * This usually takes 15-800 ms, so wait in 10 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(10 * 1000); + programmer_delay(10 * 1000); return 0; } @@ -690,7 +690,7 @@ spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } return 0; @@ -748,13 +748,13 @@ return result; spi_command(6, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ while (pos < size) { w[1] = buf[pos++]; w[2] = buf[pos++]; spi_command(3, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ } spi_write_disable(); return 0; Index: flashrom-programmer_delay/wbsio_spi.c =================================================================== --- flashrom-programmer_delay/wbsio_spi.c (Revision 576) +++ flashrom-programmer_delay/wbsio_spi.c (Arbeitskopie) @@ -159,7 +159,7 @@ OUTB(writearr[0], wbsio_spibase); OUTB(mode, wbsio_spibase + 1); - myusec_delay(10); + programmer_delay(10); if (!readcnt) return 0; @@ -203,7 +203,7 @@ for (pos = 0; pos < size; pos++) { spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } spi_write_disable(); return 0; Index: flashrom-programmer_delay/m29f002.c =================================================================== --- flashrom-programmer_delay/m29f002.c (Revision 576) +++ flashrom-programmer_delay/m29f002.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; } @@ -44,7 +44,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); /* program */ Index: flashrom-programmer_delay/w39v040c.c =================================================================== --- flashrom-programmer_delay/w39v040c.c (Revision 576) +++ flashrom-programmer_delay/w39v040c.c (Arbeitskopie) @@ -26,22 +26,22 @@ uint8_t id1, id2, lock; chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 1); lock = chip_readb(bios + 0xfff2); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); if (!oddparity(id1)) Index: flashrom-programmer_delay/sst28sf040.c =================================================================== --- flashrom-programmer_delay/sst28sf040.c (Revision 576) +++ flashrom-programmer_delay/sst28sf040.c (Arbeitskopie) @@ -94,16 +94,16 @@ uint8_t id1, id2; chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(READ_ID, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); - myusec_delay(10); + programmer_delay(10); id2 = chip_readb(bios + 0x01); chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -121,7 +121,7 @@ chip_writeb(CHIP_ERASE, bios); protect_28sf040(bios); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Index: flashrom-programmer_delay/stm50flw0x0x.c =================================================================== --- flashrom-programmer_delay/stm50flw0x0x.c (Revision 576) +++ flashrom-programmer_delay/stm50flw0x0x.c (Arbeitskopie) @@ -35,7 +35,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_stm50flw0x0x(struct flashchip *flash) @@ -46,11 +46,11 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); /* Read product ID */ id1 = chip_readb(bios); @@ -72,11 +72,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, largeid2); @@ -101,7 +101,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); @@ -170,7 +170,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); wait_stm50flw0x0x(flash->virtual_memory); Index: flashrom-programmer_delay/am29f040b.c =================================================================== --- flashrom-programmer_delay/am29f040b.c (Revision 576) +++ flashrom-programmer_delay/am29f040b.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x30, bios + address); - sleep(2); + programmer_delay(1000000 * 2); /* wait for Toggle bit ready */ toggle_ready_jedec(bios + address); @@ -75,7 +75,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Index: flashrom-programmer_delay/w39v080fa.c =================================================================== --- flashrom-programmer_delay/w39v080fa.c (Revision 576) +++ flashrom-programmer_delay/w39v080fa.c (Arbeitskopie) @@ -29,7 +29,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -39,7 +39,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -108,7 +108,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read Hardware Lock Bits */ locking = chip_readb(bios + 0xffff2); @@ -117,7 +117,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("Lockout bits:\n"); Index: flashrom-programmer_delay/flashrom.c =================================================================== --- flashrom-programmer_delay/flashrom.c (Revision 576) +++ flashrom-programmer_delay/flashrom.c (Arbeitskopie) @@ -46,6 +46,7 @@ .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .delay = internal_delay, }, { @@ -59,6 +60,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, { @@ -72,6 +74,7 @@ .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -85,6 +88,7 @@ .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -98,6 +102,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, {}, @@ -155,6 +160,11 @@ return programmer_table[programmer].chip_readl(addr); } +void programmer_delay(uint32_t usecs) +{ + programmer_table[programmer].delay(usecs); +} + void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; Index: flashrom-programmer_delay/internal.c =================================================================== --- flashrom-programmer_delay/internal.c (Revision 576) +++ flashrom-programmer_delay/internal.c (Arbeitskopie) @@ -195,6 +195,18 @@ return *(volatile uint32_t *) addr; } +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} + /* Fallback map() for programmers which don't need special handling */ void *fallback_map(const char *descr, unsigned long phys_addr, size_t len) { Index: flashrom-programmer_delay/ichspi.c =================================================================== --- flashrom-programmer_delay/ichspi.c (Revision 576) +++ flashrom-programmer_delay/ichspi.c (Arbeitskopie) @@ -453,7 +453,7 @@ /* wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); @@ -570,7 +570,7 @@ /*wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); Index: flashrom-programmer_delay/udelay.c =================================================================== --- flashrom-programmer_delay/udelay.c (Revision 576) +++ flashrom-programmer_delay/udelay.c (Arbeitskopie) @@ -24,10 +24,10 @@ // count to a billion. Time it. If it's < 1 sec, count to 10B, etc. unsigned long micro = 1; -void myusec_delay(int time) +void myusec_delay(int usecs) { volatile unsigned long i; - for (i = 0; i < time * micro; i++) ; + for (i = 0; i < usecs * micro; i++) ; } void myusec_calibrate_delay(void) Index: flashrom-programmer_delay/82802ab.c =================================================================== --- flashrom-programmer_delay/82802ab.c (Revision 576) +++ flashrom-programmer_delay/82802ab.c (Arbeitskopie) @@ -53,9 +53,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -65,7 +65,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -92,7 +92,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -124,7 +124,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); //print_82802ab_status(status); Index: flashrom-programmer_delay/mx29f002.c =================================================================== --- flashrom-programmer_delay/mx29f002.c (Revision 576) +++ flashrom-programmer_delay/mx29f002.c (Arbeitskopie) @@ -34,7 +34,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -55,7 +55,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(100); + programmer_delay(100); toggle_ready_jedec(bios); // while ((*bios & 0x40) != 0x40) @@ -82,7 +82,7 @@ chipaddr dst = bios; chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_29f002(flash); //*bios = 0xF0; #if 1 Index: flashrom-programmer_delay/m29f400bt.c =================================================================== --- flashrom-programmer_delay/m29f400bt.c (Revision 576) +++ flashrom-programmer_delay/m29f400bt.c (Arbeitskopie) @@ -26,7 +26,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xA0, bios + 0xAAA); - usleep(200); + programmer_delay(200); } void write_page_m29f400bt(chipaddr bios, uint8_t *src, @@ -42,7 +42,7 @@ /* transfer data from source to destination */ chip_writeb(*src, dst); //chip_writeb(0xF0, bios); - //usleep(5); + //programmer_delay(5); toggle_ready_jedec(dst); printf ("Value in the flash at address 0x%lx = %#x, want %#x\n", @@ -61,7 +61,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x90, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xF0, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x10, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; @@ -113,7 +113,7 @@ //chip_writeb(0x10, bios + 0xAAA); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0;

3 3

[flashrom] r578 - trunk
by svn＠coreboot.org 05 Jun '09

05 Jun '09

Author: hailfinger Date: 2009-06-05 19:48:08 +0200 (Fri, 05 Jun 2009) New Revision: 578 Modified: trunk/82802ab.c trunk/am29f040b.c trunk/en29f002a.c trunk/flash.h trunk/flashrom.c trunk/ichspi.c trunk/internal.c trunk/it87spi.c trunk/jedec.c trunk/m29f002.c trunk/m29f400bt.c trunk/mx29f002.c trunk/sharplhf00l04.c trunk/spi.c trunk/sst28sf040.c trunk/stm50flw0x0x.c trunk/udelay.c trunk/w29ee011.c trunk/w39v040c.c trunk/w39v080fa.c trunk/wbsio_spi.c Log: Add external programmer delay functions so external programmers can handle the delay on their own if needed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Urja Rannikko <urjaman(a)gmail.com> Modified: trunk/82802ab.c =================================================================== --- trunk/82802ab.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/82802ab.c 2009-06-05 17:48:08 UTC (rev 578) @@ -53,9 +53,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -65,7 +65,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -92,7 +92,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -124,7 +124,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_82802ab(flash->virtual_memory); //print_82802ab_status(status); Modified: trunk/am29f040b.c =================================================================== --- trunk/am29f040b.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/am29f040b.c 2009-06-05 17:48:08 UTC (rev 578) @@ -29,7 +29,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x30, bios + address); - sleep(2); + programmer_delay(2 * 1000 * 1000); /* wait for Toggle bit ready */ toggle_ready_jedec(bios + address); @@ -75,7 +75,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Modified: trunk/en29f002a.c =================================================================== --- trunk/en29f002a.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/en29f002a.c 2009-06-05 17:48:08 UTC (rev 578) @@ -37,7 +37,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -70,7 +70,7 @@ chip_writeb(0x55, bios + 0xAAA); chip_writeb(0x90, bios + 0x555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios + 0x100); id2 = chip_readb(bios + 0x101); @@ -97,7 +97,7 @@ chipaddr dst = bios; //chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_chip_jedec(flash); printf("Programming page: "); Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/flash.h 2009-06-05 17:48:08 UTC (rev 578) @@ -103,6 +103,8 @@ uint8_t (*chip_readb) (const chipaddr addr); uint16_t (*chip_readw) (const chipaddr addr); uint32_t (*chip_readl) (const chipaddr addr); + + void (*delay) (int usecs); }; extern const struct programmer_entry programmer_table[]; @@ -118,6 +120,7 @@ uint8_t chip_readb(const chipaddr addr); uint16_t chip_readw(const chipaddr addr); uint32_t chip_readl(const chipaddr addr); +void programmer_delay(int usecs); #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -590,7 +593,7 @@ #define W_49V002FA 0x32 /* udelay.c */ -void myusec_delay(int time); +void myusec_delay(int usecs); void myusec_calibrate_delay(void); /* pcidev.c */ @@ -652,6 +655,7 @@ uint8_t mmio_readb(void *addr); uint16_t mmio_readw(void *addr); uint32_t mmio_readl(void *addr); +void internal_delay(int usecs); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); void fallback_unmap(void *virt_addr, size_t len); void fallback_chip_writew(uint16_t val, chipaddr addr); Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/flashrom.c 2009-06-05 17:48:08 UTC (rev 578) @@ -46,6 +46,7 @@ .chip_writeb = internal_chip_writeb, .chip_writew = internal_chip_writew, .chip_writel = internal_chip_writel, + .delay = internal_delay, }, { @@ -59,6 +60,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, { @@ -72,6 +74,7 @@ .chip_writeb = nic3com_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -85,6 +88,7 @@ .chip_writeb = satasii_chip_writeb, .chip_writew = fallback_chip_writew, .chip_writel = fallback_chip_writel, + .delay = internal_delay, }, { @@ -98,6 +102,7 @@ .chip_writeb = dummy_chip_writeb, .chip_writew = dummy_chip_writew, .chip_writel = dummy_chip_writel, + .delay = internal_delay, }, {}, @@ -155,6 +160,11 @@ return programmer_table[programmer].chip_readl(addr); } +void programmer_delay(int usecs) +{ + programmer_table[programmer].delay(usecs); +} + void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; Modified: trunk/ichspi.c =================================================================== --- trunk/ichspi.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/ichspi.c 2009-06-05 17:48:08 UTC (rev 578) @@ -453,7 +453,7 @@ /* wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); @@ -570,7 +570,7 @@ /*wait for cycle complete */ timeout = 100 * 1000 * 60; // 60s is a looong timeout. while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { - myusec_delay(10); + programmer_delay(10); } if (!timeout) { printf_debug("timeout\n"); Modified: trunk/internal.c =================================================================== --- trunk/internal.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/internal.c 2009-06-05 17:48:08 UTC (rev 578) @@ -195,6 +195,18 @@ return *(volatile uint32_t *) addr; } +void internal_delay(int usecs) +{ + /* If the delay is >1 s, use usleep because timing does not need to + * be so precise. + */ + if (usecs > 1000000) { + usleep(usecs); + } else { + myusec_delay(usecs); + } +} + /* Fallback map() for programmers which don't need special handling */ void *fallback_map(const char *descr, unsigned long phys_addr, size_t len) { Modified: trunk/it87spi.c =================================================================== --- trunk/it87spi.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/it87spi.c 2009-06-05 17:48:08 UTC (rev 578) @@ -220,7 +220,7 @@ * This usually takes 1-10 ms, so wait in 1 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(1000); + programmer_delay(1000); return 0; } @@ -245,7 +245,7 @@ return result; spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } /* resume normal ops... */ OUTB(0x20, it8716f_flashport); Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/jedec.c 2009-06-05 17:48:08 UTC (rev 578) @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x20, bios + 0x5555); - usleep(200); + programmer_delay(200); } void protect_jedec(chipaddr bios) @@ -82,7 +82,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_jedec(struct flashchip *flash) @@ -110,14 +110,14 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); /* Older chips may need up to 100 us to respond. The ATMEL 29C020 * needs 10 ms according to the data sheet. */ - myusec_delay(probe_timing_enter); + programmer_delay(probe_timing_enter); /* Read product ID */ id1 = chip_readb(bios); @@ -139,11 +139,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(probe_timing_exit); + programmer_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2); if (!oddparity(id1)) @@ -179,18 +179,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x30, bios + page); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -202,18 +202,18 @@ { /* Issue the Sector Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x50, bios + block); - myusec_delay(10); + programmer_delay(10); /* wait for Toggle bit ready */ toggle_ready_jedec(bios); @@ -227,18 +227,18 @@ /* Issue the JEDEC Chip Erase command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x10, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); Modified: trunk/m29f002.c =================================================================== --- trunk/m29f002.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/m29f002.c 2009-06-05 17:48:08 UTC (rev 578) @@ -29,7 +29,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x10, bios + 0x555); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; } @@ -44,7 +44,7 @@ chip_writeb(0xaa, bios + 0x555); chip_writeb(0x55, bios + 0xaaa); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); /* program */ Modified: trunk/m29f400bt.c =================================================================== --- trunk/m29f400bt.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/m29f400bt.c 2009-06-05 17:48:08 UTC (rev 578) @@ -26,7 +26,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xA0, bios + 0xAAA); - usleep(200); + programmer_delay(200); } void write_page_m29f400bt(chipaddr bios, uint8_t *src, @@ -42,7 +42,7 @@ /* transfer data from source to destination */ chip_writeb(*src, dst); //chip_writeb(0xF0, bios); - //usleep(5); + //programmer_delay(5); toggle_ready_jedec(dst); printf ("Value in the flash at address 0x%lx = %#x, want %#x\n", @@ -61,7 +61,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x90, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); /* The data sheet says id2 is at (bios + 0x01) and id2 listed in @@ -73,7 +73,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0xF0, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -95,7 +95,7 @@ chip_writeb(0x55, bios + 0x555); chip_writeb(0x10, bios + 0xAAA); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; @@ -113,7 +113,7 @@ //chip_writeb(0x10, bios + 0xAAA); chip_writeb(0x30, dst); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Modified: trunk/mx29f002.c =================================================================== --- trunk/mx29f002.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/mx29f002.c 2009-06-05 17:48:08 UTC (rev 578) @@ -34,7 +34,7 @@ chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -55,7 +55,7 @@ chip_writeb(0x55, bios + 0x2AA); chip_writeb(0x10, bios + 0x555); - myusec_delay(100); + programmer_delay(100); toggle_ready_jedec(bios); // while ((*bios & 0x40) != 0x40) @@ -82,7 +82,7 @@ chipaddr dst = bios; chip_writeb(0xF0, bios); - myusec_delay(10); + programmer_delay(10); erase_29f002(flash); //*bios = 0xF0; #if 1 Modified: trunk/sharplhf00l04.c =================================================================== --- trunk/sharplhf00l04.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/sharplhf00l04.c 2009-06-05 17:48:08 UTC (rev 578) @@ -46,9 +46,9 @@ #endif chip_writeb(0xff, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -58,7 +58,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); @@ -85,7 +85,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 0x01); @@ -118,7 +118,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); // now let's see what the register is status = wait_lhf00l04(flash->virtual_memory); print_lhf00l04_status(status); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/spi.c 2009-06-05 17:48:08 UTC (rev 578) @@ -425,7 +425,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000 * 1000); return 0; } @@ -453,7 +453,7 @@ */ /* FIXME: We assume spi_read_status_register will never fail. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - sleep(1); + programmer_delay(1000 * 1000); return 0; } @@ -485,7 +485,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -511,7 +511,7 @@ * This usually takes 100-4000 ms, so wait in 100 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(100 * 1000); + programmer_delay(100 * 1000); return 0; } @@ -557,7 +557,7 @@ * This usually takes 15-800 ms, so wait in 10 ms steps. */ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - usleep(10 * 1000); + programmer_delay(10 * 1000); return 0; } @@ -690,7 +690,7 @@ spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } return 0; @@ -748,13 +748,13 @@ return result; spi_command(6, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ while (pos < size) { w[1] = buf[pos++]; w[2] = buf[pos++]; spi_command(3, 0, w, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(5); /* SST25VF040B Tbp is max 10us */ + programmer_delay(5); /* SST25VF040B Tbp is max 10us */ } spi_write_disable(); return 0; Modified: trunk/sst28sf040.c =================================================================== --- trunk/sst28sf040.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/sst28sf040.c 2009-06-05 17:48:08 UTC (rev 578) @@ -94,16 +94,16 @@ uint8_t id1, id2; chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); chip_writeb(READ_ID, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); - myusec_delay(10); + programmer_delay(10); id2 = chip_readb(bios + 0x01); chip_writeb(RESET, bios); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); if (id1 == flash->manufacture_id && id2 == flash->model_id) @@ -121,7 +121,7 @@ chip_writeb(CHIP_ERASE, bios); protect_28sf040(bios); - myusec_delay(10); + programmer_delay(10); toggle_ready_jedec(bios); return 0; Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/stm50flw0x0x.c 2009-06-05 17:48:08 UTC (rev 578) @@ -35,7 +35,7 @@ chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - usleep(200); + programmer_delay(200); } int probe_stm50flw0x0x(struct flashchip *flash) @@ -46,11 +46,11 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); /* Read product ID */ id1 = chip_readb(bios); @@ -72,11 +72,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, largeid2); @@ -101,7 +101,7 @@ // put another command to get out of status register mode chip_writeb(0x90, bios); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); @@ -170,7 +170,7 @@ // now start it chip_writeb(0x20, bios); chip_writeb(0xd0, bios); - myusec_delay(10); + programmer_delay(10); wait_stm50flw0x0x(flash->virtual_memory); Modified: trunk/udelay.c =================================================================== --- trunk/udelay.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/udelay.c 2009-06-05 17:48:08 UTC (rev 578) @@ -24,10 +24,10 @@ // count to a billion. Time it. If it's < 1 sec, count to 10B, etc. unsigned long micro = 1; -void myusec_delay(int time) +void myusec_delay(int usecs) { volatile unsigned long i; - for (i = 0; i < time * micro; i++) ; + for (i = 0; i < usecs * micro; i++) ; } void myusec_calibrate_delay(void) Modified: trunk/w29ee011.c =================================================================== --- trunk/w29ee011.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/w29ee011.c 2009-06-05 17:48:08 UTC (rev 578) @@ -38,17 +38,17 @@ /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x80, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x60, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -56,11 +56,11 @@ /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); Modified: trunk/w39v040c.c =================================================================== --- trunk/w39v040c.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/w39v040c.c 2009-06-05 17:48:08 UTC (rev 578) @@ -26,22 +26,22 @@ uint8_t id1, id2, lock; chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); id1 = chip_readb(bios); id2 = chip_readb(bios + 1); lock = chip_readb(bios + 0xfff2); chip_writeb(0xAA, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - myusec_delay(10); + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(40); + programmer_delay(40); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); if (!oddparity(id1)) Modified: trunk/w39v080fa.c =================================================================== --- trunk/w39v080fa.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/w39v080fa.c 2009-06-05 17:48:08 UTC (rev 578) @@ -29,7 +29,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read product ID */ id1 = chip_readb(bios); @@ -39,7 +39,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); @@ -108,7 +108,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0x90, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); /* Read Hardware Lock Bits */ locking = chip_readb(bios + 0xffff2); @@ -117,7 +117,7 @@ chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xF0, bios + 0x5555); - myusec_delay(10); + programmer_delay(10); printf_debug("Lockout bits:\n"); Modified: trunk/wbsio_spi.c =================================================================== --- trunk/wbsio_spi.c 2009-06-05 17:04:37 UTC (rev 577) +++ trunk/wbsio_spi.c 2009-06-05 17:48:08 UTC (rev 578) @@ -159,7 +159,7 @@ OUTB(writearr[0], wbsio_spibase); OUTB(mode, wbsio_spibase + 1); - myusec_delay(10); + programmer_delay(10); if (!readcnt) return 0; @@ -203,7 +203,7 @@ for (pos = 0; pos < size; pos++) { spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - myusec_delay(10); + programmer_delay(10); } spi_write_disable(); return 0;

1 0

[PATCH] Use die() properly
by Carl-Daniel Hailfinger 05 Jun '09

05 Jun '09

die() does never return. Annotate it as such. Any endless loop after die() can be eliminated. Dereferencing a NULL pointer is bad. die() instead. Replace endless loops with die(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv2-die/src/console/console.c =================================================================== --- LinuxBIOSv2-die/src/console/console.c (Revision 4339) +++ LinuxBIOSv2-die/src/console/console.c (Arbeitskopie) @@ -92,7 +92,7 @@ } /* Report a fatal error */ -void die(const char *msg) +void __attribute__((noreturn)) die(const char *msg) { printk_emerg("%s", msg); post_code(0xff); Index: LinuxBIOSv2-die/src/devices/smbus_ops.c =================================================================== --- LinuxBIOSv2-die/src/devices/smbus_ops.c (Revision 4339) +++ LinuxBIOSv2-die/src/devices/smbus_ops.c (Arbeitskopie) @@ -34,7 +34,6 @@ if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_smbus_bus) { printk_alert("%s Cannot find smbus bus operations", dev_path(dev)); die(""); - for(;;); } return pbus; } Index: LinuxBIOSv2-die/src/devices/pci_ops.c =================================================================== --- LinuxBIOSv2-die/src/devices/pci_ops.c (Revision 4339) +++ LinuxBIOSv2-die/src/devices/pci_ops.c (Arbeitskopie) @@ -30,7 +30,7 @@ struct bus *pbus; if (!dev) - printk_alert("get_pbus: dev is NULL!\n"); + die("get_pbus: dev is NULL!\n"); pbus = dev->bus; @@ -44,9 +44,8 @@ pbus = pbus->dev->bus; } if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) { - printk_alert("%s Cannot find pci bus operations", dev_path(dev)); + printk_emerg("%s Cannot find pci bus operations\n", dev_path(dev)); die(""); - for(;;); } return pbus; } Index: LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c =================================================================== --- LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c (Revision 4339) +++ LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c (Arbeitskopie) @@ -37,12 +37,12 @@ dword=*ioapic_sbd; printk_debug("Southbridge apic id = %x\n",dword); if(dword!=(2<<24)) - for(;;); + die(""); //lyh *ioapic_sba=3; //lyh dword=*ioapic_sbd; //lyh printk_debug("Southbridge apic DT = %x\n",dword); //lyh if(dword!=1) - //lyh for(;;); + //lyh die(""); } -- http://www.hailfinger.org/ Index: LinuxBIOSv2-die/src/console/console.c =================================================================== --- LinuxBIOSv2-die/src/console/console.c (Revision 4339) +++ LinuxBIOSv2-die/src/console/console.c (Arbeitskopie) @@ -92,7 +92,7 @@ } /* Report a fatal error */ -void die(const char *msg) +void __attribute__((noreturn)) die(const char *msg) { printk_emerg("%s", msg); post_code(0xff); Index: LinuxBIOSv2-die/src/devices/smbus_ops.c =================================================================== --- LinuxBIOSv2-die/src/devices/smbus_ops.c (Revision 4339) +++ LinuxBIOSv2-die/src/devices/smbus_ops.c (Arbeitskopie) @@ -34,7 +34,6 @@ if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_smbus_bus) { printk_alert("%s Cannot find smbus bus operations", dev_path(dev)); die(""); - for(;;); } return pbus; } Index: LinuxBIOSv2-die/src/devices/pci_ops.c =================================================================== --- LinuxBIOSv2-die/src/devices/pci_ops.c (Revision 4339) +++ LinuxBIOSv2-die/src/devices/pci_ops.c (Arbeitskopie) @@ -30,7 +30,7 @@ struct bus *pbus; if (!dev) - printk_alert("get_pbus: dev is NULL!\n"); + die("get_pbus: dev is NULL!\n"); pbus = dev->bus; @@ -44,9 +44,8 @@ pbus = pbus->dev->bus; } if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) { - printk_alert("%s Cannot find pci bus operations", dev_path(dev)); + printk_emerg("%s Cannot find pci bus operations\n", dev_path(dev)); die(""); - for(;;); } return pbus; } Index: LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c =================================================================== --- LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c (Revision 4339) +++ LinuxBIOSv2-die/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c (Arbeitskopie) @@ -37,12 +37,12 @@ dword=*ioapic_sbd; printk_debug("Southbridge apic id = %x\n",dword); if(dword!=(2<<24)) - for(;;); + die(""); //lyh *ioapic_sba=3; //lyh dword=*ioapic_sbd; //lyh printk_debug("Southbridge apic DT = %x\n",dword); //lyh if(dword!=1) - //lyh for(;;); + //lyh die(""); }

4 5

[PATCH] flashrom: Fix a bug in dummyflasher.c special case
by Carl-Daniel Hailfinger 05 Jun '09

05 Jun '09

Fix a bug in dummyflasher.c special case where no type parameter is given. Tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-dummyflasher_type_fix/dummyflasher.c =================================================================== --- flashrom-dummyflasher_type_fix/dummyflasher.c (Revision 576) +++ flashrom-dummyflasher_type_fix/dummyflasher.c (Arbeitskopie) @@ -35,7 +35,7 @@ printf_debug("%s\n", __func__); /* "all" is equivalent to specifying no type. */ - if (!strcmp(dummytype, "all")) { + if (dummytype && (!strcmp(dummytype, "all"))) { free(dummytype); dummytype = NULL; } -- http://www.hailfinger.org/ Index: flashrom-dummyflasher_type_fix/dummyflasher.c =================================================================== --- flashrom-dummyflasher_type_fix/dummyflasher.c (Revision 576) +++ flashrom-dummyflasher_type_fix/dummyflasher.c (Arbeitskopie) @@ -35,7 +35,7 @@ printf_debug("%s\n", __func__); /* "all" is equivalent to specifying no type. */ - if (!strcmp(dummytype, "all")) { + if (dummytype && (!strcmp(dummytype, "all"))) { free(dummytype); dummytype = NULL; }

2 2

[flashrom] r577 - trunk
by svn＠coreboot.org 05 Jun '09

05 Jun '09

Author: hailfinger Date: 2009-06-05 19:04:37 +0200 (Fri, 05 Jun 2009) New Revision: 577 Modified: trunk/dummyflasher.c Log: Fix a bug in dummyflasher.c special case where no type parameter is given. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/dummyflasher.c =================================================================== --- trunk/dummyflasher.c 2009-06-05 13:46:17 UTC (rev 576) +++ trunk/dummyflasher.c 2009-06-05 17:04:37 UTC (rev 577) @@ -35,7 +35,7 @@ printf_debug("%s\n", __func__); /* "all" is equivalent to specifying no type. */ - if (!strcmp(dummytype, "all")) { + if (dummytype && (!strcmp(dummytype, "all"))) { free(dummytype); dummytype = NULL; }

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coreboot June 2009